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Rev 1413 Rev 1430
Line 127... Line 127...
127 
	rdev->pm.sideport_bandwidth.full = rfixed_mul(rdev->pm.igp_sideport_mclk, tmp);
 127 
	rdev->pm.sideport_bandwidth.full = rfixed_mul(rdev->pm.igp_sideport_mclk, tmp);
128 
	tmp.full = rfixed_const(10);
 128 
	tmp.full = rfixed_const(10);
129 
	rdev->pm.sideport_bandwidth.full = rfixed_div(rdev->pm.sideport_bandwidth, tmp);
 129 
	rdev->pm.sideport_bandwidth.full = rfixed_div(rdev->pm.sideport_bandwidth, tmp);
130 
}
 130 
}
Line 131... Line 131...
131 
 
 131 
 
132 
void rs690_vram_info(struct radeon_device *rdev)
 132 
void rs690_mc_init(struct radeon_device *rdev)
133 
{
 133 
{
- 
 
 134 
	fixed20_12 a;
Line 134... Line 135...
134 
	fixed20_12 a;
 135 
	u64 base;
135 
 
 - 
 
136 
	rs400_gart_adjust_size(rdev);
 136 
 
137 
 
 137 
	rs400_gart_adjust_size(rdev);
138 
	rdev->mc.vram_is_ddr = true;
 - 
 
139 
		rdev->mc.vram_width = 128;
 138 
	rdev->mc.vram_is_ddr = true;
140 
 
 139 
		rdev->mc.vram_width = 128;
141 
	rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
 - 
 
142 
	rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
 140 
	rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
143 
 
 141 
	rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
144 
	rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
 - 
 
145 
	rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
 - 
 
146 
 
 142 
	rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
147 
	if (rdev->mc.mc_vram_size > rdev->mc.aper_size)
 - 
 
148 
		rdev->mc.mc_vram_size = rdev->mc.aper_size;
 143 
	rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
149 
 
 144 
	rdev->mc.visible_vram_size = rdev->mc.aper_size;
150 
	if (rdev->mc.real_vram_size > rdev->mc.aper_size)
 - 
 
151 
		rdev->mc.real_vram_size = rdev->mc.aper_size;
 145 
	base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
152 
 
 146 
	base = G_000100_MC_FB_START(base) << 16;
153 
	rs690_pm_info(rdev);
 147 
	rs690_pm_info(rdev);
154 
	/* FIXME: we should enforce default clock in case GPU is not in
 148 
	/* FIXME: we should enforce default clock in case GPU is not in
155 
	 * default setup
 149 
	 * default setup
156 
	 */
 150 
	 */
157 
	a.full = rfixed_const(100);
 151 
	a.full = rfixed_const(100);
158 
	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
 152 
	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
159 
	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
 153 
	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
160 
	a.full = rfixed_const(16);
 154 
	a.full = rfixed_const(16);
161 
	/* core_bandwidth = sclk(Mhz) * 16 */
 - 
 
162 
	rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
 - 
 
163 
}
 - 
 
164 
 
 - 
 
165 
static int rs690_mc_init(struct radeon_device *rdev)
 - 
 
166 
{
 - 
 
167 
	int r;
 - 
 
168 
	u32 tmp;
 - 
 
169 
 
 - 
 
170 
	/* Setup GPU memory space */
 - 
 
171 
	tmp = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
 - 
 
172 
	rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
 - 
 
173 
	rdev->mc.gtt_location = 0xFFFFFFFFUL;
 155 
	/* core_bandwidth = sclk(Mhz) * 16 */
174 
	r = radeon_mc_setup(rdev);
 - 
 
175 
	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
 156 
	rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
176 
	if (r)
 157 
	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
177 
		return r;
 158 
	radeon_vram_location(rdev, &rdev->mc, base);
Line 178... Line 159...
178 
	return 0;
 159 
	radeon_gtt_location(rdev, &rdev->mc);
179 
}
 160 
}
180 
 
 161 
 
Line 684... Line 665...
684 
 
 665 
 
685 
	/* Initialize clocks */
 666 
	/* Initialize clocks */
686 
	radeon_get_clock_info(rdev->ddev);
 667 
	radeon_get_clock_info(rdev->ddev);
687 
	/* Initialize power management */
 668 
	/* Initialize power management */
688 
	radeon_pm_init(rdev);
 - 
 
689 
	/* Get vram informations */
 - 
 
690 
	rs690_vram_info(rdev);
 669 
	radeon_pm_init(rdev);
691 
	/* Initialize memory controller (also test AGP) */
 670 
	/* initialize memory controller */
692 
	r = rs690_mc_init(rdev);
 - 
 
693 
	if (r)
 - 
 
694 
		return r;
 671 
	rs690_mc_init(rdev);
695 
	rv515_debugfs(rdev);
 672 
	rv515_debugfs(rdev);
696 
	/* Fence driver */
 673 
	/* Fence driver */
697 
//	r = radeon_fence_driver_init(rdev);
 674 
//	r = radeon_fence_driver_init(rdev);
698 
//	if (r)
 675 
//	if (r)