WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/rdisplay_kms.c


#include 
#include 
#include "radeon.h"
#include "radeon_object.h"
#include "drm_fb_helper.h"
#include "hmm.h"
#include "bitmap.h"
#include 
 
extern struct drm_framebuffer *main_fb;
extern struct drm_gem_object  *main_fb_obj;
 
display_t *os_display;
 
static cursor_t*  __stdcall select_cursor_kms(cursor_t *cursor);
static void       __stdcall move_cursor_kms(cursor_t *cursor, int x, int y);
 
int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
 
void disable_mouse(void);
 
static void radeon_show_cursor_kms(struct drm_crtc *crtc)
{
    struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
    struct radeon_device *rdev = crtc->dev->dev_private;
 
    if (ASIC_IS_DCE4(rdev)) {
        WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset);
        WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN |
               EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT));
    } else if (ASIC_IS_AVIVO(rdev)) {
        WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
        WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
                 (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
    } else {
        switch (radeon_crtc->crtc_id) {
        case 0:
            WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
            break;
        case 1:
            WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
            break;
        default:
            return;
        }
 
        WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN |
                      (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
             ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
    }
}
 
static void radeon_lock_cursor_kms(struct drm_crtc *crtc, bool lock)
{
    struct radeon_device *rdev = crtc->dev->dev_private;
    struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
    uint32_t cur_lock;
 
    if (ASIC_IS_DCE4(rdev)) {
        cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset);
        if (lock)
            cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK;
        else
            cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;
        WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
    } else if (ASIC_IS_AVIVO(rdev)) {
        cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
        if (lock)
            cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
        else
            cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
        WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
    } else {
        cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset);
        if (lock)
            cur_lock |= RADEON_CUR_LOCK;
        else
            cur_lock &= ~RADEON_CUR_LOCK;
        WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock);
    }
}
 
cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)
{
    struct radeon_device *rdev;
    struct radeon_crtc   *radeon_crtc;
    cursor_t *old;
    uint32_t  gpu_addr;
 
    rdev = (struct radeon_device *)os_display->ddev->dev_private;
    radeon_crtc = to_radeon_crtc(os_display->crtc);
 
    old = os_display->cursor;
 
    os_display->cursor = cursor;
    gpu_addr = radeon_bo_gpu_offset(cursor->cobj);
 
    if (ASIC_IS_DCE4(rdev)) {
        WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,
               0);
        WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
               gpu_addr);
    } else if (ASIC_IS_AVIVO(rdev)) {
        if (rdev->family >= CHIP_RV770)
            WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);
        WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
    }
    else {
        radeon_crtc->legacy_display_base_addr = gpu_addr - rdev->mc.vram_start;
        /* offset is from DISP(2)_BASE_ADDRESS */
        WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr);
    }
 
    return old;
};
 
void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y)
{
    struct radeon_device *rdev;
    rdev = (struct radeon_device *)os_display->ddev->dev_private;
    struct drm_crtc *crtc = os_display->crtc;
    struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
    int hot_x = cursor->hot_x;
    int hot_y = cursor->hot_y;
    int w = 32;
 
    radeon_lock_cursor_kms(crtc, true);
 
    if (ASIC_IS_DCE4(rdev)) {
        WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset,
               (x << 16) | y);
        WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset,
               (hot_x << 16) | hot_y);
        WREG32(EVERGREEN_CUR_SIZE + radeon_crtc->crtc_offset,
               ((w - 1) << 16) | 31);
    } else if (ASIC_IS_AVIVO(rdev)) {
        WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
               (x << 16) | y);
        WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset,
               (hot_x << 16) | hot_y);
        WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
               ((w - 1) << 16) | 31);
    } else {
        if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
            y *= 2;
 
        uint32_t  gpu_addr;
        int       xorg =0, yorg=0;
 
        x = x - hot_x;
        y = y - hot_y;
 
        if( x < 0 )
        {
            xorg = -x + 1;
            x = 0;
        }
 
        if( y < 0 )
        {
            yorg = -hot_y + 1;
            y = 0;
        };
 
        WREG32(RADEON_CUR_HORZ_VERT_OFF,
               (RADEON_CUR_LOCK | (xorg << 16) | yorg ));
        WREG32(RADEON_CUR_HORZ_VERT_POSN,
               (RADEON_CUR_LOCK | (x << 16) | y));
 
        gpu_addr = radeon_bo_gpu_offset(cursor->cobj);
 
        /* offset is from DISP(2)_BASE_ADDRESS */
        WREG32(RADEON_CUR_OFFSET,
         (gpu_addr - rdev->mc.vram_start + (yorg * 256)));
    }
    radeon_lock_cursor_kms(crtc, false);
}
 
static char *manufacturer_name(unsigned char *x)
{
    static char name[4];
 
    name[0] = ((x[0] & 0x7C) >> 2) + '@';
    name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@';
    name[2] = (x[1] & 0x1F) + '@';
    name[3] = 0;
 
    return name;
}
 
static int set_mode(struct drm_device *dev, struct drm_connector *connector,
                    struct drm_crtc *crtc, videomode_t *reqmode, bool strict)
{
    struct drm_display_mode  *mode = NULL, *tmpmode;
    struct drm_framebuffer  *fb         = NULL;
    struct drm_mode_set     set;
    const char *con_name;
    unsigned hdisplay, vdisplay;
    int ret;
 
    drm_modeset_lock_all(dev);
 
    list_for_each_entry(tmpmode, &connector->modes, head)
    {
        if( (tmpmode->hdisplay == reqmode->width)  &&
            (tmpmode->vdisplay == reqmode->height) &&
            (drm_mode_vrefresh(tmpmode) == reqmode->freq) )
        {
            mode = tmpmode;
            goto do_set;
        }
	};
 
    if( (mode == NULL) && (strict == false) )
    {
        list_for_each_entry(tmpmode, &connector->modes, head)
        {
            if( (tmpmode->hdisplay == reqmode->width)  &&
                (tmpmode->vdisplay == reqmode->height) )
            {
                mode = tmpmode;
                goto do_set;
            }
       };
    };
 
    DRM_ERROR("%s failed\n", __FUNCTION__);
 
    return -1;
 
do_set:
 
    con_name = connector->name;
 
    DRM_DEBUG_KMS("set mode %d %d: crtc %d connector %s\n",
              reqmode->width, reqmode->height, crtc->base.id,
              con_name);
 
    drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
    hdisplay = mode->hdisplay;
    vdisplay = mode->vdisplay;
 
 
 
 
    fb = main_fb;
 
    fb->width  = reqmode->width;
    fb->height = reqmode->height;
 
    fb->pitches[0] =
    fb->pitches[1] =
    fb->pitches[2] =
    fb->pitches[3] = radeon_align_pitch(dev->dev_private, reqmode->width, 32, false) * ((32 + 1) / 8);
    fb->bits_per_pixel = 32;
    fb->depth = 24;
 
    crtc->enabled = true;
    os_display->crtc = crtc;
 
    set.crtc = crtc;
    set.x = 0;
    set.y = 0;
    set.mode = mode;
    set.connectors = &connector;
    set.num_connectors = 1;
    set.fb = fb;
 
    ret = drm_mode_set_config_internal(&set);
 
    drm_modeset_unlock_all(dev);
 
    select_cursor_kms(os_display->cursor);
    radeon_show_cursor_kms(crtc);
 
    if ( !ret )
    {
        os_display->width    = fb->width;
        os_display->height   = fb->height;
        os_display->vrefresh = drm_mode_vrefresh(mode);
 
        sysSetScreen(fb->width, fb->height, fb->pitches[0]);
 
        DRM_DEBUG_KMS("new mode %d x %d pitch %d\n",
                       fb->width, fb->height, fb->pitches[0]);
    }
    else
        DRM_ERROR("failed to set mode %d_%d on crtc %p\n",
                   fb->width, fb->height, crtc);
 
    return ret;
}
 
static int count_connector_modes(struct drm_connector* connector)
{
    struct drm_display_mode  *mode;
    int count = 0;
 
    list_for_each_entry(mode, &connector->modes, head)
    {
        count++;
    };
    return count;
};
 
static struct drm_crtc *get_possible_crtc(struct drm_device *dev, struct drm_encoder *encoder)
{
    struct drm_crtc *tmp_crtc;
    int crtc_mask = 1;
 
    list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head)
    {
        if (encoder->possible_crtcs & crtc_mask)
        {
            encoder->crtc = tmp_crtc;
            DRM_DEBUG_KMS("use CRTC %p ID %d\n", tmp_crtc, tmp_crtc->base.id);
            return tmp_crtc;
        };
        crtc_mask <<= 1;
    };
    return NULL;
};
 
static int choose_config(struct drm_device *dev, struct drm_connector **boot_connector,
                  struct drm_crtc **boot_crtc)
{
    struct drm_connector_helper_funcs *connector_funcs;
    struct drm_connector *connector;
    struct drm_encoder   *encoder;
    struct drm_crtc      *crtc;
 
    list_for_each_entry(connector, &dev->mode_config.connector_list, head)
    {
        if( connector->status != connector_status_connected)
            continue;
 
        encoder = connector->encoder;
 
        if(encoder == NULL)
        {
            connector_funcs = connector->helper_private;
            encoder = connector_funcs->best_encoder(connector);
 
            if( encoder == NULL)
            {
                DRM_DEBUG_KMS("CONNECTOR %x ID: %d no active encoders\n",
                        connector, connector->base.id);
                continue;
            };
        }
 
        crtc = encoder->crtc;
        if(crtc == NULL)
            crtc = get_possible_crtc(dev, encoder);
 
        if(crtc != NULL)
        {
            *boot_connector = connector;
            *boot_crtc = crtc;
            connector->encoder = encoder;
            DRM_DEBUG_KMS("CONNECTOR %p ID:%d status:%d ENCODER %p ID: %d CRTC %p ID:%d\n",
                           connector, connector->base.id, connector->status,
                           encoder, encoder->base.id, crtc, crtc->base.id );
            return 0;
        }
        else
            DRM_DEBUG_KMS("No CRTC for encoder %d\n", encoder->base.id);
 
    };
 
    return -ENOENT;
};
 
static int get_boot_mode(struct drm_connector *connector, videomode_t *usermode)
{
    struct drm_display_mode *mode;
 
    list_for_each_entry(mode, &connector->modes, head)
    {
        DRM_DEBUG_KMS("check mode w:%d h:%d %dHz\n",
                mode->hdisplay, mode->vdisplay,
                drm_mode_vrefresh(mode));
 
        if( os_display->width  == mode->hdisplay &&
            os_display->height == mode->vdisplay &&
            drm_mode_vrefresh(mode) == 60)
        {
            usermode->width  = os_display->width;
            usermode->height = os_display->height;
            usermode->freq   = 60;
            return 1;
        }
    }
    return 0;
}
 
int init_display_kms(struct drm_device *dev, videomode_t *usermode)
{
    struct drm_connector_helper_funcs *connector_funcs;
    struct drm_connector    *connector = NULL;
    struct drm_crtc         *crtc = NULL;
    struct drm_framebuffer  *fb;
 
    cursor_t  *cursor;
    u32        ifl;
    int        ret;
 
    mutex_lock(&dev->mode_config.mutex);
 
    ret = choose_config(dev, &connector, &crtc);
    if(ret)
    {
        DRM_DEBUG_KMS("No active connectors!\n");
        mutex_unlock(&dev->mode_config.mutex);
        return -1;
    };
 
    {
        struct drm_display_mode *tmp, *native = NULL;
        struct radeon_device *rdev = dev->dev_private;
 
        list_for_each_entry(tmp, &connector->modes, head) {
            if (tmp->hdisplay > 16384 ||
                tmp->vdisplay > 16384)
                continue;
            if (tmp->type & DRM_MODE_TYPE_PREFERRED)
            {
                native = tmp;
                break;
            };
        }
 
        if( ASIC_IS_AVIVO(rdev) && native )
        {
            struct radeon_encoder *radeon_encoder = to_radeon_encoder(connector->encoder);
            radeon_encoder->rmx_type = RMX_FULL;
            radeon_encoder->native_mode = *native;
        };
    }
 
#if 0
    mutex_lock(&dev->object_name_lock);
    idr_preload(GFP_KERNEL);
 
    if (!main_fb_obj->name) {
        ret = idr_alloc(&dev->object_name_idr, &main_fb_obj, 1, 0, GFP_NOWAIT);
 
        main_fb_obj->name = ret;
 
        /* Allocate a reference for the name table.  */
        drm_gem_object_reference(main_fb_obj);
 
        DRM_DEBUG_KMS("%s allocate fb name %d\n", __FUNCTION__, main_fb_obj->name );
    }
 
    idr_preload_end();
    mutex_unlock(&dev->object_name_lock);
    drm_gem_object_unreference(main_fb_obj);
#endif
 
    os_display = GetDisplay();
    os_display->ddev = dev;
    os_display->connector = connector;
    os_display->crtc = crtc;
 
    os_display->supported_modes = count_connector_modes(connector);
 
    ifl = safe_cli();
    {
        list_for_each_entry(cursor, &os_display->cursors, list)
        {
            init_cursor(cursor);
        };
 
        os_display->restore_cursor(0,0);
        os_display->init_cursor    = init_cursor;
        os_display->select_cursor  = select_cursor_kms;
        os_display->show_cursor    = NULL;
        os_display->move_cursor    = move_cursor_kms;
        os_display->restore_cursor = restore_cursor;
        os_display->disable_mouse  = disable_mouse;
        select_cursor_kms(os_display->cursor);
    };
    safe_sti(ifl);
 
 
//    dbgprintf("current mode %d x %d x %d\n",
//              os_display->width, os_display->height, os_display->vrefresh);
//    dbgprintf("user mode mode %d x %d x %d\n",
//              usermode->width, usermode->height, usermode->freq);
 
    if( (usermode->width == 0) ||
        (usermode->height == 0))
    {
        if( !get_boot_mode(connector, usermode))
        {
            struct drm_display_mode *mode;
 
            mode = list_entry(connector->modes.next, typeof(*mode), head);
            usermode->width  = mode->hdisplay;
            usermode->height = mode->vdisplay;
            usermode->freq   = drm_mode_vrefresh(mode);
        };
    };
 
    mutex_unlock(&dev->mode_config.mutex);
 
    set_mode(dev, os_display->connector, os_display->crtc, usermode, false);
 
    radeon_show_cursor_kms(os_display->crtc);
 
    return 0;
};
 
 
int get_videomodes(videomode_t *mode, int *count)
{
    int err = -1;
 
    if( *count == 0 )
    {
        *count = os_display->supported_modes;
        err = 0;
    }
    else if( mode != NULL )
    {
        struct drm_display_mode  *drmmode;
        int i = 0;
 
        if( *count > os_display->supported_modes)
            *count = os_display->supported_modes;
 
        list_for_each_entry(drmmode, &os_display->connector->modes, head)
        {
            if( i < *count)
            {
                mode->width  = drmmode->hdisplay;
                mode->height = drmmode->vdisplay;
                mode->bpp    = 32;
                mode->freq   = drm_mode_vrefresh(drmmode);
                i++;
                mode++;
            }
            else break;
        };
        *count = i;
        err = 0;
    };
    return err;
};
 
int set_user_mode(videomode_t *mode)
{
    int err = -1;
 
    if( (mode->width  != 0)  &&
        (mode->height != 0)  &&
        (mode->freq   != 0 ) &&
        ( (mode->width   != os_display->width)  ||
          (mode->height  != os_display->height) ||
          (mode->freq    != os_display->vrefresh) ) )
    {
        return set_mode(os_display->ddev, os_display->connector, os_display->crtc, mode, true);
    };
 
    return -1;
};
 
 
 
 
 
#if 0
typedef struct
{
    int left;
    int top;
    int right;
    int bottom;
}rect_t;
 
extern struct hmm bm_mm;
struct drm_device *main_device;
 
void  FASTCALL GetWindowRect(rect_t *rc)__asm__("GetWindowRect");
 
#define CURRENT_TASK             (0x80003000)
 
static u32_t get_display_map()
{
    u32_t   addr;
 
    addr = (u32_t)os_display;
    addr+= sizeof(display_t);            /*  shoot me  */
    return *(u32_t*)addr;
}
 
#include "clip.inc"
#include "r100d.h"
 
# define PACKET3_BITBLT                 0x92
# define PACKET3_TRANS_BITBLT           0x9C
# define R5XX_SRC_CMP_EQ_COLOR      (4 <<  0)
# define R5XX_SRC_CMP_NEQ_COLOR     (5 <<  0)
# define R5XX_CLR_CMP_SRC_SOURCE    (1 << 24)
 
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
               int src_x, int src_y, u32 w, u32 h)
{
    struct context *context;
 
    bitmap_t  *bitmap;
    rect_t     winrc;
    clip_t     dst_clip;
    clip_t     src_clip;
    u32_t      width;
    u32_t      height;
 
    u32_t      br13, cmd, slot_mask, *b;
    u32_t      offset;
    u8         slot;
    int        n=0;
    int        ret;
 
    if(unlikely(hbitmap==0))
        return -1;
 
    bitmap = (bitmap_t*)hmm_get_data(&bm_mm, hbitmap);
 
    if(unlikely(bitmap==NULL))
        return -1;
 
    context = get_context(main_drm_device);
    if(unlikely(context == NULL))
        return -1;
 
    GetWindowRect(&winrc);
    {
        static warn_count;
 
        if(warn_count < 1)
        {
            printf("left %d top %d right %d bottom %d\n",
                    winrc.left, winrc.top, winrc.right, winrc.bottom);
            printf("bitmap width %d height %d\n", w, h);
            warn_count++;
        };
    };
 
 
    dst_clip.xmin   = 0;
    dst_clip.ymin   = 0;
    dst_clip.xmax   = winrc.right-winrc.left;
    dst_clip.ymax   = winrc.bottom -winrc.top;
 
    src_clip.xmin   = 0;
    src_clip.ymin   = 0;
    src_clip.xmax   = bitmap->width  - 1;
    src_clip.ymax   = bitmap->height - 1;
 
    width  = w;
    height = h;
 
    if( blit_clip(&dst_clip, &dst_x, &dst_y,
                  &src_clip, &src_x, &src_y,
                  &width, &height) )
        return 0;
 
    dst_x+= winrc.left;
    dst_y+= winrc.top;
 
    slot = *((u8*)CURRENT_TASK);
 
    slot_mask = (u32_t)slot<<24;
 
    {
#if 0
#else
        u8* src_offset;
        u8* dst_offset;
        u32 color;
 
        u32 ifl;
 
        src_offset = (u8*)(src_y*bitmap->pitch + src_x*4);
        src_offset += (u32)bitmap->uaddr;
 
        dst_offset = (u8*)(dst_y*os_display->width + dst_x);
        dst_offset+= get_display_map();
 
        u32_t tmp_h = height;
 
      ifl = safe_cli();
        while( tmp_h--)
        {
            u32 tmp_w = width;
 
            u32* tmp_src = src_offset;
            u8*  tmp_dst = dst_offset;
 
            src_offset+= bitmap->pitch;
            dst_offset+= os_display->width;
 
            while( tmp_w--)
            {
                color = *tmp_src;
 
                if(*tmp_dst == slot)
                    color |= 0xFF000000;
                else
                    color = 0x00;
 
                *tmp_src = color;
                tmp_src++;
                tmp_dst++;
            };
        };
      safe_sti(ifl);
#endif
    }
 
    {
        static warn_count;
 
        if(warn_count < 1)
        {
            printf("blit width %d height %d\n",
                    width, height);
            warn_count++;
        };
    };
 
 
//    if((context->cmd_buffer & 0xFC0)==0xFC0)
//        context->cmd_buffer&= 0xFFFFF000;
 
//    b = (u32_t*)ALIGN(context->cmd_buffer,64);
 
//    offset = context->cmd_offset + ((u32_t)b & 0xFFF);
 
 
//    context->cmd_buffer+= n*4;
 
    struct radeon_device *rdev = main_drm_device->dev_private;
    struct radeon_ib *ib = &context->ib;
 
    ib->ptr[0] = PACKET0(0x15cc, 0);
    ib->ptr[1] = 0xFFFFFFFF;
    ib->ptr[2] = PACKET3(PACKET3_TRANS_BITBLT, 11);
    ib->ptr[3] =  RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
                  RADEON_GMC_DST_PITCH_OFFSET_CNTL |
                  RADEON_GMC_SRC_CLIPPING |
                  RADEON_GMC_DST_CLIPPING |
                  RADEON_GMC_BRUSH_NONE |
                  (RADEON_COLOR_FORMAT_ARGB8888 << 8) |
                  RADEON_GMC_SRC_DATATYPE_COLOR |
                  RADEON_ROP3_S |
                  RADEON_DP_SRC_SOURCE_MEMORY |
                  RADEON_GMC_WR_MSK_DIS;
 
    ib->ptr[4] = ((bitmap->pitch/64) << 22) | (bitmap->gaddr >> 10);
    ib->ptr[5] = ((os_display->pitch/64) << 22) | (rdev->mc.vram_start >> 10);
    ib->ptr[6] = (0x1fff) | (0x1fff << 16);
    ib->ptr[7] = 0;
    ib->ptr[8] = (0x1fff) | (0x1fff << 16);
 
    ib->ptr[9] = R5XX_CLR_CMP_SRC_SOURCE | R5XX_SRC_CMP_EQ_COLOR;
    ib->ptr[10] = 0x00000000;
    ib->ptr[11] = 0xFFFFFFFF;
 
    ib->ptr[12] = (src_x << 16) | src_y;
    ib->ptr[13] = (dst_x << 16) | dst_y;
    ib->ptr[14] = (width << 16) | height;
 
    ib->ptr[15] = PACKET2(0);
 
    ib->length_dw = 16;
 
    ret = radeon_ib_schedule(rdev, ib, NULL);
    if (ret) {
        DRM_ERROR("radeon: failed to schedule ib (%d).\n", ret);
        goto fail;
    }
 
    ret = radeon_fence_wait(ib->fence, false);
    if (ret) {
        DRM_ERROR("radeon: fence wait failed (%d).\n", ret);
        goto fail;
    }
 
    radeon_fence_unref(&ib->fence);
 
fail:
    return ret;
};
 
#endif
 
>
 
>

Rev 5354	Rev 6104
1	#include	1	#include
2	#include	2	#include
3	#include "radeon.h"	3	#include "radeon.h"
4	#include "radeon_object.h"	4	#include "radeon_object.h"
5	#include "drm_fb_helper.h"	5	#include "drm_fb_helper.h"
6	#include "hmm.h"	6	#include "hmm.h"
7	#include "bitmap.h"	7	#include "bitmap.h"
8	#include	8	#include
9		9
10	extern struct drm_framebuffer *main_fb;	10	extern struct drm_framebuffer *main_fb;
11	extern struct drm_gem_object *main_fb_obj;	11	extern struct drm_gem_object *main_fb_obj;
12		12
13	display_t *os_display;	13	display_t *os_display;
14		14
15	static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor);	15	static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor);
16	static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y);	16	static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y);
17		17
18	int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);	18	int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
19		19
20	void disable_mouse(void);	20	void disable_mouse(void);
21		21
22	static void radeon_show_cursor_kms(struct drm_crtc *crtc)	22	static void radeon_show_cursor_kms(struct drm_crtc *crtc)
23	{	23	{
24	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);	24	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
25	struct radeon_device *rdev = crtc->dev->dev_private;	25	struct radeon_device *rdev = crtc->dev->dev_private;
26		26
27	if (ASIC_IS_DCE4(rdev)) {	27	if (ASIC_IS_DCE4(rdev)) {
28	WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset);	28	WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset);
29	WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN \|	29	WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN \|
30	EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT));	30	EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT));
31	} else if (ASIC_IS_AVIVO(rdev)) {	31	} else if (ASIC_IS_AVIVO(rdev)) {
32	WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);	32	WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
33	WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN \|	33	WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN \|
34	(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));	34	(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
35	} else {	35	} else {
36	switch (radeon_crtc->crtc_id) {	36	switch (radeon_crtc->crtc_id) {
37	case 0:	37	case 0:
38	WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);	38	WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
39	break;	39	break;
40	case 1:	40	case 1:
41	WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);	41	WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
42	break;	42	break;
43	default:	43	default:
44	return;	44	return;
45	}	45	}
46		46
47	WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN \|	47	WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN \|
48	(RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),	48	(RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
49	~(RADEON_CRTC_CUR_EN \| RADEON_CRTC_CUR_MODE_MASK));	49	~(RADEON_CRTC_CUR_EN \| RADEON_CRTC_CUR_MODE_MASK));
50	}	50	}
51	}	51	}
52		52
53	static void radeon_lock_cursor_kms(struct drm_crtc *crtc, bool lock)	53	static void radeon_lock_cursor_kms(struct drm_crtc *crtc, bool lock)
54	{	54	{
55	struct radeon_device *rdev = crtc->dev->dev_private;	55	struct radeon_device *rdev = crtc->dev->dev_private;
56	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);	56	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
57	uint32_t cur_lock;	57	uint32_t cur_lock;
58		58
59	if (ASIC_IS_DCE4(rdev)) {	59	if (ASIC_IS_DCE4(rdev)) {
60	cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset);	60	cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset);
61	if (lock)	61	if (lock)
62	cur_lock \|= EVERGREEN_CURSOR_UPDATE_LOCK;	62	cur_lock \|= EVERGREEN_CURSOR_UPDATE_LOCK;
63	else	63	else
64	cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;	64	cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;
65	WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);	65	WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
66	} else if (ASIC_IS_AVIVO(rdev)) {	66	} else if (ASIC_IS_AVIVO(rdev)) {
67	cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);	67	cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
68	if (lock)	68	if (lock)
69	cur_lock \|= AVIVO_D1CURSOR_UPDATE_LOCK;	69	cur_lock \|= AVIVO_D1CURSOR_UPDATE_LOCK;
70	else	70	else
71	cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;	71	cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
72	WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);	72	WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
73	} else {	73	} else {
74	cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset);	74	cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset);
75	if (lock)	75	if (lock)
76	cur_lock \|= RADEON_CUR_LOCK;	76	cur_lock \|= RADEON_CUR_LOCK;
77	else	77	else
78	cur_lock &= ~RADEON_CUR_LOCK;	78	cur_lock &= ~RADEON_CUR_LOCK;
79	WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock);	79	WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock);
80	}	80	}
81	}	81	}
82		82
83	cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)	83	cursor_t* __stdcall select_cursor_kms(cursor_t *cursor)
84	{	84	{
85	struct radeon_device *rdev;	85	struct radeon_device *rdev;
86	struct radeon_crtc *radeon_crtc;	86	struct radeon_crtc *radeon_crtc;
87	cursor_t *old;	87	cursor_t *old;
88	uint32_t gpu_addr;	88	uint32_t gpu_addr;
89		89
90	rdev = (struct radeon_device *)os_display->ddev->dev_private;	90	rdev = (struct radeon_device *)os_display->ddev->dev_private;
91	radeon_crtc = to_radeon_crtc(os_display->crtc);	91	radeon_crtc = to_radeon_crtc(os_display->crtc);
92		92
93	old = os_display->cursor;	93	old = os_display->cursor;
94		94
95	os_display->cursor = cursor;	95	os_display->cursor = cursor;
96	gpu_addr = radeon_bo_gpu_offset(cursor->cobj);	96	gpu_addr = radeon_bo_gpu_offset(cursor->cobj);
97		97
98	if (ASIC_IS_DCE4(rdev)) {	98	if (ASIC_IS_DCE4(rdev)) {
99	WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,	99	WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,
100	0);	100	0);
101	WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,	101	WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
102	gpu_addr);	102	gpu_addr);
103	} else if (ASIC_IS_AVIVO(rdev)) {	103	} else if (ASIC_IS_AVIVO(rdev)) {
104	if (rdev->family >= CHIP_RV770)	104	if (rdev->family >= CHIP_RV770)
105	WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);	105	WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);
106	WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);	106	WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
107	}	107	}
108	else {	108	else {
109	radeon_crtc->legacy_cursor_offset = gpu_addr - rdev->mc.vram_start;	109	radeon_crtc->legacy_display_base_addr = gpu_addr - rdev->mc.vram_start;
110	/* offset is from DISP(2)_BASE_ADDRESS */	110	/* offset is from DISP(2)_BASE_ADDRESS */
111	WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset);	111	WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr);
112	}	112	}
113		113
114	return old;	114	return old;
115	};	115	};
116		116
117	void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y)	117	void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y)
118	{	118	{
119	struct radeon_device *rdev;	119	struct radeon_device *rdev;
120	rdev = (struct radeon_device *)os_display->ddev->dev_private;	120	rdev = (struct radeon_device *)os_display->ddev->dev_private;
121	struct drm_crtc *crtc = os_display->crtc;	121	struct drm_crtc *crtc = os_display->crtc;
122	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);	122	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
123		123
124	int hot_x = cursor->hot_x;	124	int hot_x = cursor->hot_x;
125	int hot_y = cursor->hot_y;	125	int hot_y = cursor->hot_y;
126	int w = 32;	126	int w = 32;
127		127
128	radeon_lock_cursor_kms(crtc, true);	128	radeon_lock_cursor_kms(crtc, true);
129		129
130	if (ASIC_IS_DCE4(rdev)) {	130	if (ASIC_IS_DCE4(rdev)) {
131	WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset,	131	WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset,
132	(x << 16) \| y);	132	(x << 16) \| y);
133	WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset,	133	WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset,
134	(hot_x << 16) \| hot_y);	134	(hot_x << 16) \| hot_y);
135	WREG32(EVERGREEN_CUR_SIZE + radeon_crtc->crtc_offset,	135	WREG32(EVERGREEN_CUR_SIZE + radeon_crtc->crtc_offset,
136	((w - 1) << 16) \| 31);	136	((w - 1) << 16) \| 31);
137	} else if (ASIC_IS_AVIVO(rdev)) {	137	} else if (ASIC_IS_AVIVO(rdev)) {
138	WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,	138	WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
139	(x << 16) \| y);	139	(x << 16) \| y);
140	WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset,	140	WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset,
141	(hot_x << 16) \| hot_y);	141	(hot_x << 16) \| hot_y);
142	WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,	142	WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
143	((w - 1) << 16) \| 31);	143	((w - 1) << 16) \| 31);
144	} else {	144	} else {
145	if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)	145	if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
146	y *= 2;	146	y *= 2;
147		147
148	uint32_t gpu_addr;	148	uint32_t gpu_addr;
149	int xorg =0, yorg=0;	149	int xorg =0, yorg=0;
150		150
151	x = x - hot_x;	151	x = x - hot_x;
152	y = y - hot_y;	152	y = y - hot_y;
153		153
154	if( x < 0 )	154	if( x < 0 )
155	{	155	{
156	xorg = -x + 1;	156	xorg = -x + 1;
157	x = 0;	157	x = 0;
158	}	158	}
159		159
160	if( y < 0 )	160	if( y < 0 )
161	{	161	{
162	yorg = -hot_y + 1;	162	yorg = -hot_y + 1;
163	y = 0;	163	y = 0;
164	};	164	};
165		165
166	WREG32(RADEON_CUR_HORZ_VERT_OFF,	166	WREG32(RADEON_CUR_HORZ_VERT_OFF,
167	(RADEON_CUR_LOCK \| (xorg << 16) \| yorg ));	167	(RADEON_CUR_LOCK \| (xorg << 16) \| yorg ));
168	WREG32(RADEON_CUR_HORZ_VERT_POSN,	168	WREG32(RADEON_CUR_HORZ_VERT_POSN,
169	(RADEON_CUR_LOCK \| (x << 16) \| y));	169	(RADEON_CUR_LOCK \| (x << 16) \| y));
170		170
171	gpu_addr = radeon_bo_gpu_offset(cursor->cobj);	171	gpu_addr = radeon_bo_gpu_offset(cursor->cobj);
172		172
173	/* offset is from DISP(2)_BASE_ADDRESS */	173	/* offset is from DISP(2)_BASE_ADDRESS */
174	WREG32(RADEON_CUR_OFFSET,	174	WREG32(RADEON_CUR_OFFSET,
175	(gpu_addr - rdev->mc.vram_start + (yorg * 256)));	175	(gpu_addr - rdev->mc.vram_start + (yorg * 256)));
176	}	176	}
177	radeon_lock_cursor_kms(crtc, false);	177	radeon_lock_cursor_kms(crtc, false);
178	}	178	}
179		179
180	static char manufacturer_name(unsigned char x)	180	static char manufacturer_name(unsigned char x)
181	{	181	{
182	static char name[4];	182	static char name[4];
183		183
184	name[0] = ((x[0] & 0x7C) >> 2) + '@';	184	name[0] = ((x[0] & 0x7C) >> 2) + '@';
185	name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@';	185	name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@';
186	name[2] = (x[1] & 0x1F) + '@';	186	name[2] = (x[1] & 0x1F) + '@';
187	name[3] = 0;	187	name[3] = 0;
188		188
189	return name;	189	return name;
190	}	190	}
191		191
192	static int set_mode(struct drm_device dev, struct drm_connector connector,	192	static int set_mode(struct drm_device dev, struct drm_connector connector,
193	struct drm_crtc crtc, videomode_t reqmode, bool strict)	193	struct drm_crtc crtc, videomode_t reqmode, bool strict)
194	{	194	{
195	struct drm_display_mode mode = NULL, tmpmode;	195	struct drm_display_mode mode = NULL, tmpmode;
196	struct drm_framebuffer *fb = NULL;	196	struct drm_framebuffer *fb = NULL;
197	struct drm_mode_set set;	197	struct drm_mode_set set;
198	const char *con_name;	198	const char *con_name;
199	unsigned hdisplay, vdisplay;	199	unsigned hdisplay, vdisplay;
200	int ret;	200	int ret;
201		201
202	drm_modeset_lock_all(dev);	202	drm_modeset_lock_all(dev);
203		203
204	list_for_each_entry(tmpmode, &connector->modes, head)	204	list_for_each_entry(tmpmode, &connector->modes, head)
205	{	205	{
206	if( (tmpmode->hdisplay == reqmode->width) &&	206	if( (tmpmode->hdisplay == reqmode->width) &&
207	(tmpmode->vdisplay == reqmode->height) &&	207	(tmpmode->vdisplay == reqmode->height) &&
208	(drm_mode_vrefresh(tmpmode) == reqmode->freq) )	208	(drm_mode_vrefresh(tmpmode) == reqmode->freq) )
209	{	209	{
210	mode = tmpmode;	210	mode = tmpmode;
211	goto do_set;	211	goto do_set;
212	}	212	}
213	};	213	};
214		214
215	if( (mode == NULL) && (strict == false) )	215	if( (mode == NULL) && (strict == false) )
216	{	216	{
217	list_for_each_entry(tmpmode, &connector->modes, head)	217	list_for_each_entry(tmpmode, &connector->modes, head)
218	{	218	{
219	if( (tmpmode->hdisplay == reqmode->width) &&	219	if( (tmpmode->hdisplay == reqmode->width) &&
220	(tmpmode->vdisplay == reqmode->height) )	220	(tmpmode->vdisplay == reqmode->height) )
221	{	221	{
222	mode = tmpmode;	222	mode = tmpmode;
223	goto do_set;	223	goto do_set;
224	}	224	}
225	};	225	};
226	};	226	};
227		227
228	DRM_ERROR("%s failed\n", __FUNCTION__);	228	DRM_ERROR("%s failed\n", __FUNCTION__);
229		229
230	return -1;	230	return -1;
231		231
232	do_set:	232	do_set:
233		233
234	con_name = connector->name;	234	con_name = connector->name;
235		235
236	DRM_DEBUG_KMS("set mode %d %d: crtc %d connector %s\n",	236	DRM_DEBUG_KMS("set mode %d %d: crtc %d connector %s\n",
237	reqmode->width, reqmode->height, crtc->base.id,	237	reqmode->width, reqmode->height, crtc->base.id,
238	con_name);	238	con_name);
239		239
240	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);	240	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
241		241
242	hdisplay = mode->hdisplay;	242	hdisplay = mode->hdisplay;
243	vdisplay = mode->vdisplay;	243	vdisplay = mode->vdisplay;
244		244
245	if (crtc->invert_dimensions)	-
246	swap(hdisplay, vdisplay);	-
247		-
248	fb = main_fb;	245	fb = main_fb;
249		246
250	fb->width = reqmode->width;	247	fb->width = reqmode->width;
251	fb->height = reqmode->height;	248	fb->height = reqmode->height;
252		249
253	fb->pitches[0] =	250	fb->pitches[0] =
254	fb->pitches[1] =	251	fb->pitches[1] =
255	fb->pitches[2] =	252	fb->pitches[2] =
256	fb->pitches[3] = radeon_align_pitch(dev->dev_private, reqmode->width, 32, false) * ((32 + 1) / 8);	253	fb->pitches[3] = radeon_align_pitch(dev->dev_private, reqmode->width, 32, false) * ((32 + 1) / 8);
257	fb->bits_per_pixel = 32;	254	fb->bits_per_pixel = 32;
258	fb->depth = 24;	255	fb->depth = 24;
259		256
260	crtc->enabled = true;	257	crtc->enabled = true;
261	os_display->crtc = crtc;	258	os_display->crtc = crtc;
262		259
263	set.crtc = crtc;	260	set.crtc = crtc;
264	set.x = 0;	261	set.x = 0;
265	set.y = 0;	262	set.y = 0;
266	set.mode = mode;	263	set.mode = mode;
267	set.connectors = &connector;	264	set.connectors = &connector;
268	set.num_connectors = 1;	265	set.num_connectors = 1;
269	set.fb = fb;	266	set.fb = fb;
270		267
271	ret = drm_mode_set_config_internal(&set);	268	ret = drm_mode_set_config_internal(&set);
272		269
273	drm_modeset_unlock_all(dev);	270	drm_modeset_unlock_all(dev);
274		271
275	select_cursor_kms(os_display->cursor);	272	select_cursor_kms(os_display->cursor);
276	radeon_show_cursor_kms(crtc);	273	radeon_show_cursor_kms(crtc);
277		274
278	if ( !ret )	275	if ( !ret )
279	{	276	{
280	os_display->width = fb->width;	277	os_display->width = fb->width;
281	os_display->height = fb->height;	278	os_display->height = fb->height;
282	os_display->vrefresh = drm_mode_vrefresh(mode);	279	os_display->vrefresh = drm_mode_vrefresh(mode);
283		280
284	sysSetScreen(fb->width, fb->height, fb->pitches[0]);	281	sysSetScreen(fb->width, fb->height, fb->pitches[0]);
285		282
286	DRM_DEBUG_KMS("new mode %d x %d pitch %d\n",	283	DRM_DEBUG_KMS("new mode %d x %d pitch %d\n",
287	fb->width, fb->height, fb->pitches[0]);	284	fb->width, fb->height, fb->pitches[0]);
288	}	285	}
289	else	286	else
290	DRM_ERROR("failed to set mode %d_%d on crtc %p\n",	287	DRM_ERROR("failed to set mode %d_%d on crtc %p\n",
291	fb->width, fb->height, crtc);	288	fb->width, fb->height, crtc);
292		289
293	return ret;	290	return ret;
294	}	291	}
295		292
296	static int count_connector_modes(struct drm_connector* connector)	293	static int count_connector_modes(struct drm_connector* connector)
297	{	294	{
298	struct drm_display_mode *mode;	295	struct drm_display_mode *mode;
299	int count = 0;	296	int count = 0;
300		297
301	list_for_each_entry(mode, &connector->modes, head)	298	list_for_each_entry(mode, &connector->modes, head)
302	{	299	{
303	count++;	300	count++;
304	};	301	};
305	return count;	302	return count;
306	};	303	};
307		304
308	static struct drm_crtc get_possible_crtc(struct drm_device dev, struct drm_encoder *encoder)	305	static struct drm_crtc get_possible_crtc(struct drm_device dev, struct drm_encoder *encoder)
309	{	306	{
310	struct drm_crtc *tmp_crtc;	307	struct drm_crtc *tmp_crtc;
311	int crtc_mask = 1;	308	int crtc_mask = 1;
312		309
313	list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head)	310	list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head)
314	{	311	{
315	if (encoder->possible_crtcs & crtc_mask)	312	if (encoder->possible_crtcs & crtc_mask)
316	{	313	{
317	encoder->crtc = tmp_crtc;	314	encoder->crtc = tmp_crtc;
318	DRM_DEBUG_KMS("use CRTC %p ID %d\n", tmp_crtc, tmp_crtc->base.id);	315	DRM_DEBUG_KMS("use CRTC %p ID %d\n", tmp_crtc, tmp_crtc->base.id);
319	return tmp_crtc;	316	return tmp_crtc;
320	};	317	};
321	crtc_mask <<= 1;	318	crtc_mask <<= 1;
322	};	319	};
323	return NULL;	320	return NULL;
324	};	321	};
325		322
326	static int choose_config(struct drm_device dev, struct drm_connector *boot_connector,	323	static int choose_config(struct drm_device dev, struct drm_connector *boot_connector,
327	struct drm_crtc **boot_crtc)	324	struct drm_crtc **boot_crtc)
328	{	325	{
329	struct drm_connector_helper_funcs *connector_funcs;	326	struct drm_connector_helper_funcs *connector_funcs;
330	struct drm_connector *connector;	327	struct drm_connector *connector;
331	struct drm_encoder *encoder;	328	struct drm_encoder *encoder;
332	struct drm_crtc *crtc;	329	struct drm_crtc *crtc;
333		330
334	list_for_each_entry(connector, &dev->mode_config.connector_list, head)	331	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
335	{	332	{
336	if( connector->status != connector_status_connected)	333	if( connector->status != connector_status_connected)
337	continue;	334	continue;
338		335
339	encoder = connector->encoder;	336	encoder = connector->encoder;
340		337
341	if(encoder == NULL)	338	if(encoder == NULL)
342	{	339	{
343	connector_funcs = connector->helper_private;	340	connector_funcs = connector->helper_private;
344	encoder = connector_funcs->best_encoder(connector);	341	encoder = connector_funcs->best_encoder(connector);
345		342
346	if( encoder == NULL)	343	if( encoder == NULL)
347	{	344	{
348	DRM_DEBUG_KMS("CONNECTOR %x ID: %d no active encoders\n",	345	DRM_DEBUG_KMS("CONNECTOR %x ID: %d no active encoders\n",
349	connector, connector->base.id);	346	connector, connector->base.id);
350	continue;	347	continue;
351	};	348	};
352	}	349	}
353		350
354	crtc = encoder->crtc;	351	crtc = encoder->crtc;
355	if(crtc == NULL)	352	if(crtc == NULL)
356	crtc = get_possible_crtc(dev, encoder);	353	crtc = get_possible_crtc(dev, encoder);
357		354
358	if(crtc != NULL)	355	if(crtc != NULL)
359	{	356	{
360	*boot_connector = connector;	357	*boot_connector = connector;
361	*boot_crtc = crtc;	358	*boot_crtc = crtc;
362	connector->encoder = encoder;	359	connector->encoder = encoder;
363	DRM_DEBUG_KMS("CONNECTOR %p ID:%d status:%d ENCODER %p ID: %d CRTC %p ID:%d\n",	360	DRM_DEBUG_KMS("CONNECTOR %p ID:%d status:%d ENCODER %p ID: %d CRTC %p ID:%d\n",
364	connector, connector->base.id, connector->status,	361	connector, connector->base.id, connector->status,
365	encoder, encoder->base.id, crtc, crtc->base.id );	362	encoder, encoder->base.id, crtc, crtc->base.id );
366	return 0;	363	return 0;
367	}	364	}
368	else	365	else
369	DRM_DEBUG_KMS("No CRTC for encoder %d\n", encoder->base.id);	366	DRM_DEBUG_KMS("No CRTC for encoder %d\n", encoder->base.id);
370		367
371	};	368	};
372		369
373	return -ENOENT;	370	return -ENOENT;
374	};	371	};
375		372
376	static int get_boot_mode(struct drm_connector connector, videomode_t usermode)	373	static int get_boot_mode(struct drm_connector connector, videomode_t usermode)
377	{	374	{
378	struct drm_display_mode *mode;	375	struct drm_display_mode *mode;
379		376
380	list_for_each_entry(mode, &connector->modes, head)	377	list_for_each_entry(mode, &connector->modes, head)
381	{	378	{
382	DRM_DEBUG_KMS("check mode w:%d h:%d %dHz\n",	379	DRM_DEBUG_KMS("check mode w:%d h:%d %dHz\n",
383	mode->hdisplay, mode->vdisplay,	380	mode->hdisplay, mode->vdisplay,
384	drm_mode_vrefresh(mode));	381	drm_mode_vrefresh(mode));
385		382
386	if( os_display->width == mode->hdisplay &&	383	if( os_display->width == mode->hdisplay &&
387	os_display->height == mode->vdisplay &&	384	os_display->height == mode->vdisplay &&
388	drm_mode_vrefresh(mode) == 60)	385	drm_mode_vrefresh(mode) == 60)
389	{	386	{
390	usermode->width = os_display->width;	387	usermode->width = os_display->width;
391	usermode->height = os_display->height;	388	usermode->height = os_display->height;
392	usermode->freq = 60;	389	usermode->freq = 60;
393	return 1;	390	return 1;
394	}	391	}
395	}	392	}
396	return 0;	393	return 0;
397	}	394	}
398		395
399	int init_display_kms(struct drm_device dev, videomode_t usermode)	396	int init_display_kms(struct drm_device dev, videomode_t usermode)
400	{	397	{
401	struct drm_connector_helper_funcs *connector_funcs;	398	struct drm_connector_helper_funcs *connector_funcs;
402	struct drm_connector *connector = NULL;	399	struct drm_connector *connector = NULL;
403	struct drm_crtc *crtc = NULL;	400	struct drm_crtc *crtc = NULL;
404	struct drm_framebuffer *fb;	401	struct drm_framebuffer *fb;
405		402
406	cursor_t *cursor;	403	cursor_t *cursor;
407	u32 ifl;	404	u32 ifl;
408	int ret;	405	int ret;
409		406
410	mutex_lock(&dev->mode_config.mutex);	407	mutex_lock(&dev->mode_config.mutex);
411		408
412	ret = choose_config(dev, &connector, &crtc);	409	ret = choose_config(dev, &connector, &crtc);
413	if(ret)	410	if(ret)
414	{	411	{
415	DRM_DEBUG_KMS("No active connectors!\n");	412	DRM_DEBUG_KMS("No active connectors!\n");
416	mutex_unlock(&dev->mode_config.mutex);	413	mutex_unlock(&dev->mode_config.mutex);
417	return -1;	414	return -1;
418	};	415	};
419		416
420	{	417	{
421	struct drm_display_mode tmp, native = NULL;	418	struct drm_display_mode tmp, native = NULL;
422	struct radeon_device *rdev = dev->dev_private;	419	struct radeon_device *rdev = dev->dev_private;
423		420
424	list_for_each_entry(tmp, &connector->modes, head) {	421	list_for_each_entry(tmp, &connector->modes, head) {
425	if (tmp->hdisplay > 16384 \|\|	422	if (tmp->hdisplay > 16384 \|\|
426	tmp->vdisplay > 16384)	423	tmp->vdisplay > 16384)
427	continue;	424	continue;
428	if (tmp->type & DRM_MODE_TYPE_PREFERRED)	425	if (tmp->type & DRM_MODE_TYPE_PREFERRED)
429	{	426	{
430	native = tmp;	427	native = tmp;
431	break;	428	break;
432	};	429	};
433	}	430	}
434		431
435	if( ASIC_IS_AVIVO(rdev) && native )	432	if( ASIC_IS_AVIVO(rdev) && native )
436	{	433	{
437	struct radeon_encoder *radeon_encoder = to_radeon_encoder(connector->encoder);	434	struct radeon_encoder *radeon_encoder = to_radeon_encoder(connector->encoder);
438	radeon_encoder->rmx_type = RMX_FULL;	435	radeon_encoder->rmx_type = RMX_FULL;
439	radeon_encoder->native_mode = *native;	436	radeon_encoder->native_mode = *native;
440	};	437	};
441	}	438	}
442		439
443	#if 0	440	#if 0
444	mutex_lock(&dev->object_name_lock);	441	mutex_lock(&dev->object_name_lock);
445	idr_preload(GFP_KERNEL);	442	idr_preload(GFP_KERNEL);
446		443
447	if (!main_fb_obj->name) {	444	if (!main_fb_obj->name) {
448	ret = idr_alloc(&dev->object_name_idr, &main_fb_obj, 1, 0, GFP_NOWAIT);	445	ret = idr_alloc(&dev->object_name_idr, &main_fb_obj, 1, 0, GFP_NOWAIT);
449		446
450	main_fb_obj->name = ret;	447	main_fb_obj->name = ret;
451		448
452	/* Allocate a reference for the name table. */	449	/* Allocate a reference for the name table. */
453	drm_gem_object_reference(main_fb_obj);	450	drm_gem_object_reference(main_fb_obj);
454		451
455	DRM_DEBUG_KMS("%s allocate fb name %d\n", __FUNCTION__, main_fb_obj->name );	452	DRM_DEBUG_KMS("%s allocate fb name %d\n", __FUNCTION__, main_fb_obj->name );
456	}	453	}
457		454
458	idr_preload_end();	455	idr_preload_end();
459	mutex_unlock(&dev->object_name_lock);	456	mutex_unlock(&dev->object_name_lock);
460	drm_gem_object_unreference(main_fb_obj);	457	drm_gem_object_unreference(main_fb_obj);
461	#endif	458	#endif
462		459
463	os_display = GetDisplay();	460	os_display = GetDisplay();
464	os_display->ddev = dev;	461	os_display->ddev = dev;
465	os_display->connector = connector;	462	os_display->connector = connector;
466	os_display->crtc = crtc;	463	os_display->crtc = crtc;
467		464
468	os_display->supported_modes = count_connector_modes(connector);	465	os_display->supported_modes = count_connector_modes(connector);
469		466
470	ifl = safe_cli();	467	ifl = safe_cli();
471	{	468	{
472	list_for_each_entry(cursor, &os_display->cursors, list)	469	list_for_each_entry(cursor, &os_display->cursors, list)
473	{	470	{
474	init_cursor(cursor);	471	init_cursor(cursor);
475	};	472	};
476		473
477	os_display->restore_cursor(0,0);	474	os_display->restore_cursor(0,0);
478	os_display->init_cursor = init_cursor;	475	os_display->init_cursor = init_cursor;
479	os_display->select_cursor = select_cursor_kms;	476	os_display->select_cursor = select_cursor_kms;
480	os_display->show_cursor = NULL;	477	os_display->show_cursor = NULL;
481	os_display->move_cursor = move_cursor_kms;	478	os_display->move_cursor = move_cursor_kms;
482	os_display->restore_cursor = restore_cursor;	479	os_display->restore_cursor = restore_cursor;
483	os_display->disable_mouse = disable_mouse;	480	os_display->disable_mouse = disable_mouse;
484	select_cursor_kms(os_display->cursor);	481	select_cursor_kms(os_display->cursor);
485	};	482	};
486	safe_sti(ifl);	483	safe_sti(ifl);
487		484
488		485
489	// dbgprintf("current mode %d x %d x %d\n",	486	// dbgprintf("current mode %d x %d x %d\n",
490	// os_display->width, os_display->height, os_display->vrefresh);	487	// os_display->width, os_display->height, os_display->vrefresh);
491	// dbgprintf("user mode mode %d x %d x %d\n",	488	// dbgprintf("user mode mode %d x %d x %d\n",
492	// usermode->width, usermode->height, usermode->freq);	489	// usermode->width, usermode->height, usermode->freq);
493		490
494	if( (usermode->width == 0) \|\|	491	if( (usermode->width == 0) \|\|
495	(usermode->height == 0))	492	(usermode->height == 0))
496	{	493	{
497	if( !get_boot_mode(connector, usermode))	494	if( !get_boot_mode(connector, usermode))
498	{	495	{
499	struct drm_display_mode *mode;	496	struct drm_display_mode *mode;
500		497

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/radeon/rdisplay_kms.c – Rev 5354 → 6104