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Rev 2175 Rev 2997
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    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
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    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
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    r = radeon_bo_create(rdev, CURSOR_WIDTH*CURSOR_HEIGHT*4,
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    r = radeon_bo_create(rdev, CURSOR_WIDTH*CURSOR_HEIGHT*4,
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                     PAGE_SIZE, false, RADEON_GEM_DOMAIN_VRAM, &cursor->robj);
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                     PAGE_SIZE, false, RADEON_GEM_DOMAIN_VRAM, NULL, &cursor->robj);
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    if (unlikely(r != 0))
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    if (unlikely(r != 0))
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    kfree(info);
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    kfree(info);
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}
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}
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/* 23 bits of float fractional data */
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#define I2F_FRAC_BITS  23
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#define I2F_MASK ((1 << I2F_FRAC_BITS) - 1)
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/*
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 * Converts unsigned integer into 32-bit IEEE floating point representation.
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 * Will be exact from 0 to 2^24.  Above that, we round towards zero
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 * as the fractional bits will not fit in a float.  (It would be better to
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 * round towards even as the fpu does, but that is slower.)
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 */
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__pure uint32_t int2float(uint32_t x)
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{
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    uint32_t msb, exponent, fraction;
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    /* Zero is special */
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    if (!x) return 0;
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    /* Get location of the most significant bit */
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    msb = __fls(x);
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    /*
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     * Use a rotate instead of a shift because that works both leftwards
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     * and rightwards due to the mod(32) behaviour.  This means we don't
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     * need to check to see if we are above 2^24 or not.
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     */
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    fraction = ror32(x, (msb - I2F_FRAC_BITS) & 0x1f) & I2F_MASK;
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    exponent = (127 + msb) << I2F_FRAC_BITS;
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    return fraction + exponent;
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}