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Rev 1963 Rev 2004
Line 77... Line 77...
77 
    KernelFree(cursor->data);
 77 
    KernelFree(cursor->data);
78 
    __DestroyObject(cursor);
 78 
    __DestroyObject(cursor);
79 
};
 79 
};
80 
 
 80 
 
Line 81... Line -...
81 
 
 - 
 
82 
static void radeon_show_cursor()
 81 
static void radeon_show_cursor()
83 
{
 82 
{
84 
    struct radeon_device *rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
 83 
    struct radeon_device *rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
Line -... Line 84...
- 
 
 84 
 
85 
 
 85 
 
- 
 
 86 
    if (ASIC_IS_DCE4(rdev)) {
- 
 
 87 
        WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL);
- 
 
 88 
        WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN |
- 
 
 89 
               EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT));
86 
    if (ASIC_IS_AVIVO(rdev)) {
 90 
    } else if (ASIC_IS_AVIVO(rdev)) {
87 
        WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL);
 91 
        WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL);
88 
        WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
 92 
        WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
89 
                 (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
 93 
                 (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
90 
    } else {
 94 
    } else {
Line 107... Line 111...
107 
 
 111 
 
Line 108... Line 112...
108 
    rdisplay->cursor = cursor;
 112 
    rdisplay->cursor = cursor;
109 
    gpu_addr = radeon_bo_gpu_offset(cursor->robj);
 113 
    gpu_addr = radeon_bo_gpu_offset(cursor->robj);
Line -... Line 114...
- 
 
 114 
 
- 
 
 115 
    if (ASIC_IS_DCE4(rdev))
- 
 
 116 
    {
- 
 
 117 
        WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH, 0);
- 
 
 118 
        WREG32(EVERGREEN_CUR_SURFACE_ADDRESS, gpu_addr);
110 
 
 119 
    }
- 
 
 120 
    else if (ASIC_IS_AVIVO(rdev))
- 
 
 121 
    {
- 
 
 122 
        if (rdev->family >= CHIP_RV770)
111 
    if (ASIC_IS_AVIVO(rdev))
 123 
            WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);
- 
 
 124 
        WREG32(AVIVO_D1CUR_SURFACE_ADDRESS,  gpu_addr);
112 
        WREG32(AVIVO_D1CUR_SURFACE_ADDRESS,  gpu_addr);
 125 
    }
113 
    else {
 126 
    else {
114 
        WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_start);
 127 
        WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_start);
Line 115... Line 128...
115 
    }
 128 
    }
Line 124... Line 137...
124 
    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
 137 
    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
Line 125... Line 138...
125 
 
 138 
 
Line -... Line 139...
- 
 
 139 
    uint32_t cur_lock;
- 
 
 140 
 
- 
 
 141 
	if (ASIC_IS_DCE4(rdev)) {
- 
 
 142 
		cur_lock = RREG32(EVERGREEN_CUR_UPDATE);
- 
 
 143 
		if (lock)
- 
 
 144 
			cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK;
- 
 
 145 
		else
126 
    uint32_t cur_lock;
 146 
			cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;
127 
 
 147 
        WREG32(EVERGREEN_CUR_UPDATE, cur_lock);
128 
    if (ASIC_IS_AVIVO(rdev)) {
 148 
	} else if (ASIC_IS_AVIVO(rdev)) {
129 
        cur_lock = RREG32(AVIVO_D1CUR_UPDATE);
 149 
        cur_lock = RREG32(AVIVO_D1CUR_UPDATE);
130 
        if (lock)
 150 
        if (lock)
131 
            cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
 151 
            cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
Line 149... Line 169...
149 
    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
 169 
    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
150 
 
 170 
 
Line 151... Line 171...
151 
    int hot_x = cursor->hot_x;
 171 
    int hot_x = cursor->hot_x;
152 
    int hot_y = cursor->hot_y;
 172 
    int hot_y = cursor->hot_y;
- 
 
 173 
    int w     = 32;
Line 153... Line 174...
153 
 
 174 
 
154 
    radeon_lock_cursor(true);
 - 
 
155 
    if (ASIC_IS_AVIVO(rdev))
 - 
 
156 
    {
 - 
 
Line -... Line 175...
- 
 
 175 
    radeon_lock_cursor(true);
- 
 
 176 
 
- 
 
 177 
    if (ASIC_IS_DCE4(rdev)) {
- 
 
 178 
        WREG32(EVERGREEN_CUR_POSITION,(x << 16) | y);
- 
 
 179 
        WREG32(EVERGREEN_CUR_HOT_SPOT, (hot_x << 16) | hot_y);
157 
        int w = 32;
 180 
        WREG32(EVERGREEN_CUR_SIZE, ((w - 1) << 16) | 31);
158 
 
 181 
    } else if (ASIC_IS_AVIVO(rdev)) {
159 
        WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y);
 182 
        WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y);
160 
        WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y);
 183 
        WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y);