Rev 1428 | Rev 1877 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1428 | Rev 1430 | ||
|---|---|---|---|
| Line 110... | Line 110... | ||
| 110 | 110 | ||
| Line 111... | Line 111... | ||
| 111 | if (ASIC_IS_AVIVO(rdev)) |
111 | if (ASIC_IS_AVIVO(rdev)) |
| 112 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS, gpu_addr); |
112 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS, gpu_addr); |
| 113 | else { |
113 | else { |
| 114 | WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_location); |
114 | WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_start); |
| 115 | } |
115 | } |
| Line 116... | Line 116... | ||
| 116 | 116 | ||
| 117 | return old; |
117 | return old; |
| Line 187... | Line 187... | ||
| 187 | gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
187 | gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
| Line 188... | Line 188... | ||
| 188 | 188 | ||
| 189 | /* offset is from DISP(2)_BASE_ADDRESS */ |
189 | /* offset is from DISP(2)_BASE_ADDRESS */ |
| 190 | WREG32(RADEON_CUR_OFFSET, |
190 | WREG32(RADEON_CUR_OFFSET, |
| 191 | (gpu_addr - rdev->mc.vram_location + (yorg * 256))); |
191 | (gpu_addr - rdev->mc.vram_start + (yorg * 256))); |
| 192 | } |
192 | } |
| 193 | radeon_lock_cursor(false); |
193 | radeon_lock_cursor(false); |
| Line 194... | Line 194... | ||
| 194 | } |
194 | } |
| Line 294... | Line 294... | ||
| 294 | 294 | ||
| Line 295... | Line 295... | ||
| 295 | ENTER(); |
295 | ENTER(); |
| Line 296... | Line 296... | ||
| 296 | 296 | ||
| 297 | pitch = (1024*4)/64; |
297 | pitch = (1024*4)/64; |
| Line 298... | Line 298... | ||
| 298 | offset = rdev->mc.vram_location; |
298 | offset = rdev->mc.vram_start; |
| 299 | 299 | ||
| 300 | r = radeon_ring_lock(rdev, 16); |
300 | r = radeon_ring_lock(rdev, 16); |
| 301 | if (r) { |
301 | if (r) { |
| Line 2209... | Line 2209... | ||
| 2209 | 2209 | ||
| Line 2210... | Line 2210... | ||
| 2210 | ENTER(); |
2210 | ENTER(); |
| Line 2211... | Line 2211... | ||
| 2211 | 2211 | ||
| 2212 | pitch = (1024*4)/64; |
2212 | pitch = (1024*4)/64; |
| 2213 | offset = rdev->mc.vram_location; |
- | |
| 2214 | 2213 | offset = rdev->mc.vram_start; |
|
| 2215 | ps_size = R600_solid_ps(rdev, ps_shader); |
2214 | ps_size = R600_solid_ps(rdev, ps_shader); |
| Line 2216... | Line 2215... | ||
| 2216 | vs_size = R600_solid_vs(rdev, vs_shader); |
2215 | vs_size = R600_solid_vs(rdev, vs_shader); |
| 2217 | 2216 | ||
| Line 2353... | Line 2352... | ||
| 2353 | cp_set_surface_sync(rdev, PACKET3_SH_ACTION_ENA, 512, gpu_addr); |
2352 | cp_set_surface_sync(rdev, PACKET3_SH_ACTION_ENA, 512, gpu_addr); |
| 2354 | 2353 | ||
| Line 2355... | Line 2354... | ||
| 2355 | 2354 | ||
| 2356 | set_render_target(rdev, COLOR_8_8_8_8, 1024, 768, /* FIXME */ |
2355 | set_render_target(rdev, COLOR_8_8_8_8, 1024, 768, /* FIXME */ |
| Line 2357... | Line 2356... | ||
| 2357 | rdev->mc.vram_location); |
2356 | rdev->mc.vram_start); |
| Line 2358... | Line 2357... | ||
| 2358 | 2357 | ||