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Rev 5271 | Rev 6104 | ||
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Line 130... | Line 130... | ||
130 | man->func = &ttm_bo_manager_func; |
130 | man->func = &ttm_bo_manager_func; |
131 | man->gpu_offset = rdev->mc.gtt_start; |
131 | man->gpu_offset = rdev->mc.gtt_start; |
132 | man->available_caching = TTM_PL_MASK_CACHING; |
132 | man->available_caching = TTM_PL_MASK_CACHING; |
133 | man->default_caching = TTM_PL_FLAG_CACHED; |
133 | man->default_caching = TTM_PL_FLAG_CACHED; |
134 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; |
134 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; |
135 | #if __OS_HAS_AGP |
135 | #if IS_ENABLED(CONFIG_AGP) |
136 | if (rdev->flags & RADEON_IS_AGP) { |
136 | if (rdev->flags & RADEON_IS_AGP) { |
137 | if (!rdev->ddev->agp) { |
137 | if (!rdev->ddev->agp) { |
138 | DRM_ERROR("AGP is not enabled for memory type %u\n", |
138 | DRM_ERROR("AGP is not enabled for memory type %u\n", |
139 | (unsigned)type); |
139 | (unsigned)type); |
140 | return -EINVAL; |
140 | return -EINVAL; |
Line 445... | Line 445... | ||
445 | switch (mem->mem_type) { |
445 | switch (mem->mem_type) { |
446 | case TTM_PL_SYSTEM: |
446 | case TTM_PL_SYSTEM: |
447 | /* system memory */ |
447 | /* system memory */ |
448 | return 0; |
448 | return 0; |
449 | case TTM_PL_TT: |
449 | case TTM_PL_TT: |
450 | #if __OS_HAS_AGP |
450 | #if IS_ENABLED(CONFIG_AGP) |
451 | if (rdev->flags & RADEON_IS_AGP) { |
451 | if (rdev->flags & RADEON_IS_AGP) { |
452 | /* RADEON_IS_AGP is set only if AGP is active */ |
452 | /* RADEON_IS_AGP is set only if AGP is active */ |
453 | mem->bus.offset = mem->start << PAGE_SHIFT; |
453 | mem->bus.offset = mem->start << PAGE_SHIFT; |
454 | mem->bus.base = rdev->mc.agp_base; |
454 | mem->bus.base = rdev->mc.agp_base; |
455 | mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; |
455 | mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; |
Line 563... | Line 563... | ||
563 | { |
563 | { |
564 | struct radeon_device *rdev; |
564 | struct radeon_device *rdev; |
565 | struct radeon_ttm_tt *gtt; |
565 | struct radeon_ttm_tt *gtt; |
Line 566... | Line 566... | ||
566 | 566 | ||
567 | rdev = radeon_get_rdev(bdev); |
567 | rdev = radeon_get_rdev(bdev); |
568 | #if __OS_HAS_AGP |
568 | #if IS_ENABLED(CONFIG_AGP) |
569 | if (rdev->flags & RADEON_IS_AGP) { |
569 | if (rdev->flags & RADEON_IS_AGP) { |
570 | return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge, |
570 | return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge, |
571 | size, page_flags, dummy_read_page); |
571 | size, page_flags, dummy_read_page); |
572 | } |
572 | } |
Line 609... | Line 609... | ||
609 | ttm->state = tt_unbound; |
609 | ttm->state = tt_unbound; |
610 | return 0; |
610 | return 0; |
611 | } |
611 | } |
Line 612... | Line 612... | ||
612 | 612 | ||
613 | rdev = radeon_get_rdev(ttm->bdev); |
613 | rdev = radeon_get_rdev(ttm->bdev); |
614 | #if __OS_HAS_AGP |
614 | #if IS_ENABLED(CONFIG_AGP) |
615 | if (rdev->flags & RADEON_IS_AGP) { |
615 | if (rdev->flags & RADEON_IS_AGP) { |
616 | return ttm_agp_tt_populate(ttm); |
616 | return ttm_agp_tt_populate(ttm); |
617 | } |
617 | } |
Line 646... | Line 646... | ||
646 | 646 | ||
647 | if (slave) |
647 | if (slave) |
Line 648... | Line 648... | ||
648 | return; |
648 | return; |
649 | 649 | ||
650 | rdev = radeon_get_rdev(ttm->bdev); |
650 | rdev = radeon_get_rdev(ttm->bdev); |
651 | #if __OS_HAS_AGP |
651 | #if IS_ENABLED(CONFIG_AGP) |
652 | if (rdev->flags & RADEON_IS_AGP) { |
652 | if (rdev->flags & RADEON_IS_AGP) { |
653 | ttm_agp_tt_unpopulate(ttm); |
653 | ttm_agp_tt_unpopulate(ttm); |
654 | return; |
654 | return; |