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Rev 2997 | Rev 3764 | ||
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Line 72... | Line 72... | ||
72 | static int radeon_ttm_global_init(struct radeon_device *rdev) |
72 | static int radeon_ttm_global_init(struct radeon_device *rdev) |
73 | { |
73 | { |
74 | struct drm_global_reference *global_ref; |
74 | struct drm_global_reference *global_ref; |
75 | int r; |
75 | int r; |
Line -... | Line 76... | ||
- | 76 | ||
- | 77 | ENTER(); |
|
76 | 78 | ||
77 | rdev->mman.mem_global_referenced = false; |
79 | rdev->mman.mem_global_referenced = false; |
78 | global_ref = &rdev->mman.mem_global_ref; |
80 | global_ref = &rdev->mman.mem_global_ref; |
79 | global_ref->global_type = DRM_GLOBAL_TTM_MEM; |
81 | global_ref->global_type = DRM_GLOBAL_TTM_MEM; |
80 | global_ref->size = sizeof(struct ttm_mem_global); |
82 | global_ref->size = sizeof(struct ttm_mem_global); |
Line 100... | Line 102... | ||
100 | drm_global_item_unref(&rdev->mman.mem_global_ref); |
102 | drm_global_item_unref(&rdev->mman.mem_global_ref); |
101 | return r; |
103 | return r; |
102 | } |
104 | } |
Line 103... | Line 105... | ||
103 | 105 | ||
- | 106 | rdev->mman.mem_global_referenced = true; |
|
- | 107 | ||
- | 108 | LEAVE(); |
|
104 | rdev->mman.mem_global_referenced = true; |
109 | |
105 | return 0; |
110 | return 0; |
Line -... | Line 111... | ||
- | 111 | } |
|
106 | } |
112 | |
107 | 113 | ||
108 | 114 | ||
109 | static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags) |
115 | static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags) |
Line 110... | Line 116... | ||
110 | { |
116 | { |
111 | return 0; |
117 | return 0; |
112 | } |
118 | } |
113 | 119 | ||
Line -... | Line 120... | ||
- | 120 | static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, |
|
- | 121 | struct ttm_mem_type_manager *man) |
|
114 | static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, |
122 | { |
Line 115... | Line 123... | ||
115 | struct ttm_mem_type_manager *man) |
123 | struct radeon_device *rdev; |
116 | { |
124 | |
117 | struct radeon_device *rdev; |
125 | ENTER(); |
Line 157... | Line 165... | ||
157 | break; |
165 | break; |
158 | default: |
166 | default: |
159 | DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); |
167 | DRM_ERROR("Unsupported memory type %u\n", (unsigned)type); |
160 | return -EINVAL; |
168 | return -EINVAL; |
161 | } |
169 | } |
- | 170 | ||
- | 171 | LEAVE(); |
|
- | 172 | ||
- | 173 | return 0; |
|
- | 174 | } |
|
- | 175 | ||
- | 176 | static void radeon_evict_flags(struct ttm_buffer_object *bo, |
|
- | 177 | struct ttm_placement *placement) |
|
- | 178 | { |
|
- | 179 | struct radeon_bo *rbo; |
|
- | 180 | static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; |
|
- | 181 | ||
- | 182 | if (!radeon_ttm_bo_is_radeon_bo(bo)) { |
|
- | 183 | placement->fpfn = 0; |
|
- | 184 | placement->lpfn = 0; |
|
- | 185 | placement->placement = &placements; |
|
- | 186 | placement->busy_placement = &placements; |
|
- | 187 | placement->num_placement = 1; |
|
- | 188 | placement->num_busy_placement = 1; |
|
- | 189 | return; |
|
- | 190 | } |
|
- | 191 | rbo = container_of(bo, struct radeon_bo, tbo); |
|
- | 192 | switch (bo->mem.mem_type) { |
|
- | 193 | case TTM_PL_VRAM: |
|
- | 194 | if (rbo->rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready == false) |
|
- | 195 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); |
|
- | 196 | else |
|
- | 197 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); |
|
- | 198 | break; |
|
- | 199 | case TTM_PL_TT: |
|
- | 200 | default: |
|
- | 201 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); |
|
- | 202 | } |
|
- | 203 | *placement = rbo->placement; |
|
- | 204 | } |
|
- | 205 | ||
- | 206 | static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp) |
|
- | 207 | { |
|
- | 208 | return 0; |
|
- | 209 | } |
|
- | 210 | ||
- | 211 | static void radeon_move_null(struct ttm_buffer_object *bo, |
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- | 212 | struct ttm_mem_reg *new_mem) |
|
- | 213 | { |
|
- | 214 | struct ttm_mem_reg *old_mem = &bo->mem; |
|
- | 215 | ||
- | 216 | BUG_ON(old_mem->mm_node != NULL); |
|
- | 217 | *old_mem = *new_mem; |
|
- | 218 | new_mem->mm_node = NULL; |
|
- | 219 | } |
|
- | 220 | ||
- | 221 | static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) |
|
- | 222 | { |
|
- | 223 | } |
|
- | 224 | ||
- | 225 | static int radeon_sync_obj_wait(void *sync_obj, bool lazy, bool interruptible) |
|
- | 226 | { |
|
- | 227 | return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible); |
|
- | 228 | } |
|
- | 229 | ||
- | 230 | static int radeon_sync_obj_flush(void *sync_obj) |
|
- | 231 | { |
|
- | 232 | return 0; |
|
- | 233 | } |
|
- | 234 | ||
- | 235 | static void radeon_sync_obj_unref(void **sync_obj) |
|
- | 236 | { |
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- | 237 | radeon_fence_unref((struct radeon_fence **)sync_obj); |
|
- | 238 | } |
|
- | 239 | ||
- | 240 | static void *radeon_sync_obj_ref(void *sync_obj) |
|
- | 241 | { |
|
- | 242 | return radeon_fence_ref((struct radeon_fence *)sync_obj); |
|
- | 243 | } |
|
- | 244 | ||
- | 245 | static bool radeon_sync_obj_signaled(void *sync_obj) |
|
- | 246 | { |
|
- | 247 | return radeon_fence_signaled((struct radeon_fence *)sync_obj); |
|
- | 248 | } |
|
- | 249 | ||
- | 250 | /* |
|
- | 251 | * TTM backend functions. |
|
- | 252 | */ |
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- | 253 | struct radeon_ttm_tt { |
|
- | 254 | struct ttm_dma_tt ttm; |
|
- | 255 | struct radeon_device *rdev; |
|
- | 256 | u64 offset; |
|
- | 257 | }; |
|
- | 258 | ||
- | 259 | static int radeon_ttm_backend_bind(struct ttm_tt *ttm, |
|
- | 260 | struct ttm_mem_reg *bo_mem) |
|
- | 261 | { |
|
- | 262 | struct radeon_ttm_tt *gtt = (void*)ttm; |
|
- | 263 | int r; |
|
- | 264 | ||
- | 265 | gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); |
|
- | 266 | if (!ttm->num_pages) { |
|
- | 267 | WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", |
|
- | 268 | ttm->num_pages, bo_mem, ttm); |
|
- | 269 | } |
|
- | 270 | r = radeon_gart_bind(gtt->rdev, gtt->offset, |
|
- | 271 | ttm->num_pages, ttm->pages, gtt->ttm.dma_address); |
|
- | 272 | if (r) { |
|
- | 273 | DRM_ERROR("failed to bind %lu pages at 0x%08X\n", |
|
- | 274 | ttm->num_pages, (unsigned)gtt->offset); |
|
- | 275 | return r; |
|
- | 276 | } |
|
- | 277 | return 0; |
|
- | 278 | } |
|
- | 279 | ||
- | 280 | static int radeon_ttm_backend_unbind(struct ttm_tt *ttm) |
|
- | 281 | { |
|
- | 282 | struct radeon_ttm_tt *gtt = (void *)ttm; |
|
- | 283 | ||
- | 284 | radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages); |
|
162 | return 0; |
285 | return 0; |
163 | } |
286 | } |
Line -... | Line 287... | ||
- | 287 | ||
- | 288 | static void radeon_ttm_backend_destroy(struct ttm_tt *ttm) |
|
- | 289 | { |
|
- | 290 | struct radeon_ttm_tt *gtt = (void *)ttm; |
|
- | 291 | ||
- | 292 | ttm_dma_tt_fini(>t->ttm); |
|
- | 293 | kfree(gtt); |
|
- | 294 | } |
|
- | 295 | ||
- | 296 | static struct ttm_backend_func radeon_backend_func = { |
|
- | 297 | .bind = &radeon_ttm_backend_bind, |
|
- | 298 | .unbind = &radeon_ttm_backend_unbind, |
|
- | 299 | .destroy = &radeon_ttm_backend_destroy, |
|
- | 300 | }; |
|
- | 301 | ||
- | 302 | static struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev, |
|
- | 303 | unsigned long size, uint32_t page_flags, |
|
- | 304 | struct page *dummy_read_page) |
|
- | 305 | { |
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- | 306 | struct radeon_device *rdev; |
|
- | 307 | struct radeon_ttm_tt *gtt; |
|
- | 308 | ||
- | 309 | rdev = radeon_get_rdev(bdev); |
|
- | 310 | #if __OS_HAS_AGP |
|
- | 311 | if (rdev->flags & RADEON_IS_AGP) { |
|
- | 312 | return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge, |
|
- | 313 | size, page_flags, dummy_read_page); |
|
- | 314 | } |
|
- | 315 | #endif |
|
- | 316 | ||
- | 317 | gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); |
|
- | 318 | if (gtt == NULL) { |
|
- | 319 | return NULL; |
|
- | 320 | } |
|
- | 321 | gtt->ttm.ttm.func = &radeon_backend_func; |
|
- | 322 | gtt->rdev = rdev; |
|
- | 323 | if (ttm_dma_tt_init(>t->ttm, bdev, size, page_flags, dummy_read_page)) { |
|
- | 324 | kfree(gtt); |
|
- | 325 | return NULL; |
|
- | 326 | } |
|
- | 327 | return >t->ttm.ttm; |
|
- | 328 | } |
|
164 | 329 | ||
- | 330 | static struct ttm_bo_driver radeon_bo_driver = { |
|
- | 331 | .ttm_tt_create = &radeon_ttm_tt_create, |
|
165 | static struct ttm_bo_driver radeon_bo_driver = { |
332 | // .ttm_tt_populate = &radeon_ttm_tt_populate, |
166 | // .create_ttm_backend_entry = &radeon_create_ttm_backend_entry, |
333 | // .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, |
167 | // .invalidate_caches = &radeon_invalidate_caches, |
334 | // .invalidate_caches = &radeon_invalidate_caches, |
168 | .init_mem_type = &radeon_init_mem_type, |
335 | .init_mem_type = &radeon_init_mem_type, |
169 | // .evict_flags = &radeon_evict_flags, |
336 | // .evict_flags = &radeon_evict_flags, |
170 | // .move = &radeon_bo_move, |
337 | // .move = &radeon_bo_move, |
Line 174... | Line 341... | ||
174 | // .sync_obj_flush = &radeon_sync_obj_flush, |
341 | // .sync_obj_flush = &radeon_sync_obj_flush, |
175 | // .sync_obj_unref = &radeon_sync_obj_unref, |
342 | // .sync_obj_unref = &radeon_sync_obj_unref, |
176 | // .sync_obj_ref = &radeon_sync_obj_ref, |
343 | // .sync_obj_ref = &radeon_sync_obj_ref, |
177 | // .move_notify = &radeon_bo_move_notify, |
344 | // .move_notify = &radeon_bo_move_notify, |
178 | // .fault_reserve_notify = &radeon_bo_fault_reserve_notify, |
345 | // .fault_reserve_notify = &radeon_bo_fault_reserve_notify, |
- | 346 | // .io_mem_reserve = &radeon_ttm_io_mem_reserve, |
|
- | 347 | // .io_mem_free = &radeon_ttm_io_mem_free, |
|
179 | }; |
348 | }; |
Line 180... | Line 349... | ||
180 | 349 | ||
181 | int radeon_ttm_init(struct radeon_device *rdev) |
350 | int radeon_ttm_init(struct radeon_device *rdev) |
182 | { |
351 | { |
Line -... | Line 352... | ||
- | 352 | int r; |
|
- | 353 | ||
183 | int r; |
354 | ENTER(); |
184 | 355 | ||
185 | r = radeon_ttm_global_init(rdev); |
356 | r = radeon_ttm_global_init(rdev); |
186 | if (r) { |
357 | if (r) { |
187 | return r; |
358 | return r; |
Line 200... | Line 371... | ||
200 | rdev->mc.real_vram_size >> PAGE_SHIFT); |
371 | rdev->mc.real_vram_size >> PAGE_SHIFT); |
201 | if (r) { |
372 | if (r) { |
202 | DRM_ERROR("Failed initializing VRAM heap.\n"); |
373 | DRM_ERROR("Failed initializing VRAM heap.\n"); |
203 | return r; |
374 | return r; |
204 | } |
375 | } |
- | 376 | ||
205 | r = radeon_bo_create(rdev, NULL, 256 * 1024, true, |
377 | // r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, |
206 | RADEON_GEM_DOMAIN_VRAM, |
378 | // RADEON_GEM_DOMAIN_VRAM, |
207 | &rdev->stollen_vga_memory); |
379 | // NULL, &rdev->stollen_vga_memory); |
208 | if (r) { |
380 | // if (r) { |
209 | return r; |
381 | // return r; |
210 | } |
382 | // } |
211 | r = radeon_bo_reserve(rdev->stollen_vga_memory, false); |
383 | // r = radeon_bo_reserve(rdev->stollen_vga_memory, false); |
212 | if (r) |
384 | // if (r) |
213 | return r; |
385 | // return r; |
214 | r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); |
386 | // r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); |
215 | radeon_bo_unreserve(rdev->stollen_vga_memory); |
387 | // radeon_bo_unreserve(rdev->stollen_vga_memory); |
216 | if (r) { |
388 | // if (r) { |
217 | radeon_bo_unref(&rdev->stollen_vga_memory); |
389 | // radeon_bo_unref(&rdev->stollen_vga_memory); |
218 | return r; |
390 | // return r; |
- | 391 | // } |
|
219 | } |
392 | |
220 | DRM_INFO("radeon: %uM of VRAM memory ready\n", |
393 | DRM_INFO("radeon: %uM of VRAM memory ready\n", |
221 | (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); |
394 | (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); |
222 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, |
395 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, |
223 | rdev->mc.gtt_size >> PAGE_SHIFT); |
396 | rdev->mc.gtt_size >> PAGE_SHIFT); |
224 | if (r) { |
397 | if (r) { |
225 | DRM_ERROR("Failed initializing GTT heap.\n"); |
398 | DRM_ERROR("Failed initializing GTT heap.\n"); |
226 | return r; |
399 | return r; |
227 | } |
400 | } |
228 | DRM_INFO("radeon: %uM of GTT memory ready.\n", |
401 | DRM_INFO("radeon: %uM of GTT memory ready.\n", |
229 | (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); |
402 | (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); |
230 | if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) { |
- | |
231 | rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping; |
403 | rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping; |
232 | } |
- | |
Line 233... | Line -... | ||
233 | - | ||
234 | r = radeon_ttm_debugfs_init(rdev); |
- | |
235 | if (r) { |
- | |
236 | DRM_ERROR("Failed to init debugfs\n"); |
404 | |
237 | return r; |
405 | LEAVE(); |
238 | } |
406 | |
239 | return 0; |
407 | return 0; |
Line 240... | Line -... | ||
240 | } |
- | |
241 | - | ||
Line -... | Line 408... | ||
- | 408 | } |
|
- | 409 | ||
- | 410 | ||
- | 411 | /* this should only be called at bootup or when userspace |
|
- | 412 | * isn't running */ |
|
Line -... | Line 413... | ||
- | 413 | void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) |
|
- | 414 | { |
|
Line -... | Line 415... | ||
- | 415 | struct ttm_mem_type_manager *man; |
|
- | 416 | ||
- | 417 | if (!rdev->mman.initialized) |
|
- | 418 | return; |
|
Line -... | Line 419... | ||
- | 419 | ||
- | 420 | man = &rdev->mman.bdev.man[TTM_PL_VRAM]; |
|
Line -... | Line 421... | ||
- | 421 | /* this just adjusts TTM size idea, which sets lpfn to the correct value */ |
|
Line -... | Line 422... | ||
- | 422 | man->size = size >> PAGE_SHIFT; |
|
- | 423 | } |
|
- | 424 | ||
- | 425 | static struct vm_operations_struct radeon_ttm_vm_ops; |
|
Line -... | Line 426... | ||
- | 426 | static const struct vm_operations_struct *ttm_vm_ops = NULL; |
|
- | 427 | ||
- | 428 | #if 0 |
|
- | 429 | ||
- | 430 | radeon_bo_init |
|
Line -... | Line 431... | ||
- | 431 | { |
|
- | 432 | <6>[drm] Detected VRAM RAM=1024M, BAR=256M |
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Line -... | Line 433... | ||
- | 433 | <6>[drm] RAM width 128bits DDR |
|
- | 434 | ||
- | 435 | radeon_ttm_init |
|
- | 436 | { |
|
- | 437 | radeon_ttm_global_init |
|
- | 438 | { |
|
- | 439 | radeon_ttm_mem_global_init |
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Line -... | Line 440... | ||
- | 440 | ||
- | 441 | ttm_bo_global_init |
|
- | 442 | } |
|
Line -... | Line 443... | ||
- | 443 | ||
- | 444 | ttm_bo_device_init |
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Line -... | Line 445... | ||
- | 445 | { |
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Line -... | Line 446... | ||
- | 446 | ttm_bo_init_mm |
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- | 447 | { |
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- | 448 | radeon_init_mem_type |
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Line -... | Line 449... | ||
- | 449 | }; |
|
- | 450 | } |
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Line -... | Line 451... | ||
- | 451 | ||
- | 452 | ttm_bo_init_mm |
|
- | 453 | { |
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Line -... | Line 454... | ||
- | 454 | radeon_init_mem_type |