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Rev 3120 | Rev 5078 | ||
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Line 47... | Line 47... | ||
47 | static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo); |
47 | static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo); |
48 | static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager); |
48 | static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager); |
Line 49... | Line 49... | ||
49 | 49 | ||
50 | int radeon_sa_bo_manager_init(struct radeon_device *rdev, |
50 | int radeon_sa_bo_manager_init(struct radeon_device *rdev, |
51 | struct radeon_sa_manager *sa_manager, |
51 | struct radeon_sa_manager *sa_manager, |
52 | unsigned size, u32 domain) |
52 | unsigned size, u32 align, u32 domain, u32 flags) |
53 | { |
53 | { |
Line 54... | Line 54... | ||
54 | int i, r; |
54 | int i, r; |
55 | 55 | ||
56 | init_waitqueue_head(&sa_manager->wq); |
56 | init_waitqueue_head(&sa_manager->wq); |
57 | sa_manager->bo = NULL; |
57 | sa_manager->bo = NULL; |
- | 58 | sa_manager->size = size; |
|
58 | sa_manager->size = size; |
59 | sa_manager->domain = domain; |
59 | sa_manager->domain = domain; |
60 | sa_manager->align = align; |
60 | sa_manager->hole = &sa_manager->olist; |
61 | sa_manager->hole = &sa_manager->olist; |
61 | INIT_LIST_HEAD(&sa_manager->olist); |
62 | INIT_LIST_HEAD(&sa_manager->olist); |
62 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
63 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
Line 63... | Line 64... | ||
63 | INIT_LIST_HEAD(&sa_manager->flist[i]); |
64 | INIT_LIST_HEAD(&sa_manager->flist[i]); |
64 | } |
65 | } |
65 | 66 | ||
66 | r = radeon_bo_create(rdev, size, RADEON_GPU_PAGE_SIZE, true, |
67 | r = radeon_bo_create(rdev, size, align, true, |
67 | domain, NULL, &sa_manager->bo); |
68 | domain, flags, NULL, &sa_manager->bo); |
68 | if (r) { |
69 | if (r) { |
Line 309... | Line 310... | ||
309 | } |
310 | } |
Line 310... | Line 311... | ||
310 | 311 | ||
311 | int radeon_sa_bo_new(struct radeon_device *rdev, |
312 | int radeon_sa_bo_new(struct radeon_device *rdev, |
312 | struct radeon_sa_manager *sa_manager, |
313 | struct radeon_sa_manager *sa_manager, |
313 | struct radeon_sa_bo **sa_bo, |
314 | struct radeon_sa_bo **sa_bo, |
314 | unsigned size, unsigned align, bool block) |
315 | unsigned size, unsigned align) |
315 | { |
316 | { |
316 | struct radeon_fence *fences[RADEON_NUM_RINGS]; |
317 | struct radeon_fence *fences[RADEON_NUM_RINGS]; |
317 | unsigned tries[RADEON_NUM_RINGS]; |
318 | unsigned tries[RADEON_NUM_RINGS]; |
Line 318... | Line 319... | ||
318 | int i, r; |
319 | int i, r; |
319 | 320 | ||
Line 320... | Line 321... | ||
320 | BUG_ON(align > RADEON_GPU_PAGE_SIZE); |
321 | BUG_ON(align > sa_manager->align); |
321 | BUG_ON(size > sa_manager->size); |
322 | BUG_ON(size > sa_manager->size); |
322 | 323 | ||
Line 350... | Line 351... | ||
350 | 351 | ||
351 | spin_unlock(&sa_manager->wq.lock); |
352 | spin_unlock(&sa_manager->wq.lock); |
352 | r = radeon_fence_wait_any(rdev, fences, false); |
353 | r = radeon_fence_wait_any(rdev, fences, false); |
353 | spin_lock(&sa_manager->wq.lock); |
354 | spin_lock(&sa_manager->wq.lock); |
354 | /* if we have nothing to wait for block */ |
355 | /* if we have nothing to wait for block */ |
355 | if (r == -ENOENT && block) { |
356 | if (r == -ENOENT) { |
356 | // r = wait_event_interruptible_locked( |
357 | r = wait_event_interruptible( |
357 | // sa_manager->wq, |
358 | sa_manager->wq, |
358 | // radeon_sa_event(sa_manager, size, align) |
- | |
359 | // ); |
- | |
360 | - | ||
361 | } else if (r == -ENOENT) { |
359 | radeon_sa_event(sa_manager, size, align) |
362 | r = -ENOMEM; |
360 | ); |
Line 363... | Line 361... | ||
363 | } |
361 | } |
Line 364... | Line 362... | ||
364 | 362 | ||
Line 399... | Line 397... | ||
399 | { |
397 | { |
400 | struct radeon_sa_bo *i; |
398 | struct radeon_sa_bo *i; |
Line 401... | Line 399... | ||
401 | 399 | ||
402 | spin_lock(&sa_manager->wq.lock); |
400 | spin_lock(&sa_manager->wq.lock); |
- | 401 | list_for_each_entry(i, &sa_manager->olist, olist) { |
|
- | 402 | uint64_t soffset = i->soffset + sa_manager->gpu_addr; |
|
403 | list_for_each_entry(i, &sa_manager->olist, olist) { |
403 | uint64_t eoffset = i->eoffset + sa_manager->gpu_addr; |
404 | if (&i->olist == sa_manager->hole) { |
404 | if (&i->olist == sa_manager->hole) { |
405 | seq_printf(m, ">"); |
405 | seq_printf(m, ">"); |
406 | } else { |
406 | } else { |
407 | seq_printf(m, " "); |
407 | seq_printf(m, " "); |
408 | } |
408 | } |
409 | seq_printf(m, "[0x%08x 0x%08x] size %8d", |
409 | seq_printf(m, "[0x%010llx 0x%010llx] size %8lld", |
410 | i->soffset, i->eoffset, i->eoffset - i->soffset); |
410 | soffset, eoffset, eoffset - soffset); |
411 | if (i->fence) { |
411 | if (i->fence) { |
412 | seq_printf(m, " protected by 0x%016llx on ring %d", |
412 | seq_printf(m, " protected by 0x%016llx on ring %d", |
413 | i->fence->seq, i->fence->ring); |
413 | i->fence->seq, i->fence->ring); |
414 | } |
414 | } |