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| Rev 1430 | Rev 1963 | ||
|---|---|---|---|
| Line 32... | Line 32... | ||
| 32 | 32 | ||
| 33 | #include |
33 | #include |
| 34 | #include |
34 | #include |
| 35 | #include |
35 | #include |
| - | 36 | #include |
|
| - | 37 | #include |
|
| 36 | #include |
38 | #include |
| 37 | #include |
- | |
| 38 | #include |
39 | #include |
| 39 | #include |
- | |
| Line -... | Line 40... | ||
| - | 40 | #include |
|
| 40 | #include "radeon_fixed.h" |
41 | |
| Line 41... | Line 42... | ||
| 41 | 42 | struct radeon_bo; |
|
| 42 | struct radeon_device; |
43 | struct radeon_device; |
| 43 | 44 | ||
| Line 63... | Line 64... | ||
| 63 | TV_STD_SECAM, |
64 | TV_STD_SECAM, |
| 64 | TV_STD_PAL_CN, |
65 | TV_STD_PAL_CN, |
| 65 | TV_STD_PAL_N, |
66 | TV_STD_PAL_N, |
| 66 | }; |
67 | }; |
| Line -... | Line 68... | ||
| - | 68 | ||
| - | 69 | enum radeon_underscan_type { |
|
| - | 70 | UNDERSCAN_OFF, |
|
| - | 71 | UNDERSCAN_ON, |
|
| - | 72 | UNDERSCAN_AUTO, |
|
| - | 73 | }; |
|
| - | 74 | ||
| - | 75 | enum radeon_hpd_id { |
|
| - | 76 | RADEON_HPD_1 = 0, |
|
| - | 77 | RADEON_HPD_2, |
|
| - | 78 | RADEON_HPD_3, |
|
| - | 79 | RADEON_HPD_4, |
|
| - | 80 | RADEON_HPD_5, |
|
| - | 81 | RADEON_HPD_6, |
|
| - | 82 | RADEON_HPD_NONE = 0xff, |
|
| - | 83 | }; |
|
| - | 84 | ||
| - | 85 | #define RADEON_MAX_I2C_BUS 16 |
|
| 67 | 86 | ||
| 68 | /* radeon gpio-based i2c |
87 | /* radeon gpio-based i2c |
| 69 | * 1. "mask" reg and bits |
88 | * 1. "mask" reg and bits |
| 70 | * grabs the gpio pins for software use |
89 | * grabs the gpio pins for software use |
| 71 | * 0=not held 1=held |
90 | * 0=not held 1=held |
| Line 82... | Line 101... | ||
| 82 | struct radeon_i2c_bus_rec { |
101 | struct radeon_i2c_bus_rec { |
| 83 | bool valid; |
102 | bool valid; |
| 84 | /* id used by atom */ |
103 | /* id used by atom */ |
| 85 | uint8_t i2c_id; |
104 | uint8_t i2c_id; |
| 86 | /* id used by atom */ |
105 | /* id used by atom */ |
| 87 | uint8_t hpd_id; |
106 | enum radeon_hpd_id hpd; |
| 88 | /* can be used with hw i2c engine */ |
107 | /* can be used with hw i2c engine */ |
| 89 | bool hw_capable; |
108 | bool hw_capable; |
| 90 | /* uses multi-media i2c engine */ |
109 | /* uses multi-media i2c engine */ |
| 91 | bool mm_i2c; |
110 | bool mm_i2c; |
| 92 | /* regs and bits */ |
111 | /* regs and bits */ |
| Line 127... | Line 146... | ||
| 127 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
146 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
| 128 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
147 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
| 129 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
148 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
| 130 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
149 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
| 131 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
| 132 | - | ||
| 133 | /* pll algo */ |
- | |
| 134 | enum radeon_pll_algo { |
151 | #define RADEON_PLL_IS_LCD (1 << 13) |
| 135 | PLL_ALGO_LEGACY, |
152 | #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14) |
| 136 | PLL_ALGO_NEW |
- | |
| 137 | }; |
- | |
| Line 138... | Line 153... | ||
| 138 | 153 | ||
| 139 | struct radeon_pll { |
154 | struct radeon_pll { |
| 140 | /* reference frequency */ |
155 | /* reference frequency */ |
| Line 147... | Line 162... | ||
| 147 | /* pll in/out limits */ |
162 | /* pll in/out limits */ |
| 148 | uint32_t pll_in_min; |
163 | uint32_t pll_in_min; |
| 149 | uint32_t pll_in_max; |
164 | uint32_t pll_in_max; |
| 150 | uint32_t pll_out_min; |
165 | uint32_t pll_out_min; |
| 151 | uint32_t pll_out_max; |
166 | uint32_t pll_out_max; |
| - | 167 | uint32_t lcd_pll_out_min; |
|
| - | 168 | uint32_t lcd_pll_out_max; |
|
| 152 | uint32_t best_vco; |
169 | uint32_t best_vco; |
| Line 153... | Line 170... | ||
| 153 | 170 | ||
| 154 | /* divider limits */ |
171 | /* divider limits */ |
| 155 | uint32_t min_ref_div; |
172 | uint32_t min_ref_div; |
| Line 164... | Line 181... | ||
| 164 | /* flags for the current clock */ |
181 | /* flags for the current clock */ |
| 165 | uint32_t flags; |
182 | uint32_t flags; |
| Line 166... | Line 183... | ||
| 166 | 183 | ||
| 167 | /* pll id */ |
184 | /* pll id */ |
| 168 | uint32_t id; |
- | |
| 169 | /* pll algo */ |
- | |
| 170 | enum radeon_pll_algo algo; |
- | |
| 171 | }; |
- | |
| 172 | - | ||
| 173 | struct i2c_algo_radeon_data { |
- | |
| 174 | struct i2c_adapter bit_adapter; |
- | |
| 175 | struct i2c_algo_bit_data bit_data; |
185 | uint32_t id; |
| Line 176... | Line 186... | ||
| 176 | }; |
186 | }; |
| 177 | 187 | ||
| 178 | struct radeon_i2c_chan { |
188 | struct radeon_i2c_chan { |
| 179 | struct i2c_adapter adapter; |
189 | struct i2c_adapter adapter; |
| - | 190 | struct drm_device *dev; |
|
| 180 | struct drm_device *dev; |
191 | union { |
| 181 | union { |
- | |
| 182 | struct i2c_algo_dp_aux_data dp; |
192 | struct i2c_algo_bit_data bit; |
| 183 | struct i2c_algo_radeon_data radeon; |
193 | struct i2c_algo_dp_aux_data dp; |
| 184 | } algo; |
194 | } algo; |
| Line 185... | Line 195... | ||
| 185 | struct radeon_i2c_bus_rec rec; |
195 | struct radeon_i2c_bus_rec rec; |
| 186 | }; |
196 | }; |
| 187 | 197 | ||
| 188 | /* mostly for macs, but really any system without connector tables */ |
198 | /* mostly for macs, but really any system without connector tables */ |
| 189 | enum radeon_connector_table { |
199 | enum radeon_connector_table { |
| 190 | CT_NONE, |
200 | CT_NONE = 0, |
| 191 | CT_GENERIC, |
201 | CT_GENERIC, |
| 192 | CT_IBOOK, |
202 | CT_IBOOK, |
| 193 | CT_POWERBOOK_EXTERNAL, |
203 | CT_POWERBOOK_EXTERNAL, |
| 194 | CT_POWERBOOK_INTERNAL, |
204 | CT_POWERBOOK_INTERNAL, |
| 195 | CT_POWERBOOK_VGA, |
205 | CT_POWERBOOK_VGA, |
| 196 | CT_MINI_EXTERNAL, |
206 | CT_MINI_EXTERNAL, |
| - | 207 | CT_MINI_INTERNAL, |
|
| - | 208 | CT_IMAC_G5_ISIGHT, |
|
| - | 209 | CT_EMAC, |
|
| 197 | CT_MINI_INTERNAL, |
210 | CT_RN50_POWER, |
| Line 198... | Line 211... | ||
| 198 | CT_IMAC_G5_ISIGHT, |
211 | CT_MAC_X800, |
| 199 | CT_EMAC, |
212 | CT_MAC_G5_9600, |
| 200 | }; |
213 | }; |
| 201 | 214 | ||
| Line -... | Line 215... | ||
| - | 215 | enum radeon_dvo_chip { |
|
| - | 216 | DVO_SIL164, |
|
| 202 | enum radeon_dvo_chip { |
217 | DVO_SIL1178, |
| 203 | DVO_SIL164, |
218 | }; |
| 204 | DVO_SIL1178, |
219 | |
| 205 | }; |
220 | struct radeon_fbdev; |
| 206 | 221 | ||
| 207 | struct radeon_mode_info { |
222 | struct radeon_mode_info { |
| 208 | struct atom_context *atom_context; |
223 | struct atom_context *atom_context; |
| 209 | struct card_info *atom_card_info; |
224 | struct card_info *atom_card_info; |
| 210 | enum radeon_connector_table connector_table; |
225 | enum radeon_connector_table connector_table; |
| 211 | bool mode_config_initialized; |
226 | bool mode_config_initialized; |
| 212 | struct radeon_crtc *crtcs[6]; |
227 | struct radeon_crtc *crtcs[6]; |
| 213 | /* DVI-I properties */ |
228 | /* DVI-I properties */ |
| 214 | struct drm_property *coherent_mode_property; |
229 | struct drm_property *coherent_mode_property; |
| 215 | /* DAC enable load detect */ |
230 | /* DAC enable load detect */ |
| - | 231 | struct drm_property *load_detect_property; |
|
| - | 232 | /* TV standard */ |
|
| - | 233 | struct drm_property *tv_std_property; |
|
| - | 234 | /* legacy TMDS PLL detect */ |
|
| 216 | struct drm_property *load_detect_property; |
235 | struct drm_property *tmds_pll_property; |
| 217 | /* TV standard load detect */ |
236 | /* underscan */ |
| - | 237 | struct drm_property *underscan_property; |
|
| - | 238 | struct drm_property *underscan_hborder_property; |
|
| - | 239 | struct drm_property *underscan_vborder_property; |
|
| - | 240 | /* hardcoded DFP edid from BIOS */ |
|
| 218 | struct drm_property *tv_std_property; |
241 | struct edid *bios_hardcoded_edid; |
| Line 219... | Line 242... | ||
| 219 | /* legacy TMDS PLL detect */ |
242 | int bios_hardcoded_edid_size; |
| 220 | struct drm_property *tmds_pll_property; |
243 | |
| Line 249... | Line 272... | ||
| 249 | int cursor_width; |
272 | int cursor_width; |
| 250 | int cursor_height; |
273 | int cursor_height; |
| 251 | uint32_t legacy_display_base_addr; |
274 | uint32_t legacy_display_base_addr; |
| 252 | uint32_t legacy_cursor_offset; |
275 | uint32_t legacy_cursor_offset; |
| 253 | enum radeon_rmx_type rmx_type; |
276 | enum radeon_rmx_type rmx_type; |
| - | 277 | u8 h_border; |
|
| - | 278 | u8 v_border; |
|
| 254 | fixed20_12 vsc; |
279 | fixed20_12 vsc; |
| 255 | fixed20_12 hsc; |
280 | fixed20_12 hsc; |
| 256 | struct drm_display_mode native_mode; |
281 | struct drm_display_mode native_mode; |
| 257 | int pll_id; |
282 | int pll_id; |
| 258 | }; |
283 | }; |
| Line 273... | Line 298... | ||
| 273 | uint16_t panel_fb_divider; |
298 | uint16_t panel_fb_divider; |
| 274 | bool use_bios_dividers; |
299 | bool use_bios_dividers; |
| 275 | uint32_t lvds_gen_cntl; |
300 | uint32_t lvds_gen_cntl; |
| 276 | /* panel mode */ |
301 | /* panel mode */ |
| 277 | struct drm_display_mode native_mode; |
302 | struct drm_display_mode native_mode; |
| - | 303 | struct backlight_device *bl_dev; |
|
| - | 304 | int dpms_mode; |
|
| - | 305 | uint8_t backlight_level; |
|
| 278 | }; |
306 | }; |
| Line 279... | Line 307... | ||
| 279 | 307 | ||
| 280 | struct radeon_encoder_tv_dac { |
308 | struct radeon_encoder_tv_dac { |
| 281 | /* legacy tv dac */ |
309 | /* legacy tv dac */ |
| Line 306... | Line 334... | ||
| 306 | 334 | ||
| 307 | /* spread spectrum */ |
335 | /* spread spectrum */ |
| 308 | struct radeon_atom_ss { |
336 | struct radeon_atom_ss { |
| 309 | uint16_t percentage; |
337 | uint16_t percentage; |
| 310 | uint8_t type; |
338 | uint8_t type; |
| 311 | uint8_t step; |
339 | uint16_t step; |
| 312 | uint8_t delay; |
340 | uint8_t delay; |
| 313 | uint8_t range; |
341 | uint8_t range; |
| - | 342 | uint8_t refdiv; |
|
| - | 343 | /* asic_ss */ |
|
| - | 344 | uint16_t rate; |
|
| 314 | uint8_t refdiv; |
345 | uint16_t amount; |
| Line 315... | Line 346... | ||
| 315 | }; |
346 | }; |
| - | 347 | ||
| 316 | 348 | struct radeon_encoder_atom_dig { |
|
| 317 | struct radeon_encoder_atom_dig { |
349 | bool linkb; |
| 318 | /* atom dig */ |
350 | /* atom dig */ |
| 319 | bool coherent_mode; |
351 | bool coherent_mode; |
| 320 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ |
352 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */ |
| 321 | /* atom lvds */ |
353 | /* atom lvds/edp */ |
| 322 | uint32_t lvds_misc; |
- | |
| 323 | uint16_t panel_pwr_delay; |
354 | uint32_t lcd_misc; |
| 324 | enum radeon_pll_algo pll_algo; |
355 | uint16_t panel_pwr_delay; |
| 325 | struct radeon_atom_ss *ss; |
356 | uint32_t lcd_ss_id; |
| - | 357 | /* panel mode */ |
|
| - | 358 | struct drm_display_mode native_mode; |
|
| - | 359 | struct backlight_device *bl_dev; |
|
| 326 | /* panel mode */ |
360 | int dpms_mode; |
| Line 327... | Line 361... | ||
| 327 | struct drm_display_mode native_mode; |
361 | uint8_t backlight_level; |
| 328 | }; |
362 | }; |
| 329 | 363 | ||
| Line 330... | Line 364... | ||
| 330 | struct radeon_encoder_atom_dac { |
364 | struct radeon_encoder_atom_dac { |
| 331 | enum radeon_tv_std tv_std; |
365 | enum radeon_tv_std tv_std; |
| - | 366 | }; |
|
| 332 | }; |
367 | |
| 333 | 368 | struct radeon_encoder { |
|
| 334 | struct radeon_encoder { |
369 | struct drm_encoder base; |
| 335 | struct drm_encoder base; |
370 | uint32_t encoder_enum; |
| 336 | uint32_t encoder_id; |
371 | uint32_t encoder_id; |
| 337 | uint32_t devices; |
372 | uint32_t devices; |
| - | 373 | uint32_t active_device; |
|
| - | 374 | uint32_t flags; |
|
| - | 375 | uint32_t pixel_clock; |
|
| 338 | uint32_t active_device; |
376 | enum radeon_rmx_type rmx_type; |
| 339 | uint32_t flags; |
377 | enum radeon_underscan_type underscan_type; |
| - | 378 | uint32_t underscan_hborder; |
|
| 340 | uint32_t pixel_clock; |
379 | uint32_t underscan_vborder; |
| - | 380 | struct drm_display_mode native_mode; |
|
| 341 | enum radeon_rmx_type rmx_type; |
381 | void *enc_priv; |
| 342 | struct drm_display_mode native_mode; |
382 | int audio_polling_active; |
| - | 383 | int hdmi_offset; |
|
| - | 384 | int hdmi_config_offset; |
|
| 343 | void *enc_priv; |
385 | int hdmi_audio_workaround; |
| Line 344... | Line 386... | ||
| 344 | int hdmi_offset; |
386 | int hdmi_buffer_status; |
| 345 | int hdmi_audio_workaround; |
387 | bool is_ext_encoder; |
| 346 | int hdmi_buffer_status; |
- | |
| 347 | }; |
388 | u16 caps; |
| 348 | 389 | }; |
|
| 349 | struct radeon_connector_atom_dig { |
390 | |
| 350 | uint32_t igp_lane_info; |
391 | struct radeon_connector_atom_dig { |
| 351 | bool linkb; |
392 | uint32_t igp_lane_info; |
| 352 | /* displayport */ |
393 | /* displayport */ |
| - | 394 | struct radeon_i2c_chan *dp_i2c_bus; |
|
| 353 | struct radeon_i2c_chan *dp_i2c_bus; |
395 | u8 dpcd[8]; |
| Line 354... | Line 396... | ||
| 354 | u8 dpcd[8]; |
396 | u8 dp_sink_type; |
| 355 | u8 dp_sink_type; |
397 | int dp_clock; |
| 356 | int dp_clock; |
398 | int dp_lane_count; |
| 357 | int dp_lane_count; |
399 | bool edp_on; |
| 358 | }; |
400 | }; |
| 359 | 401 | ||
| Line 360... | Line -... | ||
| 360 | struct radeon_gpio_rec { |
- | |
| 361 | bool valid; |
- | |
| 362 | u8 id; |
- | |
| 363 | u32 reg; |
- | |
| 364 | u32 mask; |
- | |
| 365 | }; |
- | |
| 366 | - | ||
| 367 | enum radeon_hpd_id { |
- | |
| 368 | RADEON_HPD_NONE = 0, |
- | |
| 369 | RADEON_HPD_1, |
- | |
| 370 | RADEON_HPD_2, |
402 | struct radeon_gpio_rec { |
| 371 | RADEON_HPD_3, |
403 | bool valid; |
| 372 | RADEON_HPD_4, |
404 | u8 id; |
| 373 | RADEON_HPD_5, |
405 | u32 reg; |
| 374 | RADEON_HPD_6, |
406 | u32 mask; |
| Line -... | Line 407... | ||
| - | 407 | }; |
|
| - | 408 | ||
| - | 409 | struct radeon_hpd { |
|
| - | 410 | enum radeon_hpd_id hpd; |
|
| - | 411 | u8 plugged_state; |
|
| - | 412 | struct radeon_gpio_rec gpio; |
|
| - | 413 | }; |
|
| - | 414 | ||
| - | 415 | struct radeon_router { |
|
| - | 416 | u32 router_id; |
|
| - | 417 | struct radeon_i2c_bus_rec i2c_info; |
|
| - | 418 | u8 i2c_addr; |
|
| - | 419 | /* i2c mux */ |
|
| - | 420 | bool ddc_valid; |
|
| - | 421 | u8 ddc_mux_type; |
|
| - | 422 | u8 ddc_mux_control_pin; |
|
| 375 | }; |
423 | u8 ddc_mux_state; |
| 376 | 424 | /* clock/data mux */ |
|
| 377 | struct radeon_hpd { |
425 | bool cd_valid; |
| 378 | enum radeon_hpd_id hpd; |
426 | u8 cd_mux_type; |
| 379 | u8 plugged_state; |
427 | u8 cd_mux_control_pin; |
| 380 | struct radeon_gpio_rec gpio; |
428 | u8 cd_mux_state; |
| 381 | }; |
429 | }; |
| 382 | 430 | ||
| 383 | struct radeon_connector { |
431 | struct radeon_connector { |
| 384 | struct drm_connector base; |
432 | struct drm_connector base; |
| 385 | uint32_t connector_id; |
433 | uint32_t connector_id; |
| 386 | uint32_t devices; |
434 | uint32_t devices; |
| 387 | struct radeon_i2c_chan *ddc_bus; |
435 | struct radeon_i2c_chan *ddc_bus; |
| 388 | /* some systems have a an hdmi and vga port with a shared ddc line */ |
436 | /* some systems have an hdmi and vga port with a shared ddc line */ |
| 389 | bool shared_ddc; |
437 | bool shared_ddc; |
| - | 438 | bool use_digital; |
|
| - | 439 | /* we need to mind the EDID between detect |
|
| 390 | bool use_digital; |
440 | and get modes due to analog/digital/tvencoder */ |
| Line 391... | Line 441... | ||
| 391 | /* we need to mind the EDID between detect |
441 | struct edid *edid; |
| 392 | and get modes due to analog/digital/tvencoder */ |
442 | void *con_priv; |
| 393 | struct edid *edid; |
443 | bool dac_load_detect; |
| 394 | void *con_priv; |
444 | uint16_t connector_object_id; |
| Line -... | Line 445... | ||
| - | 445 | struct radeon_hpd hpd; |
|
| 395 | bool dac_load_detect; |
446 | struct radeon_router router; |
| 396 | uint16_t connector_object_id; |
447 | struct radeon_i2c_chan *router_bus; |
| 397 | struct radeon_hpd hpd; |
448 | }; |
| 398 | }; |
449 | |
| Line -... | Line 450... | ||
| - | 450 | struct radeon_framebuffer { |
|
| - | 451 | struct drm_framebuffer base; |
|
| - | 452 | struct drm_gem_object *obj; |
|
| - | 453 | }; |
|
| - | 454 | ||
| - | 455 | ||
| - | 456 | extern enum radeon_tv_std |
|
| - | 457 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
|
| 399 | 458 | extern enum radeon_tv_std |
|
| 400 | struct radeon_framebuffer { |
- | |
| 401 | struct drm_framebuffer base; |
459 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
| 402 | struct drm_gem_object *obj; |
460 | |
| 403 | }; |
461 | extern struct drm_connector * |
| 404 | 462 | radeon_get_connector_for_encoder(struct drm_encoder *encoder); |
|
| 405 | extern enum radeon_tv_std |
463 | |
| 406 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
464 | extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder); |
| 407 | extern enum radeon_tv_std |
465 | extern bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector); |
| 408 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
466 | extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector); |
| 409 | 467 | extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector); |
|
| - | 468 | ||
| 410 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
469 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
| 411 | extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); |
470 | extern int radeon_dp_mode_valid_helper(struct drm_connector *connector, |
| 412 | extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, |
471 | struct drm_display_mode *mode); |
| 413 | struct drm_display_mode *mode); |
472 | extern void radeon_dp_set_link_config(struct drm_connector *connector, |
| 414 | extern void radeon_dp_set_link_config(struct drm_connector *connector, |
473 | struct drm_display_mode *mode); |
| Line -... | Line 474... | ||
| - | 474 | extern void radeon_dp_link_train(struct drm_encoder *encoder, |
|
| - | 475 | struct drm_connector *connector); |
|
| - | 476 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
|
| - | 477 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
|
| - | 478 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); |
|
| - | 479 | extern void radeon_atom_encoder_init(struct radeon_device *rdev); |
|
| - | 480 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
|
| - | 481 | int action, uint8_t lane_num, |
|
| - | 482 | uint8_t lane_set); |
|
| 415 | struct drm_display_mode *mode); |
483 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
| 416 | extern void dp_link_train(struct drm_encoder *encoder, |
484 | u8 write_byte, u8 *read_byte); |
| 417 | struct drm_connector *connector); |
485 | |
| 418 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
486 | extern void radeon_i2c_init(struct radeon_device *rdev); |
| 419 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
487 | extern void radeon_i2c_fini(struct radeon_device *rdev); |
| 420 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action); |
488 | extern void radeon_combios_i2c_init(struct radeon_device *rdev); |
| 421 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
489 | extern void radeon_atombios_i2c_init(struct radeon_device *rdev); |
| 422 | int action, uint8_t lane_num, |
- | |
| 423 | uint8_t lane_set); |
490 | extern void radeon_i2c_add(struct radeon_device *rdev, |
| 424 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
491 | struct radeon_i2c_bus_rec *rec, |
| 425 | uint8_t write_byte, uint8_t *read_byte); |
492 | const char *name); |
| 426 | 493 | extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, |
|
| 427 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, |
494 | struct radeon_i2c_bus_rec *i2c_bus); |
| 428 | struct radeon_i2c_bus_rec *rec, |
495 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, |
| 429 | const char *name); |
496 | struct radeon_i2c_bus_rec *rec, |
| 430 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
497 | const char *name); |
| - | 498 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
|
| - | 499 | struct radeon_i2c_bus_rec *rec, |
|
| 431 | struct radeon_i2c_bus_rec *rec, |
500 | const char *name); |
| 432 | const char *name); |
501 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
| Line 433... | Line 502... | ||
| 433 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
502 | extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, |
| Line -... | Line 503... | ||
| - | 503 | u8 slave_addr, |
|
| - | 504 | u8 addr, |
|
| - | 505 | u8 *val); |
|
| - | 506 | extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, |
|
| - | 507 | u8 slave_addr, |
|
| - | 508 | u8 addr, |
|
| - | 509 | u8 val); |
|
| 434 | extern void radeon_i2c_destroy_dp(struct radeon_i2c_chan *i2c); |
510 | extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); |
| 435 | extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, |
511 | extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); |
| 436 | u8 slave_addr, |
512 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
| 437 | u8 addr, |
513 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
| 438 | u8 *val); |
514 | |
| 439 | extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, |
515 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
| 440 | u8 slave_addr, |
516 | |
| Line -... | Line 517... | ||
| - | 517 | extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, |
|
| - | 518 | struct radeon_atom_ss *ss, |
|
| - | 519 | int id); |
|
| - | 520 | extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, |
|
| - | 521 | struct radeon_atom_ss *ss, |
|
| - | 522 | int id, u32 clock); |
|
| - | 523 | ||
| - | 524 | extern void radeon_compute_pll_legacy(struct radeon_pll *pll, |
|
| 441 | u8 addr, |
525 | uint64_t freq, |
| Line 442... | Line 526... | ||
| 442 | u8 val); |
526 | uint32_t *dot_clock_p, |
| 443 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
527 | uint32_t *fb_div_p, |
| 444 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
528 | uint32_t *frac_fb_div_p, |
| 445 | 529 | uint32_t *ref_div_p, |
|
| 446 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
530 | uint32_t *post_div_p); |
| 447 | 531 | ||
| 448 | extern void radeon_compute_pll(struct radeon_pll *pll, |
532 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, |
| 449 | uint64_t freq, |
533 | u32 freq, |
| - | 534 | u32 *dot_clock_p, |
|
| 450 | uint32_t *dot_clock_p, |
535 | u32 *fb_div_p, |
| Line 451... | Line 536... | ||
| 451 | uint32_t *fb_div_p, |
536 | u32 *frac_fb_div_p, |
| 452 | uint32_t *frac_fb_div_p, |
537 | u32 *ref_div_p, |
| 453 | uint32_t *ref_div_p, |
538 | u32 *post_div_p); |
| - | 539 | ||
| - | 540 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
|
| - | 541 | ||
| - | 542 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
|
| 454 | uint32_t *post_div_p); |
543 | struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
| 455 | 544 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
|
| 456 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
545 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
| 457 | 546 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
|
| 458 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
547 | extern void atombios_dvo_setup(struct drm_encoder *encoder, int action); |
| 459 | struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
548 | extern void atombios_digital_setup(struct drm_encoder *encoder, int action); |
| Line 460... | Line 549... | ||
| 460 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
549 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
| 461 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
550 | extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action); |
| - | 551 | extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); |
|
| - | 552 | ||
| - | 553 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
|
| - | 554 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
|
| - | 555 | struct drm_framebuffer *old_fb); |
|
| - | 556 | extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, |
|
| 462 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
- | |
| - | 557 | struct drm_framebuffer *fb, |
|
| 463 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); |
558 | int x, int y, |
| 464 | extern void atombios_digital_setup(struct drm_encoder *encoder, int action); |
559 | enum mode_set_atomic state); |
| 465 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
560 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
| 466 | extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); |
561 | struct drm_display_mode *mode, |
| 467 | 562 | struct drm_display_mode *adjusted_mode, |
|
| 468 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
563 | int x, int y, |
| 469 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
564 | struct drm_framebuffer *old_fb); |
| Line -... | Line 565... | ||
| - | 565 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
|
| - | 566 | ||
| - | 567 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
|
| 470 | struct drm_framebuffer *old_fb); |
568 | struct drm_framebuffer *old_fb); |
| 471 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
569 | extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, |
| 472 | struct drm_display_mode *mode, |
570 | struct drm_framebuffer *fb, |
| 473 | struct drm_display_mode *adjusted_mode, |
571 | int x, int y, |
| 474 | int x, int y, |
572 | enum mode_set_atomic state); |
| 475 | struct drm_framebuffer *old_fb); |
573 | extern int radeon_crtc_do_set_base(struct drm_crtc *crtc, |
| 476 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
574 | struct drm_framebuffer *fb, |
| 477 | 575 | int x, int y, int atomic); |
|
| Line 532... | Line 630... | ||
| 532 | radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
630 | radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
| 533 | extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
631 | extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
| 534 | u16 blue, int regno); |
632 | u16 blue, int regno); |
| 535 | extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
633 | extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
| 536 | u16 *blue, int regno); |
634 | u16 *blue, int regno); |
| 537 | struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev, |
635 | void radeon_framebuffer_init(struct drm_device *dev, |
| - | 636 | struct radeon_framebuffer *rfb, |
|
| 538 | struct drm_mode_fb_cmd *mode_cmd, |
637 | struct drm_mode_fb_cmd *mode_cmd, |
| 539 | struct drm_gem_object *obj); |
638 | struct drm_gem_object *obj); |
| Line 540... | Line -... | ||
| 540 | - | ||
| 541 | int radeonfb_probe(struct drm_device *dev); |
- | |
| 542 | 639 | ||
| 543 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
640 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
| 544 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); |
641 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); |
| 545 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
642 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
| 546 | void radeon_atombios_init_crtc(struct drm_device *dev, |
643 | void radeon_atombios_init_crtc(struct drm_device *dev, |
| Line 554... | Line 651... | ||
| 554 | extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); |
651 | extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); |
| Line 555... | Line 652... | ||
| 555 | 652 | ||
| 556 | void radeon_enc_destroy(struct drm_encoder *encoder); |
653 | void radeon_enc_destroy(struct drm_encoder *encoder); |
| 557 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
654 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
| 558 | void radeon_combios_asic_init(struct drm_device *dev); |
- | |
| 559 | extern int radeon_static_clocks_init(struct drm_device *dev); |
655 | void radeon_combios_asic_init(struct drm_device *dev); |
| 560 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
656 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
| 561 | struct drm_display_mode *mode, |
657 | struct drm_display_mode *mode, |
| - | 658 | struct drm_display_mode *adjusted_mode); |
|
| - | 659 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
|
| 562 | struct drm_display_mode *adjusted_mode); |
660 | struct drm_display_mode *adjusted_mode); |
| Line 563... | Line 661... | ||
| 563 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); |
661 | void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); |
| 564 | 662 | ||
| 565 | /* legacy tv */ |
663 | /* legacy tv */ |
| Line 573... | Line 671... | ||
| 573 | uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, |
671 | uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, |
| 574 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
672 | uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); |
| 575 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
673 | void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, |
| 576 | struct drm_display_mode *mode, |
674 | struct drm_display_mode *mode, |
| 577 | struct drm_display_mode *adjusted_mode); |
675 | struct drm_display_mode *adjusted_mode); |
| - | 676 | ||
| - | 677 | /* fbdev layer */ |
|
| - | 678 | int radeon_fbdev_init(struct radeon_device *rdev); |
|
| - | 679 | void radeon_fbdev_fini(struct radeon_device *rdev); |
|
| - | 680 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); |
|
| - | 681 | int radeon_fbdev_total_size(struct radeon_device *rdev); |
|
| - | 682 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); |
|
| - | 683 | ||
| - | 684 | void radeon_fb_output_poll_changed(struct radeon_device *rdev); |
|
| - | 685 | ||
| - | 686 | void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id); |
|
| - | 687 | ||
| - | 688 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled); |
|
| 578 | #endif |
689 | #endif |