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| Rev 1404 | Rev 1430 | ||
|---|---|---|---|
| Line 81... | Line 81... | ||
| 81 | */ |
81 | */ |
| 82 | struct radeon_i2c_bus_rec { |
82 | struct radeon_i2c_bus_rec { |
| 83 | bool valid; |
83 | bool valid; |
| 84 | /* id used by atom */ |
84 | /* id used by atom */ |
| 85 | uint8_t i2c_id; |
85 | uint8_t i2c_id; |
| - | 86 | /* id used by atom */ |
|
| - | 87 | uint8_t hpd_id; |
|
| 86 | /* can be used with hw i2c engine */ |
88 | /* can be used with hw i2c engine */ |
| 87 | bool hw_capable; |
89 | bool hw_capable; |
| 88 | /* uses multi-media i2c engine */ |
90 | /* uses multi-media i2c engine */ |
| 89 | bool mm_i2c; |
91 | bool mm_i2c; |
| 90 | /* regs and bits */ |
92 | /* regs and bits */ |
| Line 111... | Line 113... | ||
| 111 | uint32_t value; |
113 | uint32_t value; |
| 112 | }; |
114 | }; |
| Line 113... | Line 115... | ||
| 113 | 115 | ||
| Line -... | Line 116... | ||
| - | 116 | #define RADEON_MAX_BIOS_CONNECTOR 16 |
|
| 114 | #define RADEON_MAX_BIOS_CONNECTOR 16 |
117 | |
| 115 | 118 | /* pll flags */ |
|
| 116 | #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) |
119 | #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) |
| 117 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
120 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
| 118 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
121 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
| Line 125... | Line 128... | ||
| 125 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
128 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
| 126 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
129 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
| 127 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
130 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
| 128 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
131 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
| Line -... | Line 132... | ||
| - | 132 | ||
| - | 133 | /* pll algo */ |
|
| - | 134 | enum radeon_pll_algo { |
|
| - | 135 | PLL_ALGO_LEGACY, |
|
| - | 136 | PLL_ALGO_NEW |
|
| - | 137 | }; |
|
| 129 | 138 | ||
| 130 | struct radeon_pll { |
139 | struct radeon_pll { |
| 131 | /* reference frequency */ |
140 | /* reference frequency */ |
| Line 132... | Line 141... | ||
| 132 | uint32_t reference_freq; |
141 | uint32_t reference_freq; |
| Line 155... | Line 164... | ||
| 155 | /* flags for the current clock */ |
164 | /* flags for the current clock */ |
| 156 | uint32_t flags; |
165 | uint32_t flags; |
| Line 157... | Line 166... | ||
| 157 | 166 | ||
| 158 | /* pll id */ |
167 | /* pll id */ |
| - | 168 | uint32_t id; |
|
| - | 169 | /* pll algo */ |
|
| - | 170 | enum radeon_pll_algo algo; |
|
| - | 171 | }; |
|
| - | 172 | ||
| - | 173 | struct i2c_algo_radeon_data { |
|
| - | 174 | struct i2c_adapter bit_adapter; |
|
| 159 | uint32_t id; |
175 | struct i2c_algo_bit_data bit_data; |
| Line 160... | Line 176... | ||
| 160 | }; |
176 | }; |
| 161 | 177 | ||
| 162 | struct radeon_i2c_chan { |
178 | struct radeon_i2c_chan { |
| 163 | struct i2c_adapter adapter; |
179 | struct i2c_adapter adapter; |
| 164 | struct drm_device *dev; |
180 | struct drm_device *dev; |
| 165 | union { |
181 | union { |
| 166 | struct i2c_algo_dp_aux_data dp; |
182 | struct i2c_algo_dp_aux_data dp; |
| 167 | struct i2c_algo_bit_data bit; |
183 | struct i2c_algo_radeon_data radeon; |
| 168 | } algo; |
184 | } algo; |
| Line 169... | Line 185... | ||
| 169 | struct radeon_i2c_bus_rec rec; |
185 | struct radeon_i2c_bus_rec rec; |
| Line 191... | Line 207... | ||
| 191 | struct radeon_mode_info { |
207 | struct radeon_mode_info { |
| 192 | struct atom_context *atom_context; |
208 | struct atom_context *atom_context; |
| 193 | struct card_info *atom_card_info; |
209 | struct card_info *atom_card_info; |
| 194 | enum radeon_connector_table connector_table; |
210 | enum radeon_connector_table connector_table; |
| 195 | bool mode_config_initialized; |
211 | bool mode_config_initialized; |
| 196 | struct radeon_crtc *crtcs[2]; |
212 | struct radeon_crtc *crtcs[6]; |
| 197 | /* DVI-I properties */ |
213 | /* DVI-I properties */ |
| 198 | struct drm_property *coherent_mode_property; |
214 | struct drm_property *coherent_mode_property; |
| 199 | /* DAC enable load detect */ |
215 | /* DAC enable load detect */ |
| 200 | struct drm_property *load_detect_property; |
216 | struct drm_property *load_detect_property; |
| 201 | /* TV standard load detect */ |
217 | /* TV standard load detect */ |
| 202 | struct drm_property *tv_std_property; |
218 | struct drm_property *tv_std_property; |
| 203 | /* legacy TMDS PLL detect */ |
219 | /* legacy TMDS PLL detect */ |
| 204 | struct drm_property *tmds_pll_property; |
220 | struct drm_property *tmds_pll_property; |
| 205 | - | ||
| - | 221 | /* hardcoded DFP edid from BIOS */ |
|
| - | 222 | struct edid *bios_hardcoded_edid; |
|
| 206 | }; |
223 | }; |
| Line 207... | Line 224... | ||
| 207 | 224 | ||
| 208 | #define MAX_H_CODE_TIMING_LEN 32 |
225 | #define MAX_H_CODE_TIMING_LEN 32 |
| Line 235... | Line 252... | ||
| 235 | uint32_t legacy_cursor_offset; |
252 | uint32_t legacy_cursor_offset; |
| 236 | enum radeon_rmx_type rmx_type; |
253 | enum radeon_rmx_type rmx_type; |
| 237 | fixed20_12 vsc; |
254 | fixed20_12 vsc; |
| 238 | fixed20_12 hsc; |
255 | fixed20_12 hsc; |
| 239 | struct drm_display_mode native_mode; |
256 | struct drm_display_mode native_mode; |
| - | 257 | int pll_id; |
|
| 240 | }; |
258 | }; |
| Line 241... | Line 259... | ||
| 241 | 259 | ||
| 242 | struct radeon_encoder_primary_dac { |
260 | struct radeon_encoder_primary_dac { |
| 243 | /* legacy primary dac */ |
261 | /* legacy primary dac */ |
| Line 301... | Line 319... | ||
| 301 | bool coherent_mode; |
319 | bool coherent_mode; |
| 302 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ |
320 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ |
| 303 | /* atom lvds */ |
321 | /* atom lvds */ |
| 304 | uint32_t lvds_misc; |
322 | uint32_t lvds_misc; |
| 305 | uint16_t panel_pwr_delay; |
323 | uint16_t panel_pwr_delay; |
| - | 324 | enum radeon_pll_algo pll_algo; |
|
| 306 | struct radeon_atom_ss *ss; |
325 | struct radeon_atom_ss *ss; |
| 307 | /* panel mode */ |
326 | /* panel mode */ |
| 308 | struct drm_display_mode native_mode; |
327 | struct drm_display_mode native_mode; |
| 309 | }; |
328 | }; |
| Line 396... | Line 415... | ||
| 396 | struct drm_display_mode *mode); |
415 | struct drm_display_mode *mode); |
| 397 | extern void dp_link_train(struct drm_encoder *encoder, |
416 | extern void dp_link_train(struct drm_encoder *encoder, |
| 398 | struct drm_connector *connector); |
417 | struct drm_connector *connector); |
| 399 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
418 | extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
| 400 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
419 | extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
| - | 420 | extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action); |
|
| 401 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
421 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
| 402 | int action, uint8_t lane_num, |
422 | int action, uint8_t lane_num, |
| 403 | uint8_t lane_set); |
423 | uint8_t lane_set); |
| 404 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
424 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
| 405 | uint8_t write_byte, uint8_t *read_byte); |
425 | uint8_t write_byte, uint8_t *read_byte); |
| Line 409... | Line 429... | ||
| 409 | const char *name); |
429 | const char *name); |
| 410 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
430 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
| 411 | struct radeon_i2c_bus_rec *rec, |
431 | struct radeon_i2c_bus_rec *rec, |
| 412 | const char *name); |
432 | const char *name); |
| 413 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
433 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
| - | 434 | extern void radeon_i2c_destroy_dp(struct radeon_i2c_chan *i2c); |
|
| 414 | extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus, |
435 | extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, |
| 415 | u8 slave_addr, |
436 | u8 slave_addr, |
| 416 | u8 addr, |
437 | u8 addr, |
| 417 | u8 *val); |
438 | u8 *val); |
| 418 | extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c, |
439 | extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, |
| 419 | u8 slave_addr, |
440 | u8 slave_addr, |
| 420 | u8 addr, |
441 | u8 addr, |
| 421 | u8 val); |
442 | u8 val); |
| 422 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
443 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
| 423 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
444 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
| Line 430... | Line 451... | ||
| 430 | uint32_t *fb_div_p, |
451 | uint32_t *fb_div_p, |
| 431 | uint32_t *frac_fb_div_p, |
452 | uint32_t *frac_fb_div_p, |
| 432 | uint32_t *ref_div_p, |
453 | uint32_t *ref_div_p, |
| 433 | uint32_t *post_div_p); |
454 | uint32_t *post_div_p); |
| Line 434... | Line -... | ||
| 434 | - | ||
| 435 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, |
- | |
| 436 | uint64_t freq, |
- | |
| 437 | uint32_t *dot_clock_p, |
- | |
| 438 | uint32_t *fb_div_p, |
- | |
| 439 | uint32_t *frac_fb_div_p, |
- | |
| 440 | uint32_t *ref_div_p, |
- | |
| 441 | uint32_t *post_div_p); |
- | |
| 442 | 455 | ||
| Line 443... | Line 456... | ||
| 443 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
456 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
| 444 | 457 | ||
| 445 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
458 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
| Line 471... | Line 484... | ||
| 471 | uint32_t width, |
484 | uint32_t width, |
| 472 | uint32_t height); |
485 | uint32_t height); |
| 473 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
486 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
| 474 | int x, int y); |
487 | int x, int y); |
| Line -... | Line 488... | ||
| - | 488 | ||
| - | 489 | extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); |
|
| - | 490 | extern struct edid * |
|
| 475 | 491 | radeon_combios_get_hardcoded_edid(struct radeon_device *rdev); |
|
| 476 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
492 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
| 477 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
493 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
| 478 | extern struct radeon_encoder_atom_dig * |
494 | extern struct radeon_encoder_atom_dig * |
| 479 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
495 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
| Line 529... | Line 545... | ||
| 529 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
545 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
| 530 | void radeon_atombios_init_crtc(struct drm_device *dev, |
546 | void radeon_atombios_init_crtc(struct drm_device *dev, |
| 531 | struct radeon_crtc *radeon_crtc); |
547 | struct radeon_crtc *radeon_crtc); |
| 532 | void radeon_legacy_init_crtc(struct drm_device *dev, |
548 | void radeon_legacy_init_crtc(struct drm_device *dev, |
| 533 | struct radeon_crtc *radeon_crtc); |
549 | struct radeon_crtc *radeon_crtc); |
| 534 | extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state); |
- | |
| Line 535... | Line 550... | ||
| 535 | 550 | ||
| Line 536... | Line 551... | ||
| 536 | void radeon_get_clock_info(struct drm_device *dev); |
551 | void radeon_get_clock_info(struct drm_device *dev); |
| 537 | 552 | ||