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| Rev 1321 | Rev 1404 | ||
|---|---|---|---|
| Line 44... | Line 44... | ||
| 44 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
44 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
| 45 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
45 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
| 46 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
46 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
| 47 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
47 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
| Line 48... | Line -... | ||
| 48 | - | ||
| 49 | enum radeon_connector_type { |
- | |
| 50 | CONNECTOR_NONE, |
- | |
| 51 | CONNECTOR_VGA, |
- | |
| 52 | CONNECTOR_DVI_I, |
- | |
| 53 | CONNECTOR_DVI_D, |
- | |
| 54 | CONNECTOR_DVI_A, |
- | |
| 55 | CONNECTOR_STV, |
- | |
| 56 | CONNECTOR_CTV, |
- | |
| 57 | CONNECTOR_LVDS, |
- | |
| 58 | CONNECTOR_DIGITAL, |
- | |
| 59 | CONNECTOR_SCART, |
- | |
| 60 | CONNECTOR_HDMI_TYPE_A, |
- | |
| 61 | CONNECTOR_HDMI_TYPE_B, |
- | |
| 62 | CONNECTOR_0XC, |
- | |
| 63 | CONNECTOR_0XD, |
- | |
| 64 | CONNECTOR_DIN, |
- | |
| 65 | CONNECTOR_DISPLAY_PORT, |
- | |
| 66 | CONNECTOR_UNSUPPORTED |
- | |
| 67 | }; |
- | |
| 68 | - | ||
| 69 | enum radeon_dvi_type { |
- | |
| 70 | DVI_AUTO, |
- | |
| 71 | DVI_DIGITAL, |
- | |
| 72 | DVI_ANALOG |
- | |
| 73 | }; |
- | |
| 74 | 48 | ||
| 75 | enum radeon_rmx_type { |
49 | enum radeon_rmx_type { |
| 76 | RMX_OFF, |
50 | RMX_OFF, |
| 77 | RMX_FULL, |
51 | RMX_FULL, |
| 78 | RMX_CENTER, |
52 | RMX_CENTER, |
| Line 86... | Line 60... | ||
| 86 | TV_STD_PAL_60, |
60 | TV_STD_PAL_60, |
| 87 | TV_STD_NTSC_J, |
61 | TV_STD_NTSC_J, |
| 88 | TV_STD_SCART_PAL, |
62 | TV_STD_SCART_PAL, |
| 89 | TV_STD_SECAM, |
63 | TV_STD_SECAM, |
| 90 | TV_STD_PAL_CN, |
64 | TV_STD_PAL_CN, |
| - | 65 | TV_STD_PAL_N, |
|
| 91 | }; |
66 | }; |
| Line 92... | Line 67... | ||
| 92 | 67 | ||
| 93 | /* radeon gpio-based i2c |
68 | /* radeon gpio-based i2c |
| 94 | * 1. "mask" reg and bits |
69 | * 1. "mask" reg and bits |
| Line 148... | Line 123... | ||
| 148 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
123 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
| 149 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
124 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
| 150 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
125 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
| 151 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
126 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
| 152 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
127 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
| - | 128 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
|
| Line 153... | Line 129... | ||
| 153 | 129 | ||
| - | 130 | struct radeon_pll { |
|
| 154 | struct radeon_pll { |
131 | /* reference frequency */ |
| - | 132 | uint32_t reference_freq; |
|
| - | 133 | ||
| 155 | uint16_t reference_freq; |
134 | /* fixed dividers */ |
| - | 135 | uint32_t reference_div; |
|
| - | 136 | uint32_t post_div; |
|
| - | 137 | ||
| 156 | uint16_t reference_div; |
138 | /* pll in/out limits */ |
| 157 | uint32_t pll_in_min; |
139 | uint32_t pll_in_min; |
| 158 | uint32_t pll_in_max; |
140 | uint32_t pll_in_max; |
| 159 | uint32_t pll_out_min; |
141 | uint32_t pll_out_min; |
| 160 | uint32_t pll_out_max; |
142 | uint32_t pll_out_max; |
| Line -... | Line 143... | ||
| - | 143 | uint32_t best_vco; |
|
| 161 | uint16_t xclk; |
144 | |
| 162 | 145 | /* divider limits */ |
|
| 163 | uint32_t min_ref_div; |
146 | uint32_t min_ref_div; |
| 164 | uint32_t max_ref_div; |
147 | uint32_t max_ref_div; |
| 165 | uint32_t min_post_div; |
148 | uint32_t min_post_div; |
| 166 | uint32_t max_post_div; |
149 | uint32_t max_post_div; |
| 167 | uint32_t min_feedback_div; |
150 | uint32_t min_feedback_div; |
| 168 | uint32_t max_feedback_div; |
151 | uint32_t max_feedback_div; |
| - | 152 | uint32_t min_frac_feedback_div; |
|
| - | 153 | uint32_t max_frac_feedback_div; |
|
| 169 | uint32_t min_frac_feedback_div; |
154 | |
| - | 155 | /* flags for the current clock */ |
|
| - | 156 | uint32_t flags; |
|
| - | 157 | ||
| 170 | uint32_t max_frac_feedback_div; |
158 | /* pll id */ |
| Line 171... | Line 159... | ||
| 171 | uint32_t best_vco; |
159 | uint32_t id; |
| 172 | }; |
160 | }; |
| 173 | 161 | ||
| Line 309... | Line 297... | ||
| 309 | }; |
297 | }; |
| Line 310... | Line 298... | ||
| 310 | 298 | ||
| 311 | struct radeon_encoder_atom_dig { |
299 | struct radeon_encoder_atom_dig { |
| 312 | /* atom dig */ |
300 | /* atom dig */ |
| 313 | bool coherent_mode; |
301 | bool coherent_mode; |
| 314 | int dig_block; |
302 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ |
| 315 | /* atom lvds */ |
303 | /* atom lvds */ |
| 316 | uint32_t lvds_misc; |
304 | uint32_t lvds_misc; |
| 317 | uint16_t panel_pwr_delay; |
305 | uint16_t panel_pwr_delay; |
| 318 | struct radeon_atom_ss *ss; |
306 | struct radeon_atom_ss *ss; |
| Line 332... | Line 320... | ||
| 332 | uint32_t flags; |
320 | uint32_t flags; |
| 333 | uint32_t pixel_clock; |
321 | uint32_t pixel_clock; |
| 334 | enum radeon_rmx_type rmx_type; |
322 | enum radeon_rmx_type rmx_type; |
| 335 | struct drm_display_mode native_mode; |
323 | struct drm_display_mode native_mode; |
| 336 | void *enc_priv; |
324 | void *enc_priv; |
| - | 325 | int hdmi_offset; |
|
| - | 326 | int hdmi_audio_workaround; |
|
| - | 327 | int hdmi_buffer_status; |
|
| 337 | }; |
328 | }; |
| Line 338... | Line 329... | ||
| 338 | 329 | ||
| 339 | struct radeon_connector_atom_dig { |
330 | struct radeon_connector_atom_dig { |
| 340 | uint32_t igp_lane_info; |
331 | uint32_t igp_lane_info; |
| Line 390... | Line 381... | ||
| 390 | struct radeon_framebuffer { |
381 | struct radeon_framebuffer { |
| 391 | struct drm_framebuffer base; |
382 | struct drm_framebuffer base; |
| 392 | struct drm_gem_object *obj; |
383 | struct drm_gem_object *obj; |
| 393 | }; |
384 | }; |
| Line -... | Line 385... | ||
| - | 385 | ||
| - | 386 | extern enum radeon_tv_std |
|
| - | 387 | radeon_combios_get_tv_info(struct radeon_device *rdev); |
|
| - | 388 | extern enum radeon_tv_std |
|
| - | 389 | radeon_atombios_get_tv_info(struct radeon_device *rdev); |
|
| 394 | 390 | ||
| 395 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
391 | extern void radeon_connector_hotplug(struct drm_connector *connector); |
| 396 | extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); |
392 | extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); |
| 397 | extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, |
393 | extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, |
| 398 | struct drm_display_mode *mode); |
394 | struct drm_display_mode *mode); |
| Line 432... | Line 428... | ||
| 432 | uint64_t freq, |
428 | uint64_t freq, |
| 433 | uint32_t *dot_clock_p, |
429 | uint32_t *dot_clock_p, |
| 434 | uint32_t *fb_div_p, |
430 | uint32_t *fb_div_p, |
| 435 | uint32_t *frac_fb_div_p, |
431 | uint32_t *frac_fb_div_p, |
| 436 | uint32_t *ref_div_p, |
432 | uint32_t *ref_div_p, |
| 437 | uint32_t *post_div_p, |
433 | uint32_t *post_div_p); |
| 438 | int flags); |
- | |
| Line 439... | Line 434... | ||
| 439 | 434 | ||
| 440 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, |
435 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, |
| 441 | uint64_t freq, |
436 | uint64_t freq, |
| 442 | uint32_t *dot_clock_p, |
437 | uint32_t *dot_clock_p, |
| 443 | uint32_t *fb_div_p, |
438 | uint32_t *fb_div_p, |
| 444 | uint32_t *frac_fb_div_p, |
439 | uint32_t *frac_fb_div_p, |
| 445 | uint32_t *ref_div_p, |
440 | uint32_t *ref_div_p, |
| 446 | uint32_t *post_div_p, |
- | |
| Line 447... | Line 441... | ||
| 447 | int flags); |
441 | uint32_t *post_div_p); |
| Line 448... | Line 442... | ||
| 448 | 442 | ||
| 449 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
443 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
| Line 468... | Line 462... | ||
| 468 | struct drm_framebuffer *old_fb); |
462 | struct drm_framebuffer *old_fb); |
| 469 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
463 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
| Line 470... | Line 464... | ||
| 470 | 464 | ||
| 471 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
465 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
| 472 | struct drm_framebuffer *old_fb); |
- | |
| Line 473... | Line 466... | ||
| 473 | extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); |
466 | struct drm_framebuffer *old_fb); |
| 474 | 467 | ||
| 475 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
468 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
| 476 | struct drm_file *file_priv, |
469 | struct drm_file *file_priv, |