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| Rev 1221 | Rev 1268 | ||
|---|---|---|---|
| Line 170... | Line 170... | ||
| 170 | CT_EMAC, |
170 | CT_EMAC, |
| 171 | }; |
171 | }; |
| Line 172... | Line 172... | ||
| 172 | 172 | ||
| 173 | struct radeon_mode_info { |
173 | struct radeon_mode_info { |
| - | 174 | struct atom_context *atom_context; |
|
| 174 | struct atom_context *atom_context; |
175 | struct card_info *atom_card_info; |
| 175 | enum radeon_connector_table connector_table; |
176 | enum radeon_connector_table connector_table; |
| 176 | bool mode_config_initialized; |
177 | bool mode_config_initialized; |
| 177 | struct radeon_crtc *crtcs[2]; |
178 | struct radeon_crtc *crtcs[2]; |
| 178 | /* DVI-I properties */ |
179 | /* DVI-I properties */ |
| Line 184... | Line 185... | ||
| 184 | /* legacy TMDS PLL detect */ |
185 | /* legacy TMDS PLL detect */ |
| 185 | struct drm_property *tmds_pll_property; |
186 | struct drm_property *tmds_pll_property; |
| Line 186... | Line 187... | ||
| 186 | 187 | ||
| Line 187... | Line -... | ||
| 187 | }; |
- | |
| 188 | - | ||
| 189 | struct radeon_native_mode { |
- | |
| 190 | /* preferred mode */ |
- | |
| 191 | uint32_t panel_xres, panel_yres; |
- | |
| 192 | uint32_t hoverplus, hsync_width; |
- | |
| 193 | uint32_t hblank; |
- | |
| 194 | uint32_t voverplus, vsync_width; |
- | |
| 195 | uint32_t vblank; |
- | |
| 196 | uint32_t dotclock; |
- | |
| 197 | uint32_t flags; |
- | |
| 198 | }; |
188 | }; |
| 199 | 189 | ||
| Line 200... | Line 190... | ||
| 200 | #define MAX_H_CODE_TIMING_LEN 32 |
190 | #define MAX_H_CODE_TIMING_LEN 32 |
| 201 | #define MAX_V_CODE_TIMING_LEN 32 |
191 | #define MAX_V_CODE_TIMING_LEN 32 |
| Line 226... | Line 216... | ||
| 226 | uint32_t legacy_display_base_addr; |
216 | uint32_t legacy_display_base_addr; |
| 227 | uint32_t legacy_cursor_offset; |
217 | uint32_t legacy_cursor_offset; |
| 228 | enum radeon_rmx_type rmx_type; |
218 | enum radeon_rmx_type rmx_type; |
| 229 | fixed20_12 vsc; |
219 | fixed20_12 vsc; |
| 230 | fixed20_12 hsc; |
220 | fixed20_12 hsc; |
| 231 | struct radeon_native_mode native_mode; |
221 | struct drm_display_mode native_mode; |
| 232 | }; |
222 | }; |
| Line 233... | Line 223... | ||
| 233 | 223 | ||
| 234 | struct radeon_encoder_primary_dac { |
224 | struct radeon_encoder_primary_dac { |
| 235 | /* legacy primary dac */ |
225 | /* legacy primary dac */ |
| Line 246... | Line 236... | ||
| 246 | uint8_t panel_post_divider; |
236 | uint8_t panel_post_divider; |
| 247 | uint16_t panel_fb_divider; |
237 | uint16_t panel_fb_divider; |
| 248 | bool use_bios_dividers; |
238 | bool use_bios_dividers; |
| 249 | uint32_t lvds_gen_cntl; |
239 | uint32_t lvds_gen_cntl; |
| 250 | /* panel mode */ |
240 | /* panel mode */ |
| 251 | struct radeon_native_mode native_mode; |
241 | struct drm_display_mode native_mode; |
| 252 | }; |
242 | }; |
| Line 253... | Line 243... | ||
| 253 | 243 | ||
| 254 | struct radeon_encoder_tv_dac { |
244 | struct radeon_encoder_tv_dac { |
| 255 | /* legacy tv dac */ |
245 | /* legacy tv dac */ |
| Line 269... | Line 259... | ||
| 269 | struct radeon_encoder_int_tmds { |
259 | struct radeon_encoder_int_tmds { |
| 270 | /* legacy int tmds */ |
260 | /* legacy int tmds */ |
| 271 | struct radeon_tmds_pll tmds_pll[4]; |
261 | struct radeon_tmds_pll tmds_pll[4]; |
| 272 | }; |
262 | }; |
| Line -... | Line 263... | ||
| - | 263 | ||
| - | 264 | /* spread spectrum */ |
|
| - | 265 | struct radeon_atom_ss { |
|
| - | 266 | uint16_t percentage; |
|
| - | 267 | uint8_t type; |
|
| - | 268 | uint8_t step; |
|
| - | 269 | uint8_t delay; |
|
| - | 270 | uint8_t range; |
|
| - | 271 | uint8_t refdiv; |
|
| - | 272 | }; |
|
| 273 | 273 | ||
| 274 | struct radeon_encoder_atom_dig { |
274 | struct radeon_encoder_atom_dig { |
| 275 | /* atom dig */ |
275 | /* atom dig */ |
| 276 | bool coherent_mode; |
276 | bool coherent_mode; |
| 277 | int dig_block; |
277 | int dig_block; |
| 278 | /* atom lvds */ |
278 | /* atom lvds */ |
| 279 | uint32_t lvds_misc; |
279 | uint32_t lvds_misc; |
| - | 280 | uint16_t panel_pwr_delay; |
|
| 280 | uint16_t panel_pwr_delay; |
281 | struct radeon_atom_ss *ss; |
| 281 | /* panel mode */ |
282 | /* panel mode */ |
| 282 | struct radeon_native_mode native_mode; |
283 | struct drm_display_mode native_mode; |
| Line 283... | Line 284... | ||
| 283 | }; |
284 | }; |
| 284 | 285 | ||
| 285 | struct radeon_encoder_atom_dac { |
286 | struct radeon_encoder_atom_dac { |
| Line 292... | Line 293... | ||
| 292 | uint32_t devices; |
293 | uint32_t devices; |
| 293 | uint32_t active_device; |
294 | uint32_t active_device; |
| 294 | uint32_t flags; |
295 | uint32_t flags; |
| 295 | uint32_t pixel_clock; |
296 | uint32_t pixel_clock; |
| 296 | enum radeon_rmx_type rmx_type; |
297 | enum radeon_rmx_type rmx_type; |
| 297 | struct radeon_native_mode native_mode; |
298 | struct drm_display_mode native_mode; |
| 298 | void *enc_priv; |
299 | void *enc_priv; |
| 299 | }; |
300 | }; |
| Line 300... | Line 301... | ||
| 300 | 301 | ||
| 301 | struct radeon_connector_atom_dig { |
302 | struct radeon_connector_atom_dig { |
| Line 306... | Line 307... | ||
| 306 | struct radeon_connector { |
307 | struct radeon_connector { |
| 307 | struct drm_connector base; |
308 | struct drm_connector base; |
| 308 | uint32_t connector_id; |
309 | uint32_t connector_id; |
| 309 | uint32_t devices; |
310 | uint32_t devices; |
| 310 | struct radeon_i2c_chan *ddc_bus; |
311 | struct radeon_i2c_chan *ddc_bus; |
| - | 312 | /* some systems have a an hdmi and vga port with a shared ddc line */ |
|
| - | 313 | bool shared_ddc; |
|
| 311 | bool use_digital; |
314 | bool use_digital; |
| 312 | /* we need to mind the EDID between detect |
315 | /* we need to mind the EDID between detect |
| 313 | and get modes due to analog/digital/tvencoder */ |
316 | and get modes due to analog/digital/tvencoder */ |
| 314 | struct edid *edid; |
317 | struct edid *edid; |
| 315 | void *con_priv; |
318 | void *con_priv; |
| 316 | bool dac_load_detect; |
319 | bool dac_load_detect; |
| - | 320 | uint16_t connector_object_id; |
|
| 317 | }; |
321 | }; |
| Line 318... | Line 322... | ||
| 318 | 322 | ||
| 319 | struct radeon_framebuffer { |
323 | struct radeon_framebuffer { |
| 320 | struct drm_framebuffer base; |
324 | struct drm_framebuffer base; |