WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/radeon_fb.c


/*
 * Copyright © 2007 David Airlie
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *     David Airlie
 */
    /*
     *  Modularization
     */
 
//#include 
//#include 
//#include 
//#include 
//#include 
//#include 
//#include 
//#include 
//#include 
//#include 
 
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
#include "radeon_drm.h"
#include "radeon.h"
 
#include 
#include "radeon_object.h"
 
 
#define FB_TYPE_PACKED_PIXELS       0   /* Packed Pixels    */
#define FB_VISUAL_TRUECOLOR     2   /* True color   */
 
struct fb_fix_screeninfo {
    char id[16];            /* identification string eg "TT Builtin" */
    unsigned long smem_start;   /* Start of frame buffer mem */
                    /* (physical address) */
    __u32 smem_len;         /* Length of frame buffer mem */
    __u32 type;         /* see FB_TYPE_*        */
    __u32 type_aux;         /* Interleave for interleaved Planes */
    __u32 visual;           /* see FB_VISUAL_*      */
    __u16 xpanstep;         /* zero if no hardware panning  */
    __u16 ypanstep;         /* zero if no hardware panning  */
    __u16 ywrapstep;        /* zero if no hardware ywrap    */
    __u32 line_length;      /* length of a line in bytes    */
    unsigned long mmio_start;   /* Start of Memory Mapped I/O   */
                    /* (physical address) */
    __u32 mmio_len;         /* Length of Memory Mapped I/O  */
    __u32 accel;            /* Indicate to driver which */
                    /*  specific chip/card we have  */
    __u16 reserved[3];      /* Reserved for future compatibility */
};
 
 
 
 
struct fb_bitfield {
    __u32 offset;           /* beginning of bitfield    */
    __u32 length;           /* length of bitfield       */
    __u32 msb_right;        /* != 0 : Most significant bit is */
                    /* right */
};
 
 
struct fb_var_screeninfo {
    __u32 xres;         /* visible resolution       */
    __u32 yres;
    __u32 xres_virtual;     /* virtual resolution       */
    __u32 yres_virtual;
    __u32 xoffset;          /* offset from virtual to visible */
    __u32 yoffset;          /* resolution           */
 
    __u32 bits_per_pixel;       /* guess what           */
    __u32 grayscale;        /* != 0 Graylevels instead of colors */
 
    struct fb_bitfield red;     /* bitfield in fb mem if true color, */
    struct fb_bitfield green;   /* else only length is significant */
    struct fb_bitfield blue;
    struct fb_bitfield transp;  /* transparency         */
 
    __u32 nonstd;           /* != 0 Non standard pixel format */
 
    __u32 activate;         /* see FB_ACTIVATE_*        */
 
    __u32 height;           /* height of picture in mm    */
    __u32 width;            /* width of picture in mm     */
 
    __u32 accel_flags;      /* (OBSOLETE) see fb_info.flags */
 
    /* Timing: All values in pixclocks, except pixclock (of course) */
    __u32 pixclock;         /* pixel clock in ps (pico seconds) */
    __u32 left_margin;      /* time from sync to picture    */
    __u32 right_margin;     /* time from picture to sync    */
    __u32 upper_margin;     /* time from sync to picture    */
    __u32 lower_margin;
    __u32 hsync_len;        /* length of horizontal sync    */
    __u32 vsync_len;        /* length of vertical sync  */
    __u32 sync;         /* see FB_SYNC_*        */
    __u32 vmode;            /* see FB_VMODE_*       */
    __u32 rotate;           /* angle we rotate counter clockwise */
    __u32 reserved[5];      /* Reserved for future compatibility */
};
 
 
 
struct fb_chroma {
    __u32 redx; /* in fraction of 1024 */
    __u32 greenx;
    __u32 bluex;
    __u32 whitex;
    __u32 redy;
    __u32 greeny;
    __u32 bluey;
    __u32 whitey;
};
 
struct fb_videomode {
    const char *name;   /* optional */
    u32 refresh;        /* optional */
    u32 xres;
    u32 yres;
    u32 pixclock;
    u32 left_margin;
    u32 right_margin;
    u32 upper_margin;
    u32 lower_margin;
    u32 hsync_len;
    u32 vsync_len;
    u32 sync;
    u32 vmode;
    u32 flag;
};
 
 
struct fb_monspecs {
    struct fb_chroma chroma;
    struct fb_videomode *modedb;    /* mode database */
    __u8  manufacturer[4];      /* Manufacturer */
    __u8  monitor[14];      /* Monitor String */
    __u8  serial_no[14];        /* Serial Number */
    __u8  ascii[14];        /* ? */
    __u32 modedb_len;       /* mode database length */
    __u32 model;            /* Monitor Model */
    __u32 serial;           /* Serial Number - Integer */
    __u32 year;         /* Year manufactured */
    __u32 week;         /* Week Manufactured */
    __u32 hfmin;            /* hfreq lower limit (Hz) */
    __u32 hfmax;            /* hfreq upper limit (Hz) */
    __u32 dclkmin;          /* pixelclock lower limit (Hz) */
    __u32 dclkmax;          /* pixelclock upper limit (Hz) */
    __u16 input;            /* display type - see FB_DISP_* */
    __u16 dpms;         /* DPMS support - see FB_DPMS_ */
    __u16 signal;           /* Signal Type - see FB_SIGNAL_* */
    __u16 vfmin;            /* vfreq lower limit (Hz) */
    __u16 vfmax;            /* vfreq upper limit (Hz) */
    __u16 gamma;            /* Gamma - in fractions of 100 */
    __u16 gtf   : 1;        /* supports GTF */
    __u16 misc;         /* Misc flags - see FB_MISC_* */
    __u8  version;          /* EDID version... */
    __u8  revision;         /* ...and revision */
    __u8  max_x;            /* Maximum horizontal size (cm) */
    __u8  max_y;            /* Maximum vertical size (cm) */
};
 
 
struct fb_info {
    int node;
    int flags;
//    struct mutex lock;      /* Lock for open/release/ioctl funcs */
//    struct mutex mm_lock;       /* Lock for fb_mmap and smem_* fields */
    struct fb_var_screeninfo var;   /* Current var */
    struct fb_fix_screeninfo fix;   /* Current fix */
    struct fb_monspecs monspecs;    /* Current Monitor specs */
//    struct work_struct queue;   /* Framebuffer event queue */
//    struct fb_pixmap pixmap;    /* Image hardware mapper */
//    struct fb_pixmap sprite;    /* Cursor hardware mapper */
//    struct fb_cmap cmap;        /* Current cmap */
    struct list_head modelist;      /* mode list */
    struct fb_videomode *mode;  /* current mode */
 
#ifdef CONFIG_FB_BACKLIGHT
    /* assigned backlight device */
    /* set before framebuffer registration,
       remove after unregister */
    struct backlight_device *bl_dev;
 
    /* Backlight level curve */
    struct mutex bl_curve_mutex;
    u8 bl_curve[FB_BACKLIGHT_LEVELS];
#endif
#ifdef CONFIG_FB_DEFERRED_IO
    struct delayed_work deferred_work;
    struct fb_deferred_io *fbdefio;
#endif
 
    struct fb_ops *fbops;
//    struct device *device;      /* This is the parent */
//   struct device *dev;     /* This is this fb device */
    int class_flag;                    /* private sysfs flags */
#ifdef CONFIG_FB_TILEBLITTING
    struct fb_tile_ops *tileops;    /* Tile Blitting */
#endif
    char __iomem *screen_base;  /* Virtual address */
    unsigned long screen_size;  /* Amount of ioremapped VRAM or 0 */
    void *pseudo_palette;       /* Fake palette of 16 colors */
#define FBINFO_STATE_RUNNING    0
#define FBINFO_STATE_SUSPENDED  1
    u32 state;          /* Hardware state i.e suspend */
    void *fbcon_par;                /* fbcon use-only private area */
    /* From here on everything is device dependent */
    void *par;
    /* we need the PCI or similiar aperture base/size not
       smem_start/size as smem_start may just be an object
       allocated inside the aperture so may not actually overlap */
    resource_size_t aperture_base;
    resource_size_t aperture_size;
};
 
 
 
struct radeon_fb_device {
	struct radeon_device		*rdev;
	struct drm_display_mode		*mode;
	struct radeon_framebuffer	*rfb;
    int                         crtc_count;
	/* crtc currently bound to this */
	uint32_t			crtc_ids[2];
};
 
int radeon_gem_fb_object_create(struct radeon_device *rdev, int size,
                 int alignment, int initial_domain,
                 bool discardable, bool kernel,
                 bool interruptible,
                 struct drm_gem_object **obj);
 
struct fb_info *framebuffer_alloc(size_t size);
 
#if 0
static int radeonfb_setcolreg(unsigned regno,
			      unsigned red,
			      unsigned green,
			      unsigned blue,
			      unsigned transp,
			      struct fb_info *info)
{
	struct radeon_fb_device *rfbdev = info->par;
	struct drm_device *dev = rfbdev->rdev->ddev;
	struct drm_crtc *crtc;
	int i;
 
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
		struct drm_mode_set *modeset = &radeon_crtc->mode_set;
		struct drm_framebuffer *fb = modeset->fb;
 
		for (i = 0; i < rfbdev->crtc_count; i++) {
			if (crtc->base.id == rfbdev->crtc_ids[i]) {
				break;
			}
		}
		if (i == rfbdev->crtc_count) {
			continue;
		}
		if (regno > 255) {
			return 1;
		}
		if (fb->depth == 8) {
			radeon_crtc_fb_gamma_set(crtc, red, green, blue, regno);
			return 0;
		}
 
		if (regno < 16) {
			switch (fb->depth) {
			case 15:
				fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) |
					((green & 0xf800) >>  6) |
					((blue & 0xf800) >> 11);
				break;
			case 16:
				fb->pseudo_palette[regno] = (red & 0xf800) |
					((green & 0xfc00) >>  5) |
					((blue  & 0xf800) >> 11);
				break;
			case 24:
			case 32:
				fb->pseudo_palette[regno] = ((red & 0xff00) << 8) |
					(green & 0xff00) |
					((blue  & 0xff00) >> 8);
				break;
			}
		}
	}
	return 0;
}
 
static int radeonfb_check_var(struct fb_var_screeninfo *var,
			      struct fb_info *info)
{
	struct radeon_fb_device *rfbdev = info->par;
	struct radeon_framebuffer *rfb = rfbdev->rfb;
	struct drm_framebuffer *fb = &rfb->base;
	int depth;
 
	if (var->pixclock == -1 || !var->pixclock) {
		return -EINVAL;
	}
	/* Need to resize the fb object !!! */
	if (var->xres > fb->width || var->yres > fb->height) {
		DRM_ERROR("Requested width/height is greater than current fb "
			   "object %dx%d > %dx%d\n", var->xres, var->yres,
			   fb->width, fb->height);
		DRM_ERROR("Need resizing code.\n");
		return -EINVAL;
	}
 
	switch (var->bits_per_pixel) {
	case 16:
		depth = (var->green.length == 6) ? 16 : 15;
		break;
	case 32:
		depth = (var->transp.length > 0) ? 32 : 24;
		break;
	default:
		depth = var->bits_per_pixel;
		break;
	}
 
	switch (depth) {
	case 8:
		var->red.offset = 0;
		var->green.offset = 0;
		var->blue.offset = 0;
		var->red.length = 8;
		var->green.length = 8;
		var->blue.length = 8;
		var->transp.length = 0;
		var->transp.offset = 0;
		break;
	case 15:
		var->red.offset = 10;
		var->green.offset = 5;
		var->blue.offset = 0;
		var->red.length = 5;
		var->green.length = 5;
		var->blue.length = 5;
		var->transp.length = 1;
		var->transp.offset = 15;
		break;
	case 16:
		var->red.offset = 11;
		var->green.offset = 5;
		var->blue.offset = 0;
		var->red.length = 5;
		var->green.length = 6;
		var->blue.length = 5;
		var->transp.length = 0;
		var->transp.offset = 0;
		break;
	case 24:
		var->red.offset = 16;
		var->green.offset = 8;
		var->blue.offset = 0;
		var->red.length = 8;
		var->green.length = 8;
		var->blue.length = 8;
		var->transp.length = 0;
		var->transp.offset = 0;
		break;
	case 32:
		var->red.offset = 16;
		var->green.offset = 8;
		var->blue.offset = 0;
		var->red.length = 8;
		var->green.length = 8;
		var->blue.length = 8;
		var->transp.length = 8;
		var->transp.offset = 24;
		break;
	default:
		return -EINVAL;
	}
	return 0;
}
 
#endif
 
 
/* this will let fbcon do the mode init */
static int radeonfb_set_par(struct fb_info *info)
{
	struct radeon_fb_device *rfbdev = info->par;
	struct drm_device *dev = rfbdev->rdev->ddev;
	struct fb_var_screeninfo *var = &info->var;
	struct drm_crtc *crtc;
	int ret;
	int i;
 
	if (var->pixclock != -1) {
		DRM_ERROR("PIXEL CLCOK SET\n");
		return -EINVAL;
	}
 
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
		for (i = 0; i < rfbdev->crtc_count; i++) {
			if (crtc->base.id == rfbdev->crtc_ids[i]) {
				break;
			}
		}
		if (i == rfbdev->crtc_count) {
			continue;
		}
		if (crtc->fb == radeon_crtc->mode_set.fb) {
//           mutex_lock(&dev->mode_config.mutex);
			ret = crtc->funcs->set_config(&radeon_crtc->mode_set);
//           mutex_unlock(&dev->mode_config.mutex);
			if (ret) {
				return ret;
			}
		}
	}
	return 0;
}
 
#if 0
 
static int radeonfb_pan_display(struct fb_var_screeninfo *var,
				struct fb_info *info)
{
	struct radeon_fb_device *rfbdev = info->par;
	struct drm_device *dev = rfbdev->rdev->ddev;
	struct drm_mode_set *modeset;
	struct drm_crtc *crtc;
	struct radeon_crtc *radeon_crtc;
	int ret = 0;
	int i;
 
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		for (i = 0; i < rfbdev->crtc_count; i++) {
			if (crtc->base.id == rfbdev->crtc_ids[i]) {
				break;
			}
		}
 
		if (i == rfbdev->crtc_count) {
			continue;
		}
 
		radeon_crtc = to_radeon_crtc(crtc);
		modeset = &radeon_crtc->mode_set;
 
		modeset->x = var->xoffset;
		modeset->y = var->yoffset;
 
		if (modeset->num_connectors) {
			mutex_lock(&dev->mode_config.mutex);
			ret = crtc->funcs->set_config(modeset);
			mutex_unlock(&dev->mode_config.mutex);
			if (!ret) {
				info->var.xoffset = var->xoffset;
				info->var.yoffset = var->yoffset;
			}
		}
	}
	return ret;
}
 
static void radeonfb_on(struct fb_info *info)
{
	struct radeon_fb_device *rfbdev = info->par;
	struct drm_device *dev = rfbdev->rdev->ddev;
	struct drm_crtc *crtc;
	struct drm_encoder *encoder;
	int i;
 
	/*
	 * For each CRTC in this fb, find all associated encoders
	 * and turn them off, then turn off the CRTC.
	 */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
 
		for (i = 0; i < rfbdev->crtc_count; i++) {
			if (crtc->base.id == rfbdev->crtc_ids[i]) {
				break;
			}
		}
 
		mutex_lock(&dev->mode_config.mutex);
		crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
		mutex_unlock(&dev->mode_config.mutex);
 
		/* Found a CRTC on this fb, now find encoders */
		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
			if (encoder->crtc == crtc) {
				struct drm_encoder_helper_funcs *encoder_funcs;
 
				encoder_funcs = encoder->helper_private;
				mutex_lock(&dev->mode_config.mutex);
				encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
				mutex_unlock(&dev->mode_config.mutex);
			}
		}
	}
}
 
static void radeonfb_off(struct fb_info *info, int dpms_mode)
{
	struct radeon_fb_device *rfbdev = info->par;
	struct drm_device *dev = rfbdev->rdev->ddev;
	struct drm_crtc *crtc;
	struct drm_encoder *encoder;
	int i;
 
	/*
	 * For each CRTC in this fb, find all associated encoders
	 * and turn them off, then turn off the CRTC.
	 */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
 
		for (i = 0; i < rfbdev->crtc_count; i++) {
			if (crtc->base.id == rfbdev->crtc_ids[i]) {
				break;
			}
		}
 
		/* Found a CRTC on this fb, now find encoders */
		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
			if (encoder->crtc == crtc) {
				struct drm_encoder_helper_funcs *encoder_funcs;
 
				encoder_funcs = encoder->helper_private;
				mutex_lock(&dev->mode_config.mutex);
				encoder_funcs->dpms(encoder, dpms_mode);
				mutex_unlock(&dev->mode_config.mutex);
			}
		}
		if (dpms_mode == DRM_MODE_DPMS_OFF) {
			mutex_lock(&dev->mode_config.mutex);
			crtc_funcs->dpms(crtc, dpms_mode);
			mutex_unlock(&dev->mode_config.mutex);
		}
	}
}
 
int radeonfb_blank(int blank, struct fb_info *info)
{
	switch (blank) {
	case FB_BLANK_UNBLANK:
		radeonfb_on(info);
		break;
	case FB_BLANK_NORMAL:
		radeonfb_off(info, DRM_MODE_DPMS_STANDBY);
		break;
	case FB_BLANK_HSYNC_SUSPEND:
		radeonfb_off(info, DRM_MODE_DPMS_STANDBY);
		break;
	case FB_BLANK_VSYNC_SUSPEND:
		radeonfb_off(info, DRM_MODE_DPMS_SUSPEND);
		break;
	case FB_BLANK_POWERDOWN:
		radeonfb_off(info, DRM_MODE_DPMS_OFF);
		break;
	}
	return 0;
}
 
static struct fb_ops radeonfb_ops = {
	.owner = THIS_MODULE,
	.fb_check_var = radeonfb_check_var,
	.fb_set_par = radeonfb_set_par,
	.fb_setcolreg = radeonfb_setcolreg,
	.fb_fillrect = cfb_fillrect,
	.fb_copyarea = cfb_copyarea,
	.fb_imageblit = cfb_imageblit,
	.fb_pan_display = radeonfb_pan_display,
	.fb_blank = radeonfb_blank,
};
 
/**
 * Curretly it is assumed that the old framebuffer is reused.
 *
 * LOCKING
 * caller should hold the mode config lock.
 *
 */
int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
{
	struct fb_info *info;
	struct drm_framebuffer *fb;
	struct drm_display_mode *mode = crtc->desired_mode;
 
	fb = crtc->fb;
	if (fb == NULL) {
		return 1;
	}
	info = fb->fbdev;
	if (info == NULL) {
		return 1;
	}
	if (mode == NULL) {
		return 1;
	}
	info->var.xres = mode->hdisplay;
	info->var.right_margin = mode->hsync_start - mode->hdisplay;
	info->var.hsync_len = mode->hsync_end - mode->hsync_start;
	info->var.left_margin = mode->htotal - mode->hsync_end;
	info->var.yres = mode->vdisplay;
	info->var.lower_margin = mode->vsync_start - mode->vdisplay;
	info->var.vsync_len = mode->vsync_end - mode->vsync_start;
	info->var.upper_margin = mode->vtotal - mode->vsync_end;
	info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
	/* avoid overflow */
	info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
 
	return 0;
}
EXPORT_SYMBOL(radeonfb_resize);
 
static struct drm_mode_set panic_mode;
 
int radeonfb_panic(struct notifier_block *n, unsigned long ununsed,
		  void *panic_str)
{
	DRM_ERROR("panic occurred, switching back to text console\n");
	drm_crtc_helper_set_config(&panic_mode);
	return 0;
}
EXPORT_SYMBOL(radeonfb_panic);
 
static struct notifier_block paniced = {
	.notifier_call = radeonfb_panic,
};
#endif
 
static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp)
{
	int aligned = width;
	int align_large = (ASIC_IS_AVIVO(rdev));
	int pitch_mask = 0;
 
	switch (bpp / 8) {
	case 1:
		pitch_mask = align_large ? 255 : 127;
		break;
	case 2:
		pitch_mask = align_large ? 127 : 31;
		break;
	case 3:
	case 4:
		pitch_mask = align_large ? 63 : 15;
		break;
	}
 
	aligned += pitch_mask;
	aligned &= ~pitch_mask;
	return aligned;
}
 
int radeonfb_create(struct radeon_device *rdev,
		    uint32_t fb_width, uint32_t fb_height,
		    uint32_t surface_width, uint32_t surface_height,
		    struct radeon_framebuffer **rfb_p)
{
	struct fb_info *info;
	struct radeon_fb_device *rfbdev;
	struct drm_framebuffer *fb = NULL;
	struct radeon_framebuffer *rfb;
	struct drm_mode_fb_cmd mode_cmd;
	struct drm_gem_object *gobj = NULL;
	struct radeon_object *robj = NULL;
//   struct device *device = &rdev->pdev->dev;
	int size, aligned_size, ret;
	u64 fb_gpuaddr;
	void *fbptr = NULL;
	unsigned long tmp;
 
    ENTRY();
 
	mode_cmd.width = surface_width;
	mode_cmd.height = surface_height;
	mode_cmd.bpp = 32;
	/* need to align pitch with crtc limits */
	mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp) * ((mode_cmd.bpp + 1) / 8);
    mode_cmd.depth = 32;
 
	size = mode_cmd.pitch * mode_cmd.height;
	aligned_size = ALIGN(size, PAGE_SIZE);
 
    ret = radeon_gem_fb_object_create(rdev, aligned_size, 0,
			RADEON_GEM_DOMAIN_VRAM,
            false, 0,
			false, &gobj);
 
 
	if (ret) {
		printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
		       surface_width, surface_height);
		ret = -ENOMEM;
		goto out;
	}
	robj = gobj->driver_private;
 
//   mutex_lock(&rdev->ddev->struct_mutex);
	fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
	if (fb == NULL) {
		DRM_ERROR("failed to allocate fb.\n");
		ret = -ENOMEM;
		goto out_unref;
	}
	ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
	if (ret) {
		printk(KERN_ERR "failed to pin framebuffer\n");
		ret = -ENOMEM;
		goto out_unref;
	}
 
	list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
 
	rfb = to_radeon_framebuffer(fb);
	*rfb_p = rfb;
	rdev->fbdev_rfb = rfb;
	rdev->fbdev_robj = robj;
 
    info = framebuffer_alloc(sizeof(struct radeon_fb_device));
	if (info == NULL) {
		ret = -ENOMEM;
		goto out_unref;
	}
	rfbdev = info->par;
 
//   ret = radeon_object_kmap(robj, &fbptr);
//   if (ret) {
//       goto out_unref;
//   }
 
    fbptr = (void*)0xFE000000; // LFB_BASE
 
 
	strcpy(info->fix.id, "radeondrmfb");
	info->fix.type = FB_TYPE_PACKED_PIXELS;
	info->fix.visual = FB_VISUAL_TRUECOLOR;
	info->fix.type_aux = 0;
	info->fix.xpanstep = 1; /* doing it in hw */
	info->fix.ypanstep = 1; /* doing it in hw */
	info->fix.ywrapstep = 0;
//   info->fix.accel = FB_ACCEL_NONE;
	info->fix.type_aux = 0;
//   info->flags = FBINFO_DEFAULT;
//   info->fbops = &radeonfb_ops;
	info->fix.line_length = fb->pitch;
	tmp = fb_gpuaddr - rdev->mc.vram_location;
	info->fix.smem_start = rdev->mc.aper_base + tmp;
	info->fix.smem_len = size;
	info->screen_base = fbptr;
	info->screen_size = size;
	info->pseudo_palette = fb->pseudo_palette;
	info->var.xres_virtual = fb->width;
	info->var.yres_virtual = fb->height;
	info->var.bits_per_pixel = fb->bits_per_pixel;
	info->var.xoffset = 0;
	info->var.yoffset = 0;
//   info->var.activate = FB_ACTIVATE_NOW;
	info->var.height = -1;
	info->var.width = -1;
	info->var.xres = fb_width;
	info->var.yres = fb_height;
	info->fix.mmio_start = 0;
	info->fix.mmio_len = 0;
//   info->pixmap.size = 64*1024;
//   info->pixmap.buf_align = 8;
//   info->pixmap.access_align = 32;
//   info->pixmap.flags = FB_PIXMAP_SYSTEM;
//   info->pixmap.scan_align = 1;
	if (info->screen_base == NULL) {
		ret = -ENOSPC;
		goto out_unref;
	}
	DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
	DRM_INFO("size %lu\n", (unsigned long)size);
	DRM_INFO("fb depth is %d\n", fb->depth);
	DRM_INFO("   pitch is %d\n", fb->pitch);
 
	switch (fb->depth) {
	case 8:
		info->var.red.offset = 0;
		info->var.green.offset = 0;
		info->var.blue.offset = 0;
		info->var.red.length = 8; /* 8bit DAC */
		info->var.green.length = 8;
		info->var.blue.length = 8;
		info->var.transp.offset = 0;
		info->var.transp.length = 0;
		break;
	case 15:
		info->var.red.offset = 10;
		info->var.green.offset = 5;
		info->var.blue.offset = 0;
		info->var.red.length = 5;
		info->var.green.length = 5;
		info->var.blue.length = 5;
		info->var.transp.offset = 15;
		info->var.transp.length = 1;
		break;
	case 16:
		info->var.red.offset = 11;
		info->var.green.offset = 5;
		info->var.blue.offset = 0;
		info->var.red.length = 5;
		info->var.green.length = 6;
		info->var.blue.length = 5;
		info->var.transp.offset = 0;
		break;
	case 24:
		info->var.red.offset = 16;
		info->var.green.offset = 8;
		info->var.blue.offset = 0;
		info->var.red.length = 8;
		info->var.green.length = 8;
		info->var.blue.length = 8;
		info->var.transp.offset = 0;
		info->var.transp.length = 0;
		break;
	case 32:
		info->var.red.offset = 16;
		info->var.green.offset = 8;
		info->var.blue.offset = 0;
		info->var.red.length = 8;
		info->var.green.length = 8;
		info->var.blue.length = 8;
		info->var.transp.offset = 24;
		info->var.transp.length = 8;
		break;
	default:
		break;
	}
 
    dbgprintf("fb = %x\n", fb);
 
	fb->fbdev = info;
	rfbdev->rfb = rfb;
	rfbdev->rdev = rdev;
 
//   mutex_unlock(&rdev->ddev->struct_mutex);
	return 0;
 
out_unref:
	if (robj) {
//       radeon_object_kunmap(robj);
	}
	if (fb && ret) {
		list_del(&fb->filp_head);
 //      drm_gem_object_unreference(gobj);
//       drm_framebuffer_cleanup(fb);
		kfree(fb);
	}
//   drm_gem_object_unreference(gobj);
//   mutex_unlock(&rdev->ddev->struct_mutex);
out:
	return ret;
}
 
static int radeonfb_single_fb_probe(struct radeon_device *rdev)
{
	struct drm_crtc *crtc;
	struct drm_connector *connector;
	unsigned int fb_width = (unsigned)-1, fb_height = (unsigned)-1;
	unsigned int surface_width = 0, surface_height = 0;
	int new_fb = 0;
	int crtc_count = 0;
	int ret, i, conn_count = 0;
	struct radeon_framebuffer *rfb;
	struct fb_info *info;
	struct radeon_fb_device *rfbdev;
	struct drm_mode_set *modeset = NULL;
 
    ENTRY();
 
	/* first up get a count of crtcs now in use and new min/maxes width/heights */
	list_for_each_entry(crtc, &rdev->ddev->mode_config.crtc_list, head) {
		if (drm_helper_crtc_in_use(crtc)) {
			if (crtc->desired_mode) {
				if (crtc->desired_mode->hdisplay < fb_width)
					fb_width = crtc->desired_mode->hdisplay;
 
				if (crtc->desired_mode->vdisplay < fb_height)
					fb_height = crtc->desired_mode->vdisplay;
 
				if (crtc->desired_mode->hdisplay > surface_width)
					surface_width = crtc->desired_mode->hdisplay;
 
				if (crtc->desired_mode->vdisplay > surface_height)
					surface_height = crtc->desired_mode->vdisplay;
			}
			crtc_count++;
		}
	}
 
	if (crtc_count == 0 || fb_width == -1 || fb_height == -1) {
		/* hmm everyone went away - assume VGA cable just fell out
		   and will come back later. */
 
        dbgprintf("crtc count %x width %x height %x\n",
                   crtc_count, fb_width, fb_height);
		return 0;
	}
 
	/* do we have an fb already? */
	if (list_empty(&rdev->ddev->mode_config.fb_kernel_list)) {
		/* create an fb if we don't have one */
		ret = radeonfb_create(rdev, fb_width, fb_height, surface_width, surface_height, &rfb);
		if (ret) {
			return -EINVAL;
		}
		new_fb = 1;
	} else {
		struct drm_framebuffer *fb;
		fb = list_first_entry(&rdev->ddev->mode_config.fb_kernel_list, struct drm_framebuffer, filp_head);
		rfb = to_radeon_framebuffer(fb);
 
		/* if someone hotplugs something bigger than we have already allocated, we are pwned.
		   As really we can't resize an fbdev that is in the wild currently due to fbdev
		   not really being designed for the lower layers moving stuff around under it.
		   - so in the grand style of things - punt. */
		if ((fb->width < surface_width) || (fb->height < surface_height)) {
			DRM_ERROR("Framebuffer not large enough to scale console onto.\n");
			return -EINVAL;
		}
	}
 
	info = rfb->base.fbdev;
	rdev->fbdev_info = info;
	rfbdev = info->par;
 
	crtc_count = 0;
	/* okay we need to setup new connector sets in the crtcs */
	list_for_each_entry(crtc, &rdev->ddev->mode_config.crtc_list, head) {
		struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
		modeset = &radeon_crtc->mode_set;
		modeset->fb = &rfb->base;
		conn_count = 0;
		list_for_each_entry(connector, &rdev->ddev->mode_config.connector_list, head) {
			if (connector->encoder)
				if (connector->encoder->crtc == modeset->crtc) {
					modeset->connectors[conn_count] = connector;
					conn_count++;
					if (conn_count > RADEONFB_CONN_LIMIT)
						BUG();
				}
		}
 
		for (i = conn_count; i < RADEONFB_CONN_LIMIT; i++)
			modeset->connectors[i] = NULL;
 
 
		rfbdev->crtc_ids[crtc_count++] = crtc->base.id;
 
		modeset->num_connectors = conn_count;
		if (modeset->crtc->desired_mode) {
			if (modeset->mode) {
				drm_mode_destroy(rdev->ddev, modeset->mode);
			}
			modeset->mode = drm_mode_duplicate(rdev->ddev,
							   modeset->crtc->desired_mode);
		}
	}
	rfbdev->crtc_count = crtc_count;
 
	if (new_fb) {
		info->var.pixclock = -1;
//       if (register_framebuffer(info) < 0)
//           return -EINVAL;
	} else {
		radeonfb_set_par(info);
	}
	printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node,
	       info->fix.id);
 
	/* Switch back to kernel console on panic */
//   panic_mode = *modeset;
//   atomic_notifier_chain_register(&panic_notifier_list, &paniced);
//   printk(KERN_INFO "registered panic notifier\n");
    LEAVE();
 
	return 0;
}
 
int radeonfb_probe(struct drm_device *dev)
{
	int ret;
 
	/* something has changed in the lower levels of hell - deal with it
	   here */
 
	/* two modes : a) 1 fb to rule all crtcs.
	               b) one fb per crtc.
	   two actions 1) new connected device
	               2) device removed.
	   case a/1 : if the fb surface isn't big enough - resize the surface fb.
	              if the fb size isn't big enough - resize fb into surface.
		      if everything big enough configure the new crtc/etc.
	   case a/2 : undo the configuration
	              possibly resize down the fb to fit the new configuration.
           case b/1 : see if it is on a new crtc - setup a new fb and add it.
	   case b/2 : teardown the new fb.
	*/
	ret = radeonfb_single_fb_probe(dev->dev_private);
	return ret;
}
EXPORT_SYMBOL(radeonfb_probe);
 
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
{
	struct fb_info *info;
	struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
	struct radeon_object *robj;
 
	if (!fb) {
		return -EINVAL;
	}
	info = fb->fbdev;
	if (info) {
		robj = rfb->obj->driver_private;
//       unregister_framebuffer(info);
//       radeon_object_kunmap(robj);
//       radeon_object_unpin(robj);
//       framebuffer_release(info);
	}
 
	printk(KERN_INFO "unregistered panic notifier\n");
//   atomic_notifier_chain_unregister(&panic_notifier_list, &paniced);
//   memset(&panic_mode, 0, sizeof(struct drm_mode_set));
	return 0;
}
EXPORT_SYMBOL(radeonfb_remove);
 
 
/**
 * Allocate a GEM object of the specified size with shmfs backing store
 */
struct drm_gem_object *
drm_gem_object_alloc(struct drm_device *dev, size_t size)
{
    struct drm_gem_object *obj;
 
    BUG_ON((size & (PAGE_SIZE - 1)) != 0);
 
    obj = kzalloc(sizeof(*obj), GFP_KERNEL);
 
    obj->dev = dev;
//    obj->filp = shmem_file_setup("drm mm object", size, VM_NORESERVE);
//    if (IS_ERR(obj->filp)) {
//        kfree(obj);
//        return NULL;
//    }
 
//    kref_init(&obj->refcount);
//    kref_init(&obj->handlecount);
    obj->size = size;
 
//    if (dev->driver->gem_init_object != NULL &&
//        dev->driver->gem_init_object(obj) != 0) {
//        fput(obj->filp);
//        kfree(obj);
//        return NULL;
//    }
//    atomic_inc(&dev->object_count);
//    atomic_add(obj->size, &dev->object_memory);
    return obj;
}
 
 
int radeon_gem_fb_object_create(struct radeon_device *rdev, int size,
                 int alignment, int initial_domain,
                 bool discardable, bool kernel,
                 bool interruptible,
                 struct drm_gem_object **obj)
{
    struct drm_gem_object *gobj;
    struct radeon_object *robj;
 
    *obj = NULL;
    gobj = drm_gem_object_alloc(rdev->ddev, size);
    if (!gobj) {
        return -ENOMEM;
    }
    /* At least align on page size */
    if (alignment < PAGE_SIZE) {
        alignment = PAGE_SIZE;
    }
 
    robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);
    if (!robj) {
        DRM_ERROR("Failed to allocate GEM object (%d, %d, %u)\n",
              size, initial_domain, alignment);
//       mutex_lock(&rdev->ddev->struct_mutex);
//       drm_gem_object_unreference(gobj);
//       mutex_unlock(&rdev->ddev->struct_mutex);
        return -ENOMEM;;
    }
    robj->rdev = rdev;
    robj->gobj = gobj;
    INIT_LIST_HEAD(&robj->list);
 
    robj->flags = TTM_PL_FLAG_VRAM;
 
    struct drm_mm_node *vm_node;
 
    vm_node = kzalloc(sizeof(*vm_node),0);
 
    vm_node->free = 0;
    vm_node->size = 0x800000 >> 12;
    vm_node->start = 0;
    vm_node->mm = NULL;
 
    robj->mm_node = vm_node;
 
    robj->vm_addr = ((uint32_t)robj->mm_node->start);
 
    gobj->driver_private = robj;
    *obj = gobj;
    return 0;
}
 
 
struct fb_info *framebuffer_alloc(size_t size)
{
#define BYTES_PER_LONG (BITS_PER_LONG/8)
#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))
        int fb_info_size = sizeof(struct fb_info);
        struct fb_info *info;
        char *p;
 
        if (size)
                fb_info_size += PADDING;
 
        p = kzalloc(fb_info_size + size, GFP_KERNEL);
 
        if (!p)
                return NULL;
 
        info = (struct fb_info *) p;
 
        if (size)
                info->par = p + fb_info_size;
 
        return info;
#undef PADDING
#undef BYTES_PER_LONG
}
 
static char *manufacturer_name(unsigned char *x)
{
    static char name[4];
 
    name[0] = ((x[0] & 0x7C) >> 2) + '@';
    name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@';
    name[2] = (x[1] & 0x1F) + '@';
    name[3] = 0;
 
    return name;
}
 
 
bool set_mode(struct drm_device *dev, int width, int height)
{
    struct drm_connector *connector;
 
    bool   ret;
 
    ENTRY();
 
    list_for_each_entry(connector, &dev->mode_config.connector_list, head)
    {
        struct drm_display_mode *mode;
 
        struct drm_encoder  *encoder;
        struct drm_crtc     *crtc;
 
        if( connector->status != connector_status_connected)
            continue;
 
        encoder = connector->encoder;
        if( encoder == NULL)
            continue;
 
        crtc = encoder->crtc;
 
        if(crtc == NULL)
            continue;
 
        list_for_each_entry(mode, &connector->modes, head)
        {
            char *con_name, *enc_name;
 
            struct drm_framebuffer *fb;
 
            if (drm_mode_width(mode) == width &&
                drm_mode_height(mode) == height)
            {
                char con_edid[128];
 
                fb = list_first_entry(&dev->mode_config.fb_kernel_list,
                                      struct drm_framebuffer, filp_head);
 
                memcpy(con_edid, connector->edid_blob_ptr->data, 128);
 
                dbgprintf("Manufacturer: %s Model %x Serial Number %u\n",
                manufacturer_name(con_edid + 0x08),
                (unsigned short)(con_edid[0x0A] + (con_edid[0x0B] << 8)),
                (unsigned int)(con_edid[0x0C] + (con_edid[0x0D] << 8)
                    + (con_edid[0x0E] << 16) + (con_edid[0x0F] << 24)));
 
 
                con_name = drm_get_connector_name(connector);
                enc_name = drm_get_encoder_name(encoder);
 
                dbgprintf("set mode %d %d connector %s encoder %s\n",
                           width, height, con_name, enc_name);
 
                fb->width = width;
                fb->height = height;
                fb->pitch = radeon_align_pitch(dev->dev_private, width, 32)
                            * ((32 + 1) / 8);
 
                crtc->fb = fb;
 
                ret = drm_crtc_helper_set_mode(crtc, mode, 0, 0, fb);
 
                sysSetScreen(width,height);
 
                if (ret == true)
                {
                }
                else
                {
                    DRM_ERROR("failed to set mode %d_%d on crtc %p\n",
                               width, height, crtc);
                };
 
                return ret;
            };
        }
    };
 
    return false;
};


Rev 1126	Rev 1128
1	/*	1	/*
2	* Copyright © 2007 David Airlie	2	* Copyright © 2007 David Airlie
3	*	3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a	4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),	5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation	6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the	8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:	9	* Software is furnished to do so, subject to the following conditions:
10	*	10	*
11	* The above copyright notice and this permission notice (including the next	11	* The above copyright notice and this permission notice (including the next
12	* paragraph) shall be included in all copies or substantial portions of the	12	* paragraph) shall be included in all copies or substantial portions of the
13	* Software.	13	* Software.
14	*	14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21	* DEALINGS IN THE SOFTWARE.	21	* DEALINGS IN THE SOFTWARE.
22	*	22	*
23	* Authors:	23	* Authors:
24	* David Airlie	24	* David Airlie
25	*/	25	*/
26	/*	26	/*
27	* Modularization	27	* Modularization
28	*/	28	*/
29		29
30	//#include	30	//#include
31	//#include	31	//#include
32	//#include	32	//#include
33	//#include	33	//#include
34	//#include	34	//#include
35	//#include	35	//#include
36	//#include	36	//#include
37	//#include	37	//#include
38	//#include	38	//#include
39	//#include	39	//#include
40		40
41	#include "drmP.h"	41	#include "drmP.h"
42	#include "drm.h"	42	#include "drm.h"
43	#include "drm_crtc.h"	43	#include "drm_crtc.h"
44	#include "drm_crtc_helper.h"	44	#include "drm_crtc_helper.h"
45	#include "radeon_drm.h"	45	#include "radeon_drm.h"
46	#include "radeon.h"	46	#include "radeon.h"
47		47
48	#include	48	#include
49	#include "radeon_object.h"	49	#include "radeon_object.h"
50		50
51		51
52	#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */	52	#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
53	#define FB_VISUAL_TRUECOLOR 2 /* True color */	53	#define FB_VISUAL_TRUECOLOR 2 /* True color */
54		54
55	struct fb_fix_screeninfo {	55	struct fb_fix_screeninfo {
56	char id[16]; /* identification string eg "TT Builtin" */	56	char id[16]; /* identification string eg "TT Builtin" */
57	unsigned long smem_start; /* Start of frame buffer mem */	57	unsigned long smem_start; /* Start of frame buffer mem */
58	/* (physical address) */	58	/* (physical address) */
59	__u32 smem_len; /* Length of frame buffer mem */	59	__u32 smem_len; /* Length of frame buffer mem */
60	__u32 type; /* see FB_TYPE_* */	60	__u32 type; /* see FB_TYPE_* */
61	__u32 type_aux; /* Interleave for interleaved Planes */	61	__u32 type_aux; /* Interleave for interleaved Planes */
62	__u32 visual; /* see FB_VISUAL_* */	62	__u32 visual; /* see FB_VISUAL_* */
63	__u16 xpanstep; /* zero if no hardware panning */	63	__u16 xpanstep; /* zero if no hardware panning */
64	__u16 ypanstep; /* zero if no hardware panning */	64	__u16 ypanstep; /* zero if no hardware panning */
65	__u16 ywrapstep; /* zero if no hardware ywrap */	65	__u16 ywrapstep; /* zero if no hardware ywrap */
66	__u32 line_length; /* length of a line in bytes */	66	__u32 line_length; /* length of a line in bytes */
67	unsigned long mmio_start; /* Start of Memory Mapped I/O */	67	unsigned long mmio_start; /* Start of Memory Mapped I/O */
68	/* (physical address) */	68	/* (physical address) */
69	__u32 mmio_len; /* Length of Memory Mapped I/O */	69	__u32 mmio_len; /* Length of Memory Mapped I/O */
70	__u32 accel; /* Indicate to driver which */	70	__u32 accel; /* Indicate to driver which */
71	/* specific chip/card we have */	71	/* specific chip/card we have */
72	__u16 reserved[3]; /* Reserved for future compatibility */	72	__u16 reserved[3]; /* Reserved for future compatibility */
73	};	73	};
74		74
75		75
76		76
77		77
78	struct fb_bitfield {	78	struct fb_bitfield {
79	__u32 offset; /* beginning of bitfield */	79	__u32 offset; /* beginning of bitfield */
80	__u32 length; /* length of bitfield */	80	__u32 length; /* length of bitfield */
81	__u32 msb_right; /* != 0 : Most significant bit is */	81	__u32 msb_right; /* != 0 : Most significant bit is */
82	/* right */	82	/* right */
83	};	83	};
84		84
85		85
86	struct fb_var_screeninfo {	86	struct fb_var_screeninfo {
87	__u32 xres; /* visible resolution */	87	__u32 xres; /* visible resolution */
88	__u32 yres;	88	__u32 yres;
89	__u32 xres_virtual; /* virtual resolution */	89	__u32 xres_virtual; /* virtual resolution */
90	__u32 yres_virtual;	90	__u32 yres_virtual;
91	__u32 xoffset; /* offset from virtual to visible */	91	__u32 xoffset; /* offset from virtual to visible */
92	__u32 yoffset; /* resolution */	92	__u32 yoffset; /* resolution */
93		93
94	__u32 bits_per_pixel; /* guess what */	94	__u32 bits_per_pixel; /* guess what */
95	__u32 grayscale; /* != 0 Graylevels instead of colors */	95	__u32 grayscale; /* != 0 Graylevels instead of colors */
96		96
97	struct fb_bitfield red; /* bitfield in fb mem if true color, */	97	struct fb_bitfield red; /* bitfield in fb mem if true color, */
98	struct fb_bitfield green; /* else only length is significant */	98	struct fb_bitfield green; /* else only length is significant */
99	struct fb_bitfield blue;	99	struct fb_bitfield blue;
100	struct fb_bitfield transp; /* transparency */	100	struct fb_bitfield transp; /* transparency */
101		101
102	__u32 nonstd; /* != 0 Non standard pixel format */	102	__u32 nonstd; /* != 0 Non standard pixel format */
103		103
104	__u32 activate; /* see FB_ACTIVATE_* */	104	__u32 activate; /* see FB_ACTIVATE_* */
105		105
106	__u32 height; /* height of picture in mm */	106	__u32 height; /* height of picture in mm */
107	__u32 width; /* width of picture in mm */	107	__u32 width; /* width of picture in mm */
108		108
109	__u32 accel_flags; /* (OBSOLETE) see fb_info.flags */	109	__u32 accel_flags; /* (OBSOLETE) see fb_info.flags */
110		110
111	/* Timing: All values in pixclocks, except pixclock (of course) */	111	/* Timing: All values in pixclocks, except pixclock (of course) */
112	__u32 pixclock; /* pixel clock in ps (pico seconds) */	112	__u32 pixclock; /* pixel clock in ps (pico seconds) */
113	__u32 left_margin; /* time from sync to picture */	113	__u32 left_margin; /* time from sync to picture */
114	__u32 right_margin; /* time from picture to sync */	114	__u32 right_margin; /* time from picture to sync */
115	__u32 upper_margin; /* time from sync to picture */	115	__u32 upper_margin; /* time from sync to picture */
116	__u32 lower_margin;	116	__u32 lower_margin;
117	__u32 hsync_len; /* length of horizontal sync */	117	__u32 hsync_len; /* length of horizontal sync */
118	__u32 vsync_len; /* length of vertical sync */	118	__u32 vsync_len; /* length of vertical sync */
119	__u32 sync; /* see FB_SYNC_* */	119	__u32 sync; /* see FB_SYNC_* */
120	__u32 vmode; /* see FB_VMODE_* */	120	__u32 vmode; /* see FB_VMODE_* */
121	__u32 rotate; /* angle we rotate counter clockwise */	121	__u32 rotate; /* angle we rotate counter clockwise */
122	__u32 reserved[5]; /* Reserved for future compatibility */	122	__u32 reserved[5]; /* Reserved for future compatibility */
123	};	123	};
124		124
125		125
126		126
127	struct fb_chroma {	127	struct fb_chroma {
128	__u32 redx; /* in fraction of 1024 */	128	__u32 redx; /* in fraction of 1024 */
129	__u32 greenx;	129	__u32 greenx;
130	__u32 bluex;	130	__u32 bluex;
131	__u32 whitex;	131	__u32 whitex;
132	__u32 redy;	132	__u32 redy;
133	__u32 greeny;	133	__u32 greeny;
134	__u32 bluey;	134	__u32 bluey;
135	__u32 whitey;	135	__u32 whitey;
136	};	136	};
137		137
138	struct fb_videomode {	138	struct fb_videomode {
139	const char name; / optional */	139	const char name; / optional */
140	u32 refresh; /* optional */	140	u32 refresh; /* optional */
141	u32 xres;	141	u32 xres;
142	u32 yres;	142	u32 yres;
143	u32 pixclock;	143	u32 pixclock;
144	u32 left_margin;	144	u32 left_margin;
145	u32 right_margin;	145	u32 right_margin;
146	u32 upper_margin;	146	u32 upper_margin;
147	u32 lower_margin;	147	u32 lower_margin;
148	u32 hsync_len;	148	u32 hsync_len;
149	u32 vsync_len;	149	u32 vsync_len;
150	u32 sync;	150	u32 sync;
151	u32 vmode;	151	u32 vmode;
152	u32 flag;	152	u32 flag;
153	};	153	};
154		154
155		155
156	struct fb_monspecs {	156	struct fb_monspecs {
157	struct fb_chroma chroma;	157	struct fb_chroma chroma;
158	struct fb_videomode modedb; / mode database */	158	struct fb_videomode modedb; / mode database */
159	__u8 manufacturer[4]; /* Manufacturer */	159	__u8 manufacturer[4]; /* Manufacturer */
160	__u8 monitor[14]; /* Monitor String */	160	__u8 monitor[14]; /* Monitor String */
161	__u8 serial_no[14]; /* Serial Number */	161	__u8 serial_no[14]; /* Serial Number */
162	__u8 ascii[14]; /* ? */	162	__u8 ascii[14]; /* ? */
163	__u32 modedb_len; /* mode database length */	163	__u32 modedb_len; /* mode database length */
164	__u32 model; /* Monitor Model */	164	__u32 model; /* Monitor Model */
165	__u32 serial; /* Serial Number - Integer */	165	__u32 serial; /* Serial Number - Integer */
166	__u32 year; /* Year manufactured */	166	__u32 year; /* Year manufactured */
167	__u32 week; /* Week Manufactured */	167	__u32 week; /* Week Manufactured */
168	__u32 hfmin; /* hfreq lower limit (Hz) */	168	__u32 hfmin; /* hfreq lower limit (Hz) */
169	__u32 hfmax; /* hfreq upper limit (Hz) */	169	__u32 hfmax; /* hfreq upper limit (Hz) */
170	__u32 dclkmin; /* pixelclock lower limit (Hz) */	170	__u32 dclkmin; /* pixelclock lower limit (Hz) */
171	__u32 dclkmax; /* pixelclock upper limit (Hz) */	171	__u32 dclkmax; /* pixelclock upper limit (Hz) */
172	__u16 input; /* display type - see FB_DISP_* */	172	__u16 input; /* display type - see FB_DISP_* */
173	__u16 dpms; /* DPMS support - see FB_DPMS_ */	173	__u16 dpms; /* DPMS support - see FB_DPMS_ */
174	__u16 signal; /* Signal Type - see FB_SIGNAL_* */	174	__u16 signal; /* Signal Type - see FB_SIGNAL_* */
175	__u16 vfmin; /* vfreq lower limit (Hz) */	175	__u16 vfmin; /* vfreq lower limit (Hz) */
176	__u16 vfmax; /* vfreq upper limit (Hz) */	176	__u16 vfmax; /* vfreq upper limit (Hz) */
177	__u16 gamma; /* Gamma - in fractions of 100 */	177	__u16 gamma; /* Gamma - in fractions of 100 */
178	__u16 gtf : 1; /* supports GTF */	178	__u16 gtf : 1; /* supports GTF */
179	__u16 misc; /* Misc flags - see FB_MISC_* */	179	__u16 misc; /* Misc flags - see FB_MISC_* */
180	__u8 version; /* EDID version... */	180	__u8 version; /* EDID version... */
181	__u8 revision; /* ...and revision */	181	__u8 revision; /* ...and revision */
182	__u8 max_x; /* Maximum horizontal size (cm) */	182	__u8 max_x; /* Maximum horizontal size (cm) */
183	__u8 max_y; /* Maximum vertical size (cm) */	183	__u8 max_y; /* Maximum vertical size (cm) */
184	};	184	};
185		185
186		186
187	struct fb_info {	187	struct fb_info {
188	int node;	188	int node;
189	int flags;	189	int flags;
190	// struct mutex lock; /* Lock for open/release/ioctl funcs */	190	// struct mutex lock; /* Lock for open/release/ioctl funcs */
191	// struct mutex mm_lock; /* Lock for fb_mmap and smem_* fields */	191	// struct mutex mm_lock; /* Lock for fb_mmap and smem_* fields */
192	struct fb_var_screeninfo var; /* Current var */	192	struct fb_var_screeninfo var; /* Current var */
193	struct fb_fix_screeninfo fix; /* Current fix */	193	struct fb_fix_screeninfo fix; /* Current fix */
194	struct fb_monspecs monspecs; /* Current Monitor specs */	194	struct fb_monspecs monspecs; /* Current Monitor specs */
195	// struct work_struct queue; /* Framebuffer event queue */	195	// struct work_struct queue; /* Framebuffer event queue */
196	// struct fb_pixmap pixmap; /* Image hardware mapper */	196	// struct fb_pixmap pixmap; /* Image hardware mapper */
197	// struct fb_pixmap sprite; /* Cursor hardware mapper */	197	// struct fb_pixmap sprite; /* Cursor hardware mapper */
198	// struct fb_cmap cmap; /* Current cmap */	198	// struct fb_cmap cmap; /* Current cmap */
199	struct list_head modelist; /* mode list */	199	struct list_head modelist; /* mode list */
200	struct fb_videomode mode; / current mode */	200	struct fb_videomode mode; / current mode */
201		201
202	#ifdef CONFIG_FB_BACKLIGHT	202	#ifdef CONFIG_FB_BACKLIGHT
203	/* assigned backlight device */	203	/* assigned backlight device */
204	/* set before framebuffer registration,	204	/* set before framebuffer registration,
205	remove after unregister */	205	remove after unregister */
206	struct backlight_device *bl_dev;	206	struct backlight_device *bl_dev;
207		207
208	/* Backlight level curve */	208	/* Backlight level curve */
209	struct mutex bl_curve_mutex;	209	struct mutex bl_curve_mutex;
210	u8 bl_curve[FB_BACKLIGHT_LEVELS];	210	u8 bl_curve[FB_BACKLIGHT_LEVELS];
211	#endif	211	#endif
212	#ifdef CONFIG_FB_DEFERRED_IO	212	#ifdef CONFIG_FB_DEFERRED_IO
213	struct delayed_work deferred_work;	213	struct delayed_work deferred_work;
214	struct fb_deferred_io *fbdefio;	214	struct fb_deferred_io *fbdefio;
215	#endif	215	#endif
216		216
217	struct fb_ops *fbops;	217	struct fb_ops *fbops;
218	// struct device device; / This is the parent */	218	// struct device device; / This is the parent */
219	// struct device dev; / This is this fb device */	219	// struct device dev; / This is this fb device */
220	int class_flag; /* private sysfs flags */	220	int class_flag; /* private sysfs flags */
221	#ifdef CONFIG_FB_TILEBLITTING	221	#ifdef CONFIG_FB_TILEBLITTING
222	struct fb_tile_ops tileops; / Tile Blitting */	222	struct fb_tile_ops tileops; / Tile Blitting */
223	#endif	223	#endif
224	char __iomem screen_base; / Virtual address */	224	char __iomem screen_base; / Virtual address */
225	unsigned long screen_size; /* Amount of ioremapped VRAM or 0 */	225	unsigned long screen_size; /* Amount of ioremapped VRAM or 0 */
226	void pseudo_palette; / Fake palette of 16 colors */	226	void pseudo_palette; / Fake palette of 16 colors */
227	#define FBINFO_STATE_RUNNING 0	227	#define FBINFO_STATE_RUNNING 0
228	#define FBINFO_STATE_SUSPENDED 1	228	#define FBINFO_STATE_SUSPENDED 1
229	u32 state; /* Hardware state i.e suspend */	229	u32 state; /* Hardware state i.e suspend */
230	void fbcon_par; / fbcon use-only private area */	230	void fbcon_par; / fbcon use-only private area */
231	/* From here on everything is device dependent */	231	/* From here on everything is device dependent */
232	void *par;	232	void *par;
233	/* we need the PCI or similiar aperture base/size not	233	/* we need the PCI or similiar aperture base/size not
234	smem_start/size as smem_start may just be an object	234	smem_start/size as smem_start may just be an object
235	allocated inside the aperture so may not actually overlap */	235	allocated inside the aperture so may not actually overlap */
236	resource_size_t aperture_base;	236	resource_size_t aperture_base;
237	resource_size_t aperture_size;	237	resource_size_t aperture_size;
238	};	238	};
239		239
240		240
241		241
242	struct radeon_fb_device {	242	struct radeon_fb_device {
243	struct radeon_device *rdev;	243	struct radeon_device *rdev;
244	struct drm_display_mode *mode;	244	struct drm_display_mode *mode;
245	struct radeon_framebuffer *rfb;	245	struct radeon_framebuffer *rfb;
246	int crtc_count;	246	int crtc_count;
247	/* crtc currently bound to this */	247	/* crtc currently bound to this */
248	uint32_t crtc_ids[2];	248	uint32_t crtc_ids[2];
249	};	249	};
250		250
251	int radeon_gem_fb_object_create(struct radeon_device *rdev, int size,	251	int radeon_gem_fb_object_create(struct radeon_device *rdev, int size,
252	int alignment, int initial_domain,	252	int alignment, int initial_domain,
253	bool discardable, bool kernel,	253	bool discardable, bool kernel,
254	bool interruptible,	254	bool interruptible,
255	struct drm_gem_object **obj);	255	struct drm_gem_object **obj);
256		256
257	struct fb_info *framebuffer_alloc(size_t size);	257	struct fb_info *framebuffer_alloc(size_t size);
258		258
259	#if 0	259	#if 0
260	static int radeonfb_setcolreg(unsigned regno,	260	static int radeonfb_setcolreg(unsigned regno,
261	unsigned red,	261	unsigned red,
262	unsigned green,	262	unsigned green,
263	unsigned blue,	263	unsigned blue,
264	unsigned transp,	264	unsigned transp,
265	struct fb_info *info)	265	struct fb_info *info)
266	{	266	{
267	struct radeon_fb_device *rfbdev = info->par;	267	struct radeon_fb_device *rfbdev = info->par;
268	struct drm_device *dev = rfbdev->rdev->ddev;	268	struct drm_device *dev = rfbdev->rdev->ddev;
269	struct drm_crtc *crtc;	269	struct drm_crtc *crtc;
270	int i;	270	int i;
271		271
272	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {	272	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
273	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);	273	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
274	struct drm_mode_set *modeset = &radeon_crtc->mode_set;	274	struct drm_mode_set *modeset = &radeon_crtc->mode_set;
275	struct drm_framebuffer *fb = modeset->fb;	275	struct drm_framebuffer *fb = modeset->fb;
276		276
277	for (i = 0; i < rfbdev->crtc_count; i++) {	277	for (i = 0; i < rfbdev->crtc_count; i++) {
278	if (crtc->base.id == rfbdev->crtc_ids[i]) {	278	if (crtc->base.id == rfbdev->crtc_ids[i]) {
279	break;	279	break;
280	}	280	}
281	}	281	}
282	if (i == rfbdev->crtc_count) {	282	if (i == rfbdev->crtc_count) {
283	continue;	283	continue;
284	}	284	}
285	if (regno > 255) {	285	if (regno > 255) {
286	return 1;	286	return 1;
287	}	287	}
288	if (fb->depth == 8) {	288	if (fb->depth == 8) {
289	radeon_crtc_fb_gamma_set(crtc, red, green, blue, regno);	289	radeon_crtc_fb_gamma_set(crtc, red, green, blue, regno);
290	return 0;	290	return 0;
291	}	291	}
292		292
293	if (regno < 16) {	293	if (regno < 16) {
294	switch (fb->depth) {	294	switch (fb->depth) {
295	case 15:	295	case 15:
296	fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) \|	296	fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) \|
297	((green & 0xf800) >> 6) \|	297	((green & 0xf800) >> 6) \|
298	((blue & 0xf800) >> 11);	298	((blue & 0xf800) >> 11);
299	break;	299	break;
300	case 16:	300	case 16:
301	fb->pseudo_palette[regno] = (red & 0xf800) \|	301	fb->pseudo_palette[regno] = (red & 0xf800) \|
302	((green & 0xfc00) >> 5) \|	302	((green & 0xfc00) >> 5) \|
303	((blue & 0xf800) >> 11);	303	((blue & 0xf800) >> 11);
304	break;	304	break;
305	case 24:	305	case 24:
306	case 32:	306	case 32:
307	fb->pseudo_palette[regno] = ((red & 0xff00) << 8) \|	307	fb->pseudo_palette[regno] = ((red & 0xff00) << 8) \|
308	(green & 0xff00) \|	308	(green & 0xff00) \|
309	((blue & 0xff00) >> 8);	309	((blue & 0xff00) >> 8);
310	break;	310	break;
311	}	311	}
312	}	312	}
313	}	313	}
314	return 0;	314	return 0;
315	}	315	}
316		316
317	static int radeonfb_check_var(struct fb_var_screeninfo *var,	317	static int radeonfb_check_var(struct fb_var_screeninfo *var,
318	struct fb_info *info)	318	struct fb_info *info)
319	{	319	{
320	struct radeon_fb_device *rfbdev = info->par;	320	struct radeon_fb_device *rfbdev = info->par;
321	struct radeon_framebuffer *rfb = rfbdev->rfb;	321	struct radeon_framebuffer *rfb = rfbdev->rfb;
322	struct drm_framebuffer *fb = &rfb->base;	322	struct drm_framebuffer *fb = &rfb->base;
323	int depth;	323	int depth;
324		324
325	if (var->pixclock == -1 \|\| !var->pixclock) {	325	if (var->pixclock == -1 \|\| !var->pixclock) {
326	return -EINVAL;	326	return -EINVAL;
327	}	327	}
328	/* Need to resize the fb object !!! */	328	/* Need to resize the fb object !!! */
329	if (var->xres > fb->width \|\| var->yres > fb->height) {	329	if (var->xres > fb->width \|\| var->yres > fb->height) {
330	DRM_ERROR("Requested width/height is greater than current fb "	330	DRM_ERROR("Requested width/height is greater than current fb "
331	"object %dx%d > %dx%d\n", var->xres, var->yres,	331	"object %dx%d > %dx%d\n", var->xres, var->yres,
332	fb->width, fb->height);	332	fb->width, fb->height);
333	DRM_ERROR("Need resizing code.\n");	333	DRM_ERROR("Need resizing code.\n");
334	return -EINVAL;	334	return -EINVAL;
335	}	335	}
336		336
337	switch (var->bits_per_pixel) {	337	switch (var->bits_per_pixel) {
338	case 16:	338	case 16:
339	depth = (var->green.length == 6) ? 16 : 15;	339	depth = (var->green.length == 6) ? 16 : 15;
340	break;	340	break;
341	case 32:	341	case 32:
342	depth = (var->transp.length > 0) ? 32 : 24;	342	depth = (var->transp.length > 0) ? 32 : 24;
343	break;	343	break;
344	default:	344	default:
345	depth = var->bits_per_pixel;	345	depth = var->bits_per_pixel;
346	break;	346	break;
347	}	347	}
348		348
349	switch (depth) {	349	switch (depth) {
350	case 8:	350	case 8:
351	var->red.offset = 0;	351	var->red.offset = 0;
352	var->green.offset = 0;	352	var->green.offset = 0;
353	var->blue.offset = 0;	353	var->blue.offset = 0;
354	var->red.length = 8;	354	var->red.length = 8;
355	var->green.length = 8;	355	var->green.length = 8;
356	var->blue.length = 8;	356	var->blue.length = 8;
357	var->transp.length = 0;	357	var->transp.length = 0;
358	var->transp.offset = 0;	358	var->transp.offset = 0;
359	break;	359	break;
360	case 15:	360	case 15:
361	var->red.offset = 10;	361	var->red.offset = 10;
362	var->green.offset = 5;	362	var->green.offset = 5;
363	var->blue.offset = 0;	363	var->blue.offset = 0;
364	var->red.length = 5;	364	var->red.length = 5;
365	var->green.length = 5;	365	var->green.length = 5;
366	var->blue.length = 5;	366	var->blue.length = 5;
367	var->transp.length = 1;	367	var->transp.length = 1;
368	var->transp.offset = 15;	368	var->transp.offset = 15;
369	break;	369	break;
370	case 16:	370	case 16:
371	var->red.offset = 11;	371	var->red.offset = 11;
372	var->green.offset = 5;	372	var->green.offset = 5;
373	var->blue.offset = 0;	373	var->blue.offset = 0;
374	var->red.length = 5;	374	var->red.length = 5;
375	var->green.length = 6;	375	var->green.length = 6;
376	var->blue.length = 5;	376	var->blue.length = 5;
377	var->transp.length = 0;	377	var->transp.length = 0;
378	var->transp.offset = 0;	378	var->transp.offset = 0;
379	break;	379	break;
380	case 24:	380	case 24:
381	var->red.offset = 16;	381	var->red.offset = 16;
382	var->green.offset = 8;	382	var->green.offset = 8;
383	var->blue.offset = 0;	383	var->blue.offset = 0;
384	var->red.length = 8;	384	var->red.length = 8;
385	var->green.length = 8;	385	var->green.length = 8;
386	var->blue.length = 8;	386	var->blue.length = 8;
387	var->transp.length = 0;	387	var->transp.length = 0;
388	var->transp.offset = 0;	388	var->transp.offset = 0;
389	break;	389	break;
390	case 32:	390	case 32:
391	var->red.offset = 16;	391	var->red.offset = 16;
392	var->green.offset = 8;	392	var->green.offset = 8;
393	var->blue.offset = 0;	393	var->blue.offset = 0;
394	var->red.length = 8;	394	var->red.length = 8;
395	var->green.length = 8;	395	var->green.length = 8;
396	var->blue.length = 8;	396	var->blue.length = 8;
397	var->transp.length = 8;	397	var->transp.length = 8;
398	var->transp.offset = 24;	398	var->transp.offset = 24;
399	break;	399	break;
400	default:	400	default:
401	return -EINVAL;	401	return -EINVAL;
402	}	402	}
403	return 0;	403	return 0;
404	}	404	}
405		405
406	#endif	406	#endif
407		407
408		408
409	/* this will let fbcon do the mode init */	409	/* this will let fbcon do the mode init */
410	static int radeonfb_set_par(struct fb_info *info)	410	static int radeonfb_set_par(struct fb_info *info)
411	{	411	{
412	struct radeon_fb_device *rfbdev = info->par;	412	struct radeon_fb_device *rfbdev = info->par;
413	struct drm_device *dev = rfbdev->rdev->ddev;	413	struct drm_device *dev = rfbdev->rdev->ddev;
414	struct fb_var_screeninfo *var = &info->var;	414	struct fb_var_screeninfo *var = &info->var;
415	struct drm_crtc *crtc;	415	struct drm_crtc *crtc;
416	int ret;	416	int ret;
417	int i;	417	int i;
418		418
419	if (var->pixclock != -1) {	419	if (var->pixclock != -1) {
420	DRM_ERROR("PIXEL CLCOK SET\n");	420	DRM_ERROR("PIXEL CLCOK SET\n");
421	return -EINVAL;	421	return -EINVAL;
422	}	422	}
423		423
424	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {	424	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
425	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);	425	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
426		426
427	for (i = 0; i < rfbdev->crtc_count; i++) {	427	for (i = 0; i < rfbdev->crtc_count; i++) {
428	if (crtc->base.id == rfbdev->crtc_ids[i]) {	428	if (crtc->base.id == rfbdev->crtc_ids[i]) {
429	break;	429	break;
430	}	430	}
431	}	431	}
432	if (i == rfbdev->crtc_count) {	432	if (i == rfbdev->crtc_count) {
433	continue;	433	continue;
434	}	434	}
435	if (crtc->fb == radeon_crtc->mode_set.fb) {	435	if (crtc->fb == radeon_crtc->mode_set.fb) {
436	// mutex_lock(&dev->mode_config.mutex);	436	// mutex_lock(&dev->mode_config.mutex);
437	ret = crtc->funcs->set_config(&radeon_crtc->mode_set);	437	ret = crtc->funcs->set_config(&radeon_crtc->mode_set);
438	// mutex_unlock(&dev->mode_config.mutex);	438	// mutex_unlock(&dev->mode_config.mutex);
439	if (ret) {	439	if (ret) {
440	return ret;	440	return ret;
441	}	441	}
442	}	442	}
443	}	443	}
444	return 0;	444	return 0;
445	}	445	}
446		446
447	#if 0	447	#if 0
448		448
449	static int radeonfb_pan_display(struct fb_var_screeninfo *var,	449	static int radeonfb_pan_display(struct fb_var_screeninfo *var,
450	struct fb_info *info)	450	struct fb_info *info)
451	{	451	{
452	struct radeon_fb_device *rfbdev = info->par;	452	struct radeon_fb_device *rfbdev = info->par;
453	struct drm_device *dev = rfbdev->rdev->ddev;	453	struct drm_device *dev = rfbdev->rdev->ddev;
454	struct drm_mode_set *modeset;	454	struct drm_mode_set *modeset;
455	struct drm_crtc *crtc;	455	struct drm_crtc *crtc;
456	struct radeon_crtc *radeon_crtc;	456	struct radeon_crtc *radeon_crtc;
457	int ret = 0;	457	int ret = 0;
458	int i;	458	int i;
459		459
460	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {	460	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
461	for (i = 0; i < rfbdev->crtc_count; i++) {	461	for (i = 0; i < rfbdev->crtc_count; i++) {
462	if (crtc->base.id == rfbdev->crtc_ids[i]) {	462	if (crtc->base.id == rfbdev->crtc_ids[i]) {
463	break;	463	break;
464	}	464	}
465	}	465	}
466		466
467	if (i == rfbdev->crtc_count) {	467	if (i == rfbdev->crtc_count) {
468	continue;	468	continue;
469	}	469	}
470		470
471	radeon_crtc = to_radeon_crtc(crtc);	471	radeon_crtc = to_radeon_crtc(crtc);
472	modeset = &radeon_crtc->mode_set;	472	modeset = &radeon_crtc->mode_set;
473		473
474	modeset->x = var->xoffset;	474	modeset->x = var->xoffset;
475	modeset->y = var->yoffset;	475	modeset->y = var->yoffset;
476		476
477	if (modeset->num_connectors) {	477	if (modeset->num_connectors) {
478	mutex_lock(&dev->mode_config.mutex);	478	mutex_lock(&dev->mode_config.mutex);
479	ret = crtc->funcs->set_config(modeset);	479	ret = crtc->funcs->set_config(modeset);
480	mutex_unlock(&dev->mode_config.mutex);	480	mutex_unlock(&dev->mode_config.mutex);
481	if (!ret) {	481	if (!ret) {
482	info->var.xoffset = var->xoffset;	482	info->var.xoffset = var->xoffset;
483	info->var.yoffset = var->yoffset;	483	info->var.yoffset = var->yoffset;
484	}	484	}
485	}	485	}
486	}	486	}
487	return ret;	487	return ret;
488	}	488	}
489		489
490	static void radeonfb_on(struct fb_info *info)	490	static void radeonfb_on(struct fb_info *info)
491	{	491	{
492	struct radeon_fb_device *rfbdev = info->par;	492	struct radeon_fb_device *rfbdev = info->par;
493	struct drm_device *dev = rfbdev->rdev->ddev;	493	struct drm_device *dev = rfbdev->rdev->ddev;
494	struct drm_crtc *crtc;	494	struct drm_crtc *crtc;
495	struct drm_encoder *encoder;	495	struct drm_encoder *encoder;
496	int i;	496	int i;
497		497
498	/*	498	/*
499	* For each CRTC in this fb, find all associated encoders	499	* For each CRTC in this fb, find all associated encoders
500	* and turn them off, then turn off the CRTC.	500	* and turn them off, then turn off the CRTC.

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/radeon/radeon_fb.c – Rev 1126 → 1128