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Rev 1321 | Rev 1403 | ||
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Line 154... | Line 154... | ||
154 | } |
154 | } |
Line 155... | Line 155... | ||
155 | 155 | ||
156 | return ret; |
156 | return ret; |
Line -... | Line 157... | ||
- | 157 | } |
|
- | 158 | ||
- | 159 | static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder) |
|
- | 160 | { |
|
- | 161 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
- | 162 | switch (radeon_encoder->encoder_id) { |
|
- | 163 | case ENCODER_OBJECT_ID_INTERNAL_LVDS: |
|
- | 164 | case ENCODER_OBJECT_ID_INTERNAL_TMDS1: |
|
- | 165 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: |
|
- | 166 | case ENCODER_OBJECT_ID_INTERNAL_LVTM1: |
|
- | 167 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
|
- | 168 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
|
- | 169 | case ENCODER_OBJECT_ID_INTERNAL_DDI: |
|
- | 170 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
|
- | 171 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
|
- | 172 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
|
- | 173 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
|
- | 174 | return true; |
|
- | 175 | default: |
|
- | 176 | return false; |
|
157 | } |
177 | } |
158 | 178 | } |
|
159 | void |
179 | void |
160 | radeon_link_encoder_connector(struct drm_device *dev) |
180 | radeon_link_encoder_connector(struct drm_device *dev) |
161 | { |
181 | { |
Line 200... | Line 220... | ||
200 | struct drm_connector *connector; |
220 | struct drm_connector *connector; |
201 | struct radeon_connector *radeon_connector; |
221 | struct radeon_connector *radeon_connector; |
Line 202... | Line 222... | ||
202 | 222 | ||
203 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
223 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
204 | radeon_connector = to_radeon_connector(connector); |
224 | radeon_connector = to_radeon_connector(connector); |
205 | if (radeon_encoder->devices & radeon_connector->devices) |
225 | if (radeon_encoder->active_device & radeon_connector->devices) |
206 | return connector; |
226 | return connector; |
207 | } |
227 | } |
208 | return NULL; |
228 | return NULL; |
Line 231... | Line 251... | ||
231 | int mode_id = adjusted_mode->base.id; |
251 | int mode_id = adjusted_mode->base.id; |
232 | *adjusted_mode = *native_mode; |
252 | *adjusted_mode = *native_mode; |
233 | if (!ASIC_IS_AVIVO(rdev)) { |
253 | if (!ASIC_IS_AVIVO(rdev)) { |
234 | adjusted_mode->hdisplay = mode->hdisplay; |
254 | adjusted_mode->hdisplay = mode->hdisplay; |
235 | adjusted_mode->vdisplay = mode->vdisplay; |
255 | adjusted_mode->vdisplay = mode->vdisplay; |
- | 256 | adjusted_mode->crtc_hdisplay = mode->hdisplay; |
|
- | 257 | adjusted_mode->crtc_vdisplay = mode->vdisplay; |
|
236 | } |
258 | } |
237 | adjusted_mode->base.id = mode_id; |
259 | adjusted_mode->base.id = mode_id; |
238 | } |
260 | } |
Line 239... | Line 261... | ||
239 | 261 | ||
Line 436... | Line 458... | ||
436 | struct drm_device *dev = encoder->dev; |
458 | struct drm_device *dev = encoder->dev; |
437 | struct radeon_device *rdev = dev->dev_private; |
459 | struct radeon_device *rdev = dev->dev_private; |
438 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
460 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
439 | union lvds_encoder_control args; |
461 | union lvds_encoder_control args; |
440 | int index = 0; |
462 | int index = 0; |
- | 463 | int hdmi_detected = 0; |
|
441 | uint8_t frev, crev; |
464 | uint8_t frev, crev; |
442 | struct radeon_encoder_atom_dig *dig; |
465 | struct radeon_encoder_atom_dig *dig; |
443 | struct drm_connector *connector; |
466 | struct drm_connector *connector; |
444 | struct radeon_connector *radeon_connector; |
467 | struct radeon_connector *radeon_connector; |
445 | struct radeon_connector_atom_dig *dig_connector; |
468 | struct radeon_connector_atom_dig *dig_connector; |
Line 456... | Line 479... | ||
456 | dig = radeon_encoder->enc_priv; |
479 | dig = radeon_encoder->enc_priv; |
Line 457... | Line 480... | ||
457 | 480 | ||
458 | if (!radeon_connector->con_priv) |
481 | if (!radeon_connector->con_priv) |
Line -... | Line 482... | ||
- | 482 | return; |
|
- | 483 | ||
- | 484 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
|
459 | return; |
485 | hdmi_detected = 1; |
Line 460... | Line 486... | ||
460 | 486 | ||
Line 461... | Line 487... | ||
461 | dig_connector = radeon_connector->con_priv; |
487 | dig_connector = radeon_connector->con_priv; |
Line 485... | Line 511... | ||
485 | case 2: |
511 | case 2: |
486 | switch (crev) { |
512 | switch (crev) { |
487 | case 1: |
513 | case 1: |
488 | args.v1.ucMisc = 0; |
514 | args.v1.ucMisc = 0; |
489 | args.v1.ucAction = action; |
515 | args.v1.ucAction = action; |
490 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
516 | if (hdmi_detected) |
491 | args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
517 | args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
492 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
518 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
493 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
519 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
494 | if (dig->lvds_misc & (1 << 0)) |
520 | if (dig->lvds_misc & ATOM_PANEL_MISC_DUAL) |
495 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
521 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
496 | if (dig->lvds_misc & (1 << 1)) |
522 | if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB) |
497 | args.v1.ucMisc |= (1 << 1); |
523 | args.v1.ucMisc |= (1 << 1); |
498 | } else { |
524 | } else { |
499 | if (dig_connector->linkb) |
525 | if (dig_connector->linkb) |
500 | args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
526 | args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
501 | if (radeon_encoder->pixel_clock > 165000) |
527 | if (radeon_encoder->pixel_clock > 165000) |
Line 510... | Line 536... | ||
510 | args.v2.ucAction = action; |
536 | args.v2.ucAction = action; |
511 | if (crev == 3) { |
537 | if (crev == 3) { |
512 | if (dig->coherent_mode) |
538 | if (dig->coherent_mode) |
513 | args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; |
539 | args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; |
514 | } |
540 | } |
515 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
541 | if (hdmi_detected) |
516 | args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
542 | args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
517 | args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
543 | args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
518 | args.v2.ucTruncate = 0; |
544 | args.v2.ucTruncate = 0; |
519 | args.v2.ucSpatial = 0; |
545 | args.v2.ucSpatial = 0; |
520 | args.v2.ucTemporal = 0; |
546 | args.v2.ucTemporal = 0; |
521 | args.v2.ucFRC = 0; |
547 | args.v2.ucFRC = 0; |
522 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
548 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
523 | if (dig->lvds_misc & (1 << 0)) |
549 | if (dig->lvds_misc & ATOM_PANEL_MISC_DUAL) |
524 | args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
550 | args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
525 | if (dig->lvds_misc & (1 << 5)) { |
551 | if (dig->lvds_misc & ATOM_PANEL_MISC_SPATIAL) { |
526 | args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN; |
552 | args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN; |
527 | if (dig->lvds_misc & (1 << 1)) |
553 | if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB) |
528 | args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH; |
554 | args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH; |
529 | } |
555 | } |
530 | if (dig->lvds_misc & (1 << 6)) { |
556 | if (dig->lvds_misc & ATOM_PANEL_MISC_TEMPORAL) { |
531 | args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN; |
557 | args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN; |
532 | if (dig->lvds_misc & (1 << 1)) |
558 | if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB) |
533 | args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH; |
559 | args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH; |
534 | if (((dig->lvds_misc >> 2) & 0x3) == 2) |
560 | if (((dig->lvds_misc >> ATOM_PANEL_MISC_GREY_LEVEL_SHIFT) & 0x3) == 2) |
535 | args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; |
561 | args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; |
536 | } |
562 | } |
537 | } else { |
563 | } else { |
538 | if (dig_connector->linkb) |
564 | if (dig_connector->linkb) |
539 | args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
565 | args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
Line 550... | Line 576... | ||
550 | DRM_ERROR("Unknown table version %d, %d\n", frev, crev); |
576 | DRM_ERROR("Unknown table version %d, %d\n", frev, crev); |
551 | break; |
577 | break; |
552 | } |
578 | } |
Line 553... | Line 579... | ||
553 | 579 | ||
554 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
- | |
- | 580 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
|
555 | 581 | r600_hdmi_enable(encoder, hdmi_detected); |
|
Line 556... | Line 582... | ||
556 | } |
582 | } |
557 | 583 | ||
558 | int |
584 | int |
Line 588... | Line 614... | ||
588 | break; |
614 | break; |
589 | case DRM_MODE_CONNECTOR_LVDS: |
615 | case DRM_MODE_CONNECTOR_LVDS: |
590 | return ATOM_ENCODER_MODE_LVDS; |
616 | return ATOM_ENCODER_MODE_LVDS; |
591 | break; |
617 | break; |
592 | case DRM_MODE_CONNECTOR_DisplayPort: |
618 | case DRM_MODE_CONNECTOR_DisplayPort: |
- | 619 | case DRM_MODE_CONNECTOR_eDP: |
|
593 | radeon_dig_connector = radeon_connector->con_priv; |
620 | radeon_dig_connector = radeon_connector->con_priv; |
594 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) |
621 | if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
- | 622 | (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) |
|
595 | return ATOM_ENCODER_MODE_DP; |
623 | return ATOM_ENCODER_MODE_DP; |
596 | else if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
624 | else if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
597 | return ATOM_ENCODER_MODE_HDMI; |
625 | return ATOM_ENCODER_MODE_HDMI; |
598 | else |
626 | else |
599 | return ATOM_ENCODER_MODE_DVI; |
627 | return ATOM_ENCODER_MODE_DVI; |
600 | break; |
628 | break; |
601 | case CONNECTOR_DVI_A: |
629 | case DRM_MODE_CONNECTOR_DVIA: |
602 | case CONNECTOR_VGA: |
630 | case DRM_MODE_CONNECTOR_VGA: |
603 | return ATOM_ENCODER_MODE_CRT; |
631 | return ATOM_ENCODER_MODE_CRT; |
604 | break; |
632 | break; |
605 | case CONNECTOR_STV: |
633 | case DRM_MODE_CONNECTOR_Composite: |
606 | case CONNECTOR_CTV: |
634 | case DRM_MODE_CONNECTOR_SVIDEO: |
607 | case CONNECTOR_DIN: |
635 | case DRM_MODE_CONNECTOR_9PinDIN: |
608 | /* fix me */ |
636 | /* fix me */ |
609 | return ATOM_ENCODER_MODE_TV; |
637 | return ATOM_ENCODER_MODE_TV; |
610 | /*return ATOM_ENCODER_MODE_CV;*/ |
638 | /*return ATOM_ENCODER_MODE_CV;*/ |
611 | break; |
639 | break; |
612 | } |
640 | } |
Line 666... | Line 694... | ||
666 | 694 | ||
Line 667... | Line 695... | ||
667 | dig = radeon_encoder->enc_priv; |
695 | dig = radeon_encoder->enc_priv; |
Line 668... | Line -... | ||
668 | - | ||
669 | memset(&args, 0, sizeof(args)); |
696 | |
670 | 697 | memset(&args, 0, sizeof(args)); |
|
671 | if (ASIC_IS_DCE32(rdev)) { |
698 | |
672 | if (dig->dig_block) |
699 | if (dig->dig_encoder) |
673 | index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); |
700 | index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); |
674 | else |
- | |
675 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); |
- | |
676 | num = dig->dig_block + 1; |
- | |
677 | } else { |
- | |
678 | switch (radeon_encoder->encoder_id) { |
- | |
679 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
- | |
680 | /* XXX doesn't really matter which dig encoder we pick as long as it's |
- | |
681 | * not already in use |
- | |
682 | */ |
- | |
683 | if (dig_connector->linkb) |
- | |
684 | index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); |
- | |
685 | else |
- | |
686 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); |
- | |
687 | num = 1; |
- | |
688 | break; |
- | |
689 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
- | |
690 | /* Only dig2 encoder can drive LVTMA */ |
- | |
691 | index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); |
- | |
692 | num = 2; |
- | |
Line 693... | Line 701... | ||
693 | break; |
701 | else |
Line 694... | Line 702... | ||
694 | } |
702 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); |
695 | } |
703 | num = dig->dig_encoder + 1; |
Line 812... | Line 820... | ||
812 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
820 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
813 | else |
821 | else |
814 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
822 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
815 | } |
823 | } |
816 | if (ASIC_IS_DCE32(rdev)) { |
824 | if (ASIC_IS_DCE32(rdev)) { |
817 | if (dig->dig_block) |
825 | if (dig->dig_encoder == 1) |
818 | args.v2.acConfig.ucEncoderSel = 1; |
826 | args.v2.acConfig.ucEncoderSel = 1; |
819 | if (dig_connector->linkb) |
827 | if (dig_connector->linkb) |
820 | args.v2.acConfig.ucLinkSel = 1; |
828 | args.v2.acConfig.ucLinkSel = 1; |
Line 821... | Line 829... | ||
821 | 829 | ||
Line 839... | Line 847... | ||
839 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
847 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
840 | if (dig->coherent_mode) |
848 | if (dig->coherent_mode) |
841 | args.v2.acConfig.fCoherentMode = 1; |
849 | args.v2.acConfig.fCoherentMode = 1; |
842 | } |
850 | } |
843 | } else { |
851 | } else { |
- | 852 | ||
844 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; |
853 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; |
Line 845... | Line -... | ||
845 | - | ||
846 | switch (radeon_encoder->encoder_id) { |
- | |
847 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
- | |
848 | /* XXX doesn't really matter which dig encoder we pick as long as it's |
- | |
849 | * not already in use |
- | |
850 | */ |
854 | |
851 | if (dig_connector->linkb) |
855 | if (dig->dig_encoder) |
852 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; |
856 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; |
853 | else |
857 | else |
- | 858 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; |
|
- | 859 | ||
- | 860 | switch (radeon_encoder->encoder_id) { |
|
854 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; |
861 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
855 | if (rdev->flags & RADEON_IS_IGP) { |
862 | if (rdev->flags & RADEON_IS_IGP) { |
856 | if (radeon_encoder->pixel_clock > 165000) { |
863 | if (radeon_encoder->pixel_clock > 165000) { |
857 | if (dig_connector->igp_lane_info & 0x3) |
864 | if (dig_connector->igp_lane_info & 0x3) |
858 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; |
865 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; |
Line 868... | Line 875... | ||
868 | else if (dig_connector->igp_lane_info & 0x8) |
875 | else if (dig_connector->igp_lane_info & 0x8) |
869 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; |
876 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; |
870 | } |
877 | } |
871 | } |
878 | } |
872 | break; |
879 | break; |
873 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
- | |
874 | /* Only dig2 encoder can drive LVTMA */ |
- | |
875 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; |
- | |
876 | break; |
- | |
877 | } |
880 | } |
Line 878... | Line 881... | ||
878 | 881 | ||
879 | if (radeon_encoder->pixel_clock > 165000) |
882 | if (radeon_encoder->pixel_clock > 165000) |
Line 891... | Line 894... | ||
891 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; |
894 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; |
892 | } |
895 | } |
893 | } |
896 | } |
Line 894... | Line 897... | ||
894 | 897 | ||
895 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
- | |
896 | 898 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
|
Line 897... | Line 899... | ||
897 | } |
899 | } |
898 | 900 | ||
899 | static void |
901 | static void |
Line 1037... | Line 1039... | ||
1037 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1039 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1038 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
1040 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
1039 | union crtc_sourc_param args; |
1041 | union crtc_sourc_param args; |
1040 | int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source); |
1042 | int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source); |
1041 | uint8_t frev, crev; |
1043 | uint8_t frev, crev; |
- | 1044 | struct radeon_encoder_atom_dig *dig; |
|
Line 1042... | Line 1045... | ||
1042 | 1045 | ||
Line 1043... | Line 1046... | ||
1043 | memset(&args, 0, sizeof(args)); |
1046 | memset(&args, 0, sizeof(args)); |
Line 1100... | Line 1103... | ||
1100 | args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder); |
1103 | args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder); |
1101 | switch (radeon_encoder->encoder_id) { |
1104 | switch (radeon_encoder->encoder_id) { |
1102 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
1105 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
1103 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
1106 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
1104 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
1107 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
1105 | if (ASIC_IS_DCE32(rdev)) { |
- | |
1106 | if (radeon_crtc->crtc_id) |
- | |
1107 | args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; |
- | |
1108 | else |
- | |
1109 | args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; |
1108 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
1110 | } else { |
- | |
1111 | struct drm_connector *connector; |
- | |
1112 | struct radeon_connector *radeon_connector; |
- | |
1113 | struct radeon_connector_atom_dig *dig_connector; |
- | |
1114 | - | ||
1115 | connector = radeon_get_connector_for_encoder(encoder); |
- | |
1116 | if (!connector) |
- | |
1117 | return; |
- | |
1118 | radeon_connector = to_radeon_connector(connector); |
- | |
1119 | if (!radeon_connector->con_priv) |
1109 | dig = radeon_encoder->enc_priv; |
1120 | return; |
- | |
1121 | dig_connector = radeon_connector->con_priv; |
- | |
1122 | - | ||
1123 | /* XXX doesn't really matter which dig encoder we pick as long as it's |
- | |
1124 | * not already in use |
- | |
1125 | */ |
- | |
1126 | if (dig_connector->linkb) |
1110 | if (dig->dig_encoder) |
1127 | args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; |
1111 | args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; |
1128 | else |
1112 | else |
1129 | args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; |
1113 | args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; |
1130 | } |
- | |
1131 | break; |
1114 | break; |
1132 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
1115 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
1133 | args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; |
1116 | args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; |
1134 | break; |
1117 | break; |
1135 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
- | |
1136 | /* Only dig2 encoder can drive LVTMA */ |
- | |
1137 | args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; |
- | |
1138 | break; |
- | |
1139 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
1118 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
1140 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
1119 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
1141 | args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; |
1120 | args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; |
1142 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
1121 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
1143 | args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; |
1122 | args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; |
Line 1160... | Line 1139... | ||
1160 | DRM_ERROR("Unknown table version: %d, %d\n", frev, crev); |
1139 | DRM_ERROR("Unknown table version: %d, %d\n", frev, crev); |
1161 | break; |
1140 | break; |
1162 | } |
1141 | } |
Line 1163... | Line 1142... | ||
1163 | 1142 | ||
1164 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
- | |
1165 | 1143 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
|
Line 1166... | Line 1144... | ||
1166 | } |
1144 | } |
1167 | 1145 | ||
1168 | static void |
1146 | static void |
Line 1194... | Line 1172... | ||
1194 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, |
1172 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, |
1195 | AVIVO_D1MODE_INTERLEAVE_EN); |
1173 | AVIVO_D1MODE_INTERLEAVE_EN); |
1196 | } |
1174 | } |
1197 | } |
1175 | } |
Line -... | Line 1176... | ||
- | 1176 | ||
- | 1177 | static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder) |
|
- | 1178 | { |
|
- | 1179 | struct drm_device *dev = encoder->dev; |
|
- | 1180 | struct radeon_device *rdev = dev->dev_private; |
|
- | 1181 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
|
- | 1182 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
- | 1183 | struct drm_encoder *test_encoder; |
|
- | 1184 | struct radeon_encoder_atom_dig *dig; |
|
- | 1185 | uint32_t dig_enc_in_use = 0; |
|
- | 1186 | /* on DCE32 and encoder can driver any block so just crtc id */ |
|
- | 1187 | if (ASIC_IS_DCE32(rdev)) { |
|
- | 1188 | return radeon_crtc->crtc_id; |
|
- | 1189 | } |
|
- | 1190 | ||
- | 1191 | /* on DCE3 - LVTMA can only be driven by DIGB */ |
|
- | 1192 | list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) { |
|
- | 1193 | struct radeon_encoder *radeon_test_encoder; |
|
- | 1194 | ||
- | 1195 | if (encoder == test_encoder) |
|
- | 1196 | continue; |
|
- | 1197 | ||
- | 1198 | if (!radeon_encoder_is_digital(test_encoder)) |
|
- | 1199 | continue; |
|
- | 1200 | ||
- | 1201 | radeon_test_encoder = to_radeon_encoder(test_encoder); |
|
- | 1202 | dig = radeon_test_encoder->enc_priv; |
|
- | 1203 | ||
- | 1204 | if (dig->dig_encoder >= 0) |
|
- | 1205 | dig_enc_in_use |= (1 << dig->dig_encoder); |
|
- | 1206 | } |
|
- | 1207 | ||
- | 1208 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA) { |
|
- | 1209 | if (dig_enc_in_use & 0x2) |
|
- | 1210 | DRM_ERROR("LVDS required digital encoder 2 but it was in use - stealing\n"); |
|
- | 1211 | return 1; |
|
- | 1212 | } |
|
- | 1213 | if (!(dig_enc_in_use & 1)) |
|
- | 1214 | return 0; |
|
- | 1215 | return 1; |
|
- | 1216 | } |
|
1198 | 1217 | ||
1199 | static void |
1218 | static void |
1200 | radeon_atom_encoder_mode_set(struct drm_encoder *encoder, |
1219 | radeon_atom_encoder_mode_set(struct drm_encoder *encoder, |
1201 | struct drm_display_mode *mode, |
1220 | struct drm_display_mode *mode, |
1202 | struct drm_display_mode *adjusted_mode) |
1221 | struct drm_display_mode *adjusted_mode) |
Line 1206... | Line 1225... | ||
1206 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1225 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1207 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
1226 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
Line 1208... | Line 1227... | ||
1208 | 1227 | ||
1209 | if (radeon_encoder->active_device & |
1228 | if (radeon_encoder->active_device & |
1210 | (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { |
- | |
1211 | if (radeon_encoder->enc_priv) { |
1229 | (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { |
1212 | struct radeon_encoder_atom_dig *dig; |
- | |
1213 | 1230 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
|
1214 | dig = radeon_encoder->enc_priv; |
1231 | if (dig) |
1215 | dig->dig_block = radeon_crtc->crtc_id; |
- | |
1216 | } |
1232 | dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder); |
1217 | } |
1233 | } |
Line 1218... | Line 1234... | ||
1218 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
1234 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
1219 | 1235 | ||
Line 1263... | Line 1279... | ||
1263 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) |
1279 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) |
1264 | atombios_tv_setup(encoder, ATOM_ENABLE); |
1280 | atombios_tv_setup(encoder, ATOM_ENABLE); |
1265 | break; |
1281 | break; |
1266 | } |
1282 | } |
1267 | atombios_apply_encoder_quirks(encoder, adjusted_mode); |
1283 | atombios_apply_encoder_quirks(encoder, adjusted_mode); |
- | 1284 | ||
- | 1285 | r600_hdmi_setmode(encoder, adjusted_mode); |
|
1268 | } |
1286 | } |
Line 1269... | Line 1287... | ||
1269 | 1287 | ||
1270 | static bool |
1288 | static bool |
1271 | atombios_dac_load_detect(struct drm_encoder *encoder, struct drm_connector *connector) |
1289 | atombios_dac_load_detect(struct drm_encoder *encoder, struct drm_connector *connector) |
Line 1369... | Line 1387... | ||
1369 | } |
1387 | } |
Line 1370... | Line 1388... | ||
1370 | 1388 | ||
1371 | static void radeon_atom_encoder_disable(struct drm_encoder *encoder) |
1389 | static void radeon_atom_encoder_disable(struct drm_encoder *encoder) |
1372 | { |
1390 | { |
- | 1391 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
|
1373 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1392 | struct radeon_encoder_atom_dig *dig; |
- | 1393 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); |
|
- | 1394 | ||
- | 1395 | if (radeon_encoder_is_digital(encoder)) { |
|
- | 1396 | dig = radeon_encoder->enc_priv; |
|
- | 1397 | dig->dig_encoder = -1; |
|
1374 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); |
1398 | } |
1375 | radeon_encoder->active_device = 0; |
1399 | radeon_encoder->active_device = 0; |
Line 1376... | Line 1400... | ||
1376 | } |
1400 | } |
1377 | 1401 | ||
Line 1426... | Line 1450... | ||
1426 | if (!dig) |
1450 | if (!dig) |
1427 | return NULL; |
1451 | return NULL; |
Line 1428... | Line 1452... | ||
1428 | 1452 | ||
1429 | /* coherent mode by default */ |
1453 | /* coherent mode by default */ |
- | 1454 | dig->coherent_mode = true; |
|
Line 1430... | Line 1455... | ||
1430 | dig->coherent_mode = true; |
1455 | dig->dig_encoder = -1; |
1431 | 1456 | ||
Line 1432... | Line 1457... | ||
1432 | return dig; |
1457 | return dig; |
Line 1508... | Line 1533... | ||
1508 | radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); |
1533 | radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); |
1509 | } |
1534 | } |
1510 | drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); |
1535 | drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); |
1511 | break; |
1536 | break; |
1512 | } |
1537 | } |
- | 1538 | ||
- | 1539 | r600_hdmi_init(encoder); |
|
1513 | }><>><>><>><>><>><>><>><>><>><>><>><>><>>><> |
1540 | }><>><>><>><>><>><>><>>><> |