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Rev 1990 Rev 2004
Line 195... Line 195...
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			return;
 195 
			return;
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		}
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		}
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	}
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	}
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}
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}
Line -... Line 199...
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void radeon_wb_disable(struct radeon_device *rdev)
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{
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	int r;
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	if (rdev->wb.wb_obj) {
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		r = radeon_bo_reserve(rdev->wb.wb_obj, false);
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		if (unlikely(r != 0))
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			return;
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		radeon_bo_kunmap(rdev->wb.wb_obj);
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		radeon_bo_unpin(rdev->wb.wb_obj);
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		radeon_bo_unreserve(rdev->wb.wb_obj);
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	}
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	rdev->wb.enabled = false;
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}
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void radeon_wb_fini(struct radeon_device *rdev)
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{
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	radeon_wb_disable(rdev);
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	if (rdev->wb.wb_obj) {
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		radeon_bo_unref(&rdev->wb.wb_obj);
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		rdev->wb.wb = NULL;
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		rdev->wb.wb_obj = NULL;
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	}
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}
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int radeon_wb_init(struct radeon_device *rdev)
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{
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	int r;
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	if (rdev->wb.wb_obj == NULL) {
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		r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,
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				RADEON_GEM_DOMAIN_GTT, &rdev->wb.wb_obj);
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		if (r) {
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			dev_warn(rdev->dev, "(%d) create WB bo failed\n", r);
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			return r;
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		}
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	}
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	r = radeon_bo_reserve(rdev->wb.wb_obj, false);
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	if (unlikely(r != 0)) {
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		radeon_wb_fini(rdev);
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		return r;
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	}
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	r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT,
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			  &rdev->wb.gpu_addr);
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	if (r) {
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		radeon_bo_unreserve(rdev->wb.wb_obj);
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		dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r);
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		radeon_wb_fini(rdev);
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		return r;
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	}
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	r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
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	radeon_bo_unreserve(rdev->wb.wb_obj);
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	if (r) {
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		dev_warn(rdev->dev, "(%d) map WB bo failed\n", r);
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		radeon_wb_fini(rdev);
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		return r;
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	}
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	/* clear wb memory */
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	memset((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE);
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	/* disable event_write fences */
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	rdev->wb.use_event = false;
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	/* disabled via module param */
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	if (radeon_no_wb == 1)
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		rdev->wb.enabled = false;
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	else {
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		/* often unreliable on AGP */
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//		if (rdev->flags & RADEON_IS_AGP) {
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 268 
//			rdev->wb.enabled = false;
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 269 
//		} else {
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			rdev->wb.enabled = true;
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 271 
			/* event_write fences are only available on r600+ */
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 272 
			if (rdev->family >= CHIP_R600)
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				rdev->wb.use_event = true;
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 274 
//		}
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 275 
	}
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 276 
	/* always use writeback/events on NI */
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 277 
	if (ASIC_IS_DCE5(rdev)) {
- 
 
 278 
		rdev->wb.enabled = true;
- 
 
 279 
		rdev->wb.use_event = true;
- 
 
 280 
	}
- 
 
 281 
 
- 
 
 282 
	dev_info(rdev->dev, "WB %sabled\n", rdev->wb.enabled ? "en" : "dis");
- 
 
 283 
 
- 
 
 284 
	return 0;
- 
 
 285 
}
199 
 
 286 
 
200 
/**
 287 
/**
201 
 * radeon_vram_location - try to find VRAM location
 288 
 * radeon_vram_location - try to find VRAM location
202 
 * @rdev: radeon device structure holding all necessary informations
 289 
 * @rdev: radeon device structure holding all necessary informations
203 
 * @mc: memory controller structure holding memory informations
 290 
 * @mc: memory controller structure holding memory informations