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Rev 1321 Rev 1404
Line 44... Line 44...
44 
int radeon_gart_size        = 512; /* default gart size */
 44 
int radeon_gart_size        = 512; /* default gart size */
45 
int radeon_benchmarking     = 0;
 45 
int radeon_benchmarking     = 0;
46 
int radeon_connector_table  = 0;
 46 
int radeon_connector_table  = 0;
47 
int radeon_tv               = 0;
 47 
int radeon_tv               = 0;
48 
int radeon_modeset          = 1;
 48 
int radeon_modeset          = 1;
- 
 
 49 
int radeon_new_pll          = 1;
- 
 
 50 
int radeon_vram_limit       = 0;
- 
 
 51 
int radeon_audio            = 0;
Line 49... Line -...
49 
 
 - 
 
50 
void parse_cmdline(char *cmdline, mode_t *mode, char *log, int *kms);
 - 
 
51 
int init_display(struct radeon_device *rdev, mode_t *mode);
 - 
 
Line -... Line 52...
- 
 
 52 
 
- 
 
 53 
 
- 
 
 54 
void parse_cmdline(char *cmdline, videomode_t *mode, char *log, int *kms);
- 
 
 55 
int init_display(struct radeon_device *rdev, videomode_t *mode);
52 
int init_display_kms(struct radeon_device *rdev, mode_t *mode);
 56 
int init_display_kms(struct radeon_device *rdev, videomode_t *mode);
53 
 
 57 
 
Line 54... Line 58...
54 
int get_modes(mode_t *mode, int *count);
 58 
int get_modes(videomode_t *mode, int *count);
55 
int set_user_mode(mode_t *mode);
 59 
int set_user_mode(videomode_t *mode);
56 
 
 60 
 
Line 69... Line 73...
69 
/*
 73 
/*
70 
 * Clear GPU surface registers.
 74 
 * Clear GPU surface registers.
71 
 */
 75 
 */
72 
void radeon_surface_init(struct radeon_device *rdev)
 76 
void radeon_surface_init(struct radeon_device *rdev)
73 
{
 77 
{
74 
    ENTER();
 - 
 
75 
 
 - 
 
76 
    /* FIXME: check this out */
 78 
    /* FIXME: check this out */
77 
    if (rdev->family < CHIP_R600) {
 79 
    if (rdev->family < CHIP_R600) {
78 
        int i;
 80 
        int i;
Line 79... Line 81...
79 
 
 81 
 
80 
		for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 - 
 
81 
			if (rdev->surface_regs[i].bo)
 - 
 
82 
				radeon_bo_get_surface_reg(rdev->surface_regs[i].bo);
 - 
 
83 
			else
 82 
		for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
84 
				radeon_clear_surface_reg(rdev, i);
 83 
           radeon_clear_surface_reg(rdev, i);
85 
        }
 84 
        }
86 
		/* enable surfaces */
 85 
		/* enable surfaces */
87 
		WREG32(RADEON_SURFACE_CNTL, 0);
 86 
		WREG32(RADEON_SURFACE_CNTL, 0);
Line 419... Line 418...
419 
		break;
 418 
		break;
420 
	default:
 419 
	default:
421 
		/* FIXME: not supported yet */
 420 
		/* FIXME: not supported yet */
422 
		return -EINVAL;
 421 
		return -EINVAL;
423 
	}
 422 
	}
- 
 
 423 
 
- 
 
 424 
	if (rdev->flags & RADEON_IS_IGP) {
- 
 
 425 
		rdev->asic->get_memory_clock = NULL;
- 
 
 426 
		rdev->asic->set_memory_clock = NULL;
- 
 
 427 
	}
- 
 
 428 
 
424 
	return 0;
 429 
	return 0;
425 
}
 430 
}
Line 426... Line 431...
426 
 
 431 
 
Line 565... Line 570...
565 
		DRM_INFO("Forcing AGP to PCI mode\n");
 570 
		DRM_INFO("Forcing AGP to PCI mode\n");
566 
		rdev->flags |= RADEON_IS_PCI;
 571 
		rdev->flags |= RADEON_IS_PCI;
567 
		rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
 572 
		rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
568 
		rdev->asic->gart_set_page = &r100_pci_gart_set_page;
 573 
		rdev->asic->gart_set_page = &r100_pci_gart_set_page;
569 
	}
 574 
	}
- 
 
 575 
	rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
- 
 
 576 
}
- 
 
 577 
 
- 
 
 578 
void radeon_check_arguments(struct radeon_device *rdev)
- 
 
 579 
{
- 
 
 580 
	/* vramlimit must be a power of two */
- 
 
 581 
	switch (radeon_vram_limit) {
- 
 
 582 
	case 0:
- 
 
 583 
	case 4:
- 
 
 584 
	case 8:
- 
 
 585 
	case 16:
- 
 
 586 
	case 32:
- 
 
 587 
	case 64:
- 
 
 588 
	case 128:
- 
 
 589 
	case 256:
- 
 
 590 
	case 512:
- 
 
 591 
	case 1024:
- 
 
 592 
	case 2048:
- 
 
 593 
	case 4096:
- 
 
 594 
		break;
- 
 
 595 
	default:
- 
 
 596 
		dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n",
- 
 
 597 
				radeon_vram_limit);
- 
 
 598 
		radeon_vram_limit = 0;
- 
 
 599 
		break;
- 
 
 600 
	}
- 
 
 601 
	radeon_vram_limit = radeon_vram_limit << 20;
- 
 
 602 
	/* gtt size must be power of two and greater or equal to 32M */
- 
 
 603 
	switch (radeon_gart_size) {
- 
 
 604 
	case 4:
- 
 
 605 
	case 8:
- 
 
 606 
	case 16:
- 
 
 607 
		dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n",
- 
 
 608 
				radeon_gart_size);
- 
 
 609 
		radeon_gart_size = 512;
- 
 
 610 
		break;
- 
 
 611 
	case 32:
- 
 
 612 
	case 64:
- 
 
 613 
	case 128:
- 
 
 614 
	case 256:
- 
 
 615 
	case 512:
- 
 
 616 
	case 1024:
- 
 
 617 
	case 2048:
- 
 
 618 
	case 4096:
- 
 
 619 
		break;
- 
 
 620 
	default:
- 
 
 621 
		dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n",
- 
 
 622 
				radeon_gart_size);
- 
 
 623 
		radeon_gart_size = 512;
- 
 
 624 
		break;
- 
 
 625 
	}
- 
 
 626 
	rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
- 
 
 627 
	/* AGP mode can only be -1, 1, 2, 4, 8 */
- 
 
 628 
	switch (radeon_agpmode) {
- 
 
 629 
	case -1:
- 
 
 630 
	case 0:
- 
 
 631 
	case 1:
- 
 
 632 
	case 2:
- 
 
 633 
	case 4:
- 
 
 634 
	case 8:
- 
 
 635 
		break;
- 
 
 636 
	default:
- 
 
 637 
		dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: "
- 
 
 638 
				"-1, 0, 1, 2, 4, 8)\n", radeon_agpmode);
- 
 
 639 
		radeon_agpmode = 0;
- 
 
 640 
		break;
- 
 
 641 
	}
570 
}
 642 
}
Line 571... Line -...
571 
 
 - 
 
572 
/*
 - 
 
573 
 * Radeon device.
 - 
 
574 
 */
 643 
 
575 
int radeon_device_init(struct radeon_device *rdev,
 644 
int radeon_device_init(struct radeon_device *rdev,
576 
               struct drm_device *ddev,
 645 
               struct drm_device *ddev,
577 
               struct pci_dev *pdev,
 646 
               struct pci_dev *pdev,
578 
               uint32_t flags)
 647 
               uint32_t flags)
Line 598... Line 667...
598 
 //   mutex_init(&rdev->cp.mutex);
 667 
 //   mutex_init(&rdev->cp.mutex);
599 
 //   rwlock_init(&rdev->fence_drv.lock);
 668 
 //   rwlock_init(&rdev->fence_drv.lock);
Line 600... Line 669...
600 
 
 669 
 
601 
	/* Set asic functions */
 670 
	/* Set asic functions */
602 
	r = radeon_asic_init(rdev);
 671 
	r = radeon_asic_init(rdev);
603 
	if (r) {
 672 
	if (r)
604 
		return r;
 - 
 
- 
 
 673 
		return r;
Line 605... Line 674...
605 
	}
 674 
	radeon_check_arguments(rdev);
606 
 
 675 
 
607 
	if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
 676 
	if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
Line 721... Line 790...
721 
        }
 790 
        }
722 
    };
 791 
    };
723 
    return 0;
 792 
    return 0;
724 
}
 793 
}
Line 725... Line 794...
725 
 
 794 
 
Line 726... Line 795...
726 
mode_t usermode;
 795 
videomode_t usermode;
727 
 
 796 
 
728 
 
 797 
 
Line 865... Line 934...
865 
            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
 934 
            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
866 
                       inp, io->inp_size, io->out_size );
 935 
                       inp, io->inp_size, io->out_size );
Line 867... Line 936...
867 
 
 936 
 
868 
            if( radeon_modeset &&
 937 
            if( radeon_modeset &&
869 
                (outp != NULL) && (io->out_size == 4) &&
 938 
                (outp != NULL) && (io->out_size == 4) &&
870 
                (io->inp_size == *outp * sizeof(mode_t)) )
 939 
                (io->inp_size == *outp * sizeof(videomode_t)) )
871 
            {
 940 
            {
872 
                retval = get_modes((mode_t*)inp, outp);
 941 
                retval = get_modes((videomode_t*)inp, outp);
873 
            };
 942 
            };
Line 874... Line 943...
874 
            break;
 943 
            break;
875 
 
 944 
 
876 
        case SRV_SET_MODE:
 945 
        case SRV_SET_MODE:
Line 877... Line 946...
877 
            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
 946 
            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
878 
                       inp, io->inp_size);
 947 
                       inp, io->inp_size);
879 
 
 948 
 
880 
            if(  radeon_modeset   &&
 949 
            if(  radeon_modeset   &&
881 
                (inp != NULL) &&
 950 
                (inp != NULL) &&
882 
                (io->inp_size == sizeof(mode_t)) )
 951 
                (io->inp_size == sizeof(videomode_t)) )
883 
            {
 952 
            {
884 
                retval = set_user_mode((mode_t*)inp);
 953 
                retval = set_user_mode((videomode_t*)inp);
Line 885... Line 954...
885 
            };
 954 
            };
886 
            break;
 955 
            break;
Line 887... Line 956...
887 
    };
 956 
    };
888 
 
 957 
 
Line 889... Line 958...
889 
    return retval;
 958 
    return retval;
890 
}
 959 
}
891 
 
 960 
 
Line 916... Line 985...
916 
        {
 985 
        {
917 
            printf("Can't open %s\nExit\n", log);
 986 
            printf("Can't open %s\nExit\n", log);
918 
            return 0;
 987 
            return 0;
919 
        };
 988 
        };
920 
    }
 989 
    }
921 
    dbgprintf("Radeon RC09 cmdline %s\n", cmdline);
 990 
    dbgprintf("Radeon RC9 cmdline %s\n", cmdline);
Line 922... Line 991...
922 
 
 991 
 
Line 923... Line 992...
923 
    enum_pci_devices();
 992 
    enum_pci_devices();