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| Rev 1404 | Rev 1430 | ||
|---|---|---|---|
| Line 148... | Line 148... | ||
| 148 | { |
148 | { |
| 149 | struct radeon_device *rdev = dev->dev_private; |
149 | struct radeon_device *rdev = dev->dev_private; |
| 150 | int rev; |
150 | int rev; |
| 151 | uint16_t offset = 0, check_offset; |
151 | uint16_t offset = 0, check_offset; |
| Line -... | Line 152... | ||
| - | 152 | ||
| - | 153 | if (!rdev->bios) |
|
| - | 154 | return 0; |
|
| 152 | 155 | ||
| 153 | switch (table) { |
156 | switch (table) { |
| 154 | /* absolute offset tables */ |
157 | /* absolute offset tables */ |
| 155 | case COMBIOS_ASIC_INIT_1_TABLE: |
158 | case COMBIOS_ASIC_INIT_1_TABLE: |
| 156 | check_offset = RBIOS16(rdev->bios_header_start + 0xc); |
159 | check_offset = RBIOS16(rdev->bios_header_start + 0xc); |
| Line 441... | Line 444... | ||
| 441 | 444 | ||
| Line 442... | Line 445... | ||
| 442 | return offset; |
445 | return offset; |
| Line -... | Line 446... | ||
| - | 446 | ||
| - | 447 | } |
|
| - | 448 | ||
| - | 449 | bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev) |
|
| - | 450 | { |
|
| - | 451 | int edid_info; |
|
| - | 452 | struct edid *edid; |
|
| - | 453 | edid_info = combios_get_table_offset(rdev->ddev, COMBIOS_HARDCODED_EDID_TABLE); |
|
| - | 454 | if (!edid_info) |
|
| - | 455 | return false; |
|
| - | 456 | ||
| - | 457 | edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1), |
|
| - | 458 | GFP_KERNEL); |
|
| - | 459 | if (edid == NULL) |
|
| - | 460 | return false; |
|
| - | 461 | ||
| - | 462 | memcpy((unsigned char *)edid, |
|
| - | 463 | (unsigned char *)(rdev->bios + edid_info), EDID_LENGTH); |
|
| - | 464 | ||
| - | 465 | if (!drm_edid_is_valid(edid)) { |
|
| - | 466 | kfree(edid); |
|
| - | 467 | return false; |
|
| - | 468 | } |
|
| - | 469 | ||
| - | 470 | rdev->mode_info.bios_hardcoded_edid = edid; |
|
| - | 471 | return true; |
|
| - | 472 | } |
|
| - | 473 | ||
| - | 474 | struct edid * |
|
| - | 475 | radeon_combios_get_hardcoded_edid(struct radeon_device *rdev) |
|
| - | 476 | { |
|
| - | 477 | if (rdev->mode_info.bios_hardcoded_edid) |
|
| - | 478 | return rdev->mode_info.bios_hardcoded_edid; |
|
| 443 | 479 | return NULL; |
|
| 444 | } |
480 | } |
| 445 | 481 | ||
| 446 | static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, |
482 | static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, |
| Line 484... | Line 520... | ||
| 484 | i2c.en_data_reg = ddc_line; |
520 | i2c.en_data_reg = ddc_line; |
| 485 | i2c.y_clk_reg = ddc_line; |
521 | i2c.y_clk_reg = ddc_line; |
| 486 | i2c.y_data_reg = ddc_line; |
522 | i2c.y_data_reg = ddc_line; |
| 487 | } |
523 | } |
| Line 488... | Line 524... | ||
| 488 | 524 | ||
| - | 525 | switch (rdev->family) { |
|
| - | 526 | case CHIP_R100: |
|
| - | 527 | case CHIP_RV100: |
|
| - | 528 | case CHIP_RS100: |
|
| - | 529 | case CHIP_RV200: |
|
| - | 530 | case CHIP_RS200: |
|
| - | 531 | case CHIP_RS300: |
|
| - | 532 | switch (ddc_line) { |
|
| - | 533 | case RADEON_GPIO_DVI_DDC: |
|
| - | 534 | /* in theory this should be hw capable, |
|
| - | 535 | * but it doesn't seem to work |
|
| 489 | if (rdev->family < CHIP_R200) |
536 | */ |
| - | 537 | i2c.hw_capable = false; |
|
| - | 538 | break; |
|
| - | 539 | default: |
|
| - | 540 | i2c.hw_capable = false; |
|
| - | 541 | break; |
|
| - | 542 | } |
|
| - | 543 | break; |
|
| - | 544 | case CHIP_R200: |
|
| - | 545 | switch (ddc_line) { |
|
| - | 546 | case RADEON_GPIO_DVI_DDC: |
|
| - | 547 | case RADEON_GPIO_MONID: |
|
| - | 548 | i2c.hw_capable = true; |
|
| - | 549 | break; |
|
| - | 550 | default: |
|
| - | 551 | i2c.hw_capable = false; |
|
| - | 552 | break; |
|
| - | 553 | } |
|
| - | 554 | break; |
|
| - | 555 | case CHIP_RV250: |
|
| - | 556 | case CHIP_RV280: |
|
| - | 557 | switch (ddc_line) { |
|
| - | 558 | case RADEON_GPIO_VGA_DDC: |
|
| - | 559 | case RADEON_GPIO_DVI_DDC: |
|
| - | 560 | case RADEON_GPIO_CRT2_DDC: |
|
| - | 561 | i2c.hw_capable = true; |
|
| - | 562 | break; |
|
| - | 563 | default: |
|
| - | 564 | i2c.hw_capable = false; |
|
| - | 565 | break; |
|
| - | 566 | } |
|
| - | 567 | break; |
|
| - | 568 | case CHIP_R300: |
|
| - | 569 | case CHIP_R350: |
|
| - | 570 | switch (ddc_line) { |
|
| - | 571 | case RADEON_GPIO_VGA_DDC: |
|
| - | 572 | case RADEON_GPIO_DVI_DDC: |
|
| - | 573 | i2c.hw_capable = true; |
|
| - | 574 | break; |
|
| - | 575 | default: |
|
| - | 576 | i2c.hw_capable = false; |
|
| - | 577 | break; |
|
| 490 | i2c.hw_capable = false; |
578 | } |
| - | 579 | break; |
|
| - | 580 | case CHIP_RV350: |
|
| - | 581 | case CHIP_RV380: |
|
| - | 582 | case CHIP_RS400: |
|
| 491 | else { |
583 | case CHIP_RS480: |
| 492 | switch (ddc_line) { |
584 | switch (ddc_line) { |
| 493 | case RADEON_GPIO_VGA_DDC: |
585 | case RADEON_GPIO_VGA_DDC: |
| 494 | case RADEON_GPIO_DVI_DDC: |
586 | case RADEON_GPIO_DVI_DDC: |
| 495 | i2c.hw_capable = true; |
587 | i2c.hw_capable = true; |
| Line 502... | Line 594... | ||
| 502 | break; |
594 | break; |
| 503 | default: |
595 | default: |
| 504 | i2c.hw_capable = false; |
596 | i2c.hw_capable = false; |
| 505 | break; |
597 | break; |
| 506 | } |
598 | } |
| - | 599 | break; |
|
| - | 600 | default: |
|
| - | 601 | i2c.hw_capable = false; |
|
| - | 602 | break; |
|
| 507 | } |
603 | } |
| 508 | i2c.mm_i2c = false; |
604 | i2c.mm_i2c = false; |
| 509 | i2c.i2c_id = 0; |
605 | i2c.i2c_id = 0; |
| - | 606 | i2c.hpd_id = 0; |
|
| Line 510... | Line 607... | ||
| 510 | 607 | ||
| 511 | if (ddc_line) |
608 | if (ddc_line) |
| 512 | i2c.valid = true; |
609 | i2c.valid = true; |
| 513 | else |
610 | else |
| Line 525... | Line 622... | ||
| 525 | struct radeon_pll *spll = &rdev->clock.spll; |
622 | struct radeon_pll *spll = &rdev->clock.spll; |
| 526 | struct radeon_pll *mpll = &rdev->clock.mpll; |
623 | struct radeon_pll *mpll = &rdev->clock.mpll; |
| 527 | int8_t rev; |
624 | int8_t rev; |
| 528 | uint16_t sclk, mclk; |
625 | uint16_t sclk, mclk; |
| Line 529... | Line -... | ||
| 529 | - | ||
| 530 | if (rdev->bios == NULL) |
- | |
| 531 | return false; |
- | |
| 532 | 626 | ||
| 533 | pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); |
627 | pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); |
| 534 | if (pll_info) { |
628 | if (pll_info) { |
| Line 535... | Line 629... | ||
| 535 | rev = RBIOS8(pll_info); |
629 | rev = RBIOS8(pll_info); |
| Line 652... | Line 746... | ||
| 652 | GFP_KERNEL); |
746 | GFP_KERNEL); |
| Line 653... | Line 747... | ||
| 653 | 747 | ||
| 654 | if (!p_dac) |
748 | if (!p_dac) |
| Line 655... | Line -... | ||
| 655 | return NULL; |
- | |
| 656 | - | ||
| 657 | if (rdev->bios == NULL) |
- | |
| 658 | goto out; |
749 | return NULL; |
| 659 | 750 | ||
| 660 | /* check CRT table */ |
751 | /* check CRT table */ |
| 661 | dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
752 | dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
| 662 | if (dac_info) { |
753 | if (dac_info) { |
| Line 671... | Line 762... | ||
| 671 | p_dac->ps2_pdac_adj = (bg << 8) | (dac); |
762 | p_dac->ps2_pdac_adj = (bg << 8) | (dac); |
| 672 | } |
763 | } |
| 673 | found = 1; |
764 | found = 1; |
| 674 | } |
765 | } |
| Line 675... | Line -... | ||
| 675 | - | ||
| 676 | out: |
766 | |
| 677 | if (!found) /* fallback to defaults */ |
767 | if (!found) /* fallback to defaults */ |
| Line 678... | Line 768... | ||
| 678 | radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac); |
768 | radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac); |
| 679 | 769 | ||
| Line 685... | Line 775... | ||
| 685 | { |
775 | { |
| 686 | struct drm_device *dev = rdev->ddev; |
776 | struct drm_device *dev = rdev->ddev; |
| 687 | uint16_t tv_info; |
777 | uint16_t tv_info; |
| 688 | enum radeon_tv_std tv_std = TV_STD_NTSC; |
778 | enum radeon_tv_std tv_std = TV_STD_NTSC; |
| Line 689... | Line -... | ||
| 689 | - | ||
| 690 | if (rdev->bios == NULL) |
- | |
| 691 | return tv_std; |
- | |
| 692 | 779 | ||
| 693 | tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
780 | tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
| 694 | if (tv_info) { |
781 | if (tv_info) { |
| 695 | if (RBIOS8(tv_info + 6) == 'T') { |
782 | if (RBIOS8(tv_info + 6) == 'T') { |
| 696 | switch (RBIOS8(tv_info + 7) & 0xf) { |
783 | switch (RBIOS8(tv_info + 7) & 0xf) { |
| Line 791... | Line 878... | ||
| 791 | 878 | ||
| 792 | tv_dac = kzalloc(sizeof(struct radeon_encoder_tv_dac), GFP_KERNEL); |
879 | tv_dac = kzalloc(sizeof(struct radeon_encoder_tv_dac), GFP_KERNEL); |
| 793 | if (!tv_dac) |
880 | if (!tv_dac) |
| Line 794... | Line -... | ||
| 794 | return NULL; |
- | |
| 795 | - | ||
| 796 | if (rdev->bios == NULL) |
- | |
| 797 | goto out; |
881 | return NULL; |
| 798 | 882 | ||
| 799 | /* first check TV table */ |
883 | /* first check TV table */ |
| 800 | dac_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
884 | dac_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
| 801 | if (dac_info) { |
885 | if (dac_info) { |
| Line 855... | Line 939... | ||
| 855 | } else { |
939 | } else { |
| 856 | DRM_INFO("No TV DAC info found in BIOS\n"); |
940 | DRM_INFO("No TV DAC info found in BIOS\n"); |
| 857 | } |
941 | } |
| 858 | } |
942 | } |
| Line 859... | Line -... | ||
| 859 | - | ||
| 860 | out: |
943 | |
| 861 | if (!found) /* fallback to defaults */ |
944 | if (!found) /* fallback to defaults */ |
| Line 862... | Line 945... | ||
| 862 | radeon_legacy_get_tv_dac_info_from_table(rdev, tv_dac); |
945 | radeon_legacy_get_tv_dac_info_from_table(rdev, tv_dac); |
| 863 | 946 | ||
| Line 943... | Line 1026... | ||
| 943 | uint32_t panel_setup; |
1026 | uint32_t panel_setup; |
| 944 | char stmp[30]; |
1027 | char stmp[30]; |
| 945 | int tmp, i; |
1028 | int tmp, i; |
| 946 | struct radeon_encoder_lvds *lvds = NULL; |
1029 | struct radeon_encoder_lvds *lvds = NULL; |
| Line 947... | Line -... | ||
| 947 | - | ||
| 948 | if (rdev->bios == NULL) { |
- | |
| 949 | lvds = radeon_legacy_get_lvds_info_from_regs(rdev); |
- | |
| 950 | goto out; |
- | |
| 951 | } |
- | |
| 952 | 1030 | ||
| Line 953... | Line 1031... | ||
| 953 | lcd_info = combios_get_table_offset(dev, COMBIOS_LCD_INFO_TABLE); |
1031 | lcd_info = combios_get_table_offset(dev, COMBIOS_LCD_INFO_TABLE); |
| 954 | 1032 | ||
| Line 1048... | Line 1126... | ||
| 1048 | } |
1126 | } |
| 1049 | } else { |
1127 | } else { |
| 1050 | DRM_INFO("No panel info found in BIOS\n"); |
1128 | DRM_INFO("No panel info found in BIOS\n"); |
| 1051 | lvds = radeon_legacy_get_lvds_info_from_regs(rdev); |
1129 | lvds = radeon_legacy_get_lvds_info_from_regs(rdev); |
| 1052 | } |
1130 | } |
| 1053 | out: |
1131 | |
| 1054 | if (lvds) |
1132 | if (lvds) |
| 1055 | encoder->native_mode = lvds->native_mode; |
1133 | encoder->native_mode = lvds->native_mode; |
| 1056 | return lvds; |
1134 | return lvds; |
| 1057 | } |
1135 | } |
| Line 1100... | Line 1178... | ||
| 1100 | struct radeon_device *rdev = dev->dev_private; |
1178 | struct radeon_device *rdev = dev->dev_private; |
| 1101 | uint16_t tmds_info; |
1179 | uint16_t tmds_info; |
| 1102 | int i, n; |
1180 | int i, n; |
| 1103 | uint8_t ver; |
1181 | uint8_t ver; |
| Line 1104... | Line -... | ||
| 1104 | - | ||
| 1105 | if (rdev->bios == NULL) |
- | |
| 1106 | return false; |
- | |
| 1107 | 1182 | ||
| Line 1108... | Line 1183... | ||
| 1108 | tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); |
1183 | tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); |
| 1109 | 1184 | ||
| 1110 | if (tmds_info) { |
1185 | if (tmds_info) { |
| Line 1182... | Line 1257... | ||
| 1182 | uint8_t ver, id, blocks, clk, data; |
1257 | uint8_t ver, id, blocks, clk, data; |
| 1183 | int i; |
1258 | int i; |
| 1184 | enum radeon_combios_ddc gpio; |
1259 | enum radeon_combios_ddc gpio; |
| 1185 | struct radeon_i2c_bus_rec i2c_bus; |
1260 | struct radeon_i2c_bus_rec i2c_bus; |
| Line 1186... | Line -... | ||
| 1186 | - | ||
| 1187 | if (rdev->bios == NULL) |
- | |
| 1188 | return false; |
- | |
| 1189 | 1261 | ||
| 1190 | tmds->i2c_bus = NULL; |
1262 | tmds->i2c_bus = NULL; |
| 1191 | if (rdev->flags & RADEON_IS_IGP) { |
1263 | if (rdev->flags & RADEON_IS_IGP) { |
| 1192 | offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE); |
1264 | offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE); |
| 1193 | if (offset) { |
1265 | if (offset) { |
| Line 1251... | Line 1323... | ||
| 1251 | else |
1323 | else |
| 1252 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
1324 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); |
| 1253 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
1325 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
| 1254 | break; |
1326 | break; |
| 1255 | case DDC_LCD: /* MM i2c */ |
1327 | case DDC_LCD: /* MM i2c */ |
| - | 1328 | i2c_bus.valid = true; |
|
| - | 1329 | i2c_bus.hw_capable = true; |
|
| - | 1330 | i2c_bus.mm_i2c = true; |
|
| 1256 | DRM_ERROR("MM i2c requires hw i2c engine\n"); |
1331 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); |
| 1257 | break; |
1332 | break; |
| 1258 | default: |
1333 | default: |
| 1259 | DRM_ERROR("Unsupported gpio %d\n", gpio); |
1334 | DRM_ERROR("Unsupported gpio %d\n", gpio); |
| 1260 | break; |
1335 | break; |
| 1261 | } |
1336 | } |
| Line 1277... | Line 1352... | ||
| 1277 | struct radeon_hpd hpd; |
1352 | struct radeon_hpd hpd; |
| Line 1278... | Line 1353... | ||
| 1278 | 1353 | ||
| 1279 | rdev->mode_info.connector_table = radeon_connector_table; |
1354 | rdev->mode_info.connector_table = radeon_connector_table; |
| 1280 | if (rdev->mode_info.connector_table == CT_NONE) { |
1355 | if (rdev->mode_info.connector_table == CT_NONE) { |
| 1281 | #ifdef CONFIG_PPC_PMAC |
1356 | #ifdef CONFIG_PPC_PMAC |
| 1282 | if (machine_is_compatible("PowerBook3,3")) { |
1357 | if (of_machine_is_compatible("PowerBook3,3")) { |
| 1283 | /* powerbook with VGA */ |
1358 | /* powerbook with VGA */ |
| 1284 | rdev->mode_info.connector_table = CT_POWERBOOK_VGA; |
1359 | rdev->mode_info.connector_table = CT_POWERBOOK_VGA; |
| 1285 | } else if (machine_is_compatible("PowerBook3,4") || |
1360 | } else if (of_machine_is_compatible("PowerBook3,4") || |
| 1286 | machine_is_compatible("PowerBook3,5")) { |
1361 | of_machine_is_compatible("PowerBook3,5")) { |
| 1287 | /* powerbook with internal tmds */ |
1362 | /* powerbook with internal tmds */ |
| 1288 | rdev->mode_info.connector_table = CT_POWERBOOK_INTERNAL; |
1363 | rdev->mode_info.connector_table = CT_POWERBOOK_INTERNAL; |
| 1289 | } else if (machine_is_compatible("PowerBook5,1") || |
1364 | } else if (of_machine_is_compatible("PowerBook5,1") || |
| 1290 | machine_is_compatible("PowerBook5,2") || |
1365 | of_machine_is_compatible("PowerBook5,2") || |
| 1291 | machine_is_compatible("PowerBook5,3") || |
1366 | of_machine_is_compatible("PowerBook5,3") || |
| 1292 | machine_is_compatible("PowerBook5,4") || |
1367 | of_machine_is_compatible("PowerBook5,4") || |
| 1293 | machine_is_compatible("PowerBook5,5")) { |
1368 | of_machine_is_compatible("PowerBook5,5")) { |
| 1294 | /* powerbook with external single link tmds (sil164) */ |
1369 | /* powerbook with external single link tmds (sil164) */ |
| 1295 | rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; |
1370 | rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; |
| 1296 | } else if (machine_is_compatible("PowerBook5,6")) { |
1371 | } else if (of_machine_is_compatible("PowerBook5,6")) { |
| 1297 | /* powerbook with external dual or single link tmds */ |
1372 | /* powerbook with external dual or single link tmds */ |
| 1298 | rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; |
1373 | rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; |
| 1299 | } else if (machine_is_compatible("PowerBook5,7") || |
1374 | } else if (of_machine_is_compatible("PowerBook5,7") || |
| 1300 | machine_is_compatible("PowerBook5,8") || |
1375 | of_machine_is_compatible("PowerBook5,8") || |
| 1301 | machine_is_compatible("PowerBook5,9")) { |
1376 | of_machine_is_compatible("PowerBook5,9")) { |
| 1302 | /* PowerBook6,2 ? */ |
1377 | /* PowerBook6,2 ? */ |
| 1303 | /* powerbook with external dual link tmds (sil1178?) */ |
1378 | /* powerbook with external dual link tmds (sil1178?) */ |
| 1304 | rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; |
1379 | rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; |
| 1305 | } else if (machine_is_compatible("PowerBook4,1") || |
1380 | } else if (of_machine_is_compatible("PowerBook4,1") || |
| 1306 | machine_is_compatible("PowerBook4,2") || |
1381 | of_machine_is_compatible("PowerBook4,2") || |
| 1307 | machine_is_compatible("PowerBook4,3") || |
1382 | of_machine_is_compatible("PowerBook4,3") || |
| 1308 | machine_is_compatible("PowerBook6,3") || |
1383 | of_machine_is_compatible("PowerBook6,3") || |
| 1309 | machine_is_compatible("PowerBook6,5") || |
1384 | of_machine_is_compatible("PowerBook6,5") || |
| 1310 | machine_is_compatible("PowerBook6,7")) { |
1385 | of_machine_is_compatible("PowerBook6,7")) { |
| 1311 | /* ibook */ |
1386 | /* ibook */ |
| 1312 | rdev->mode_info.connector_table = CT_IBOOK; |
1387 | rdev->mode_info.connector_table = CT_IBOOK; |
| 1313 | } else if (machine_is_compatible("PowerMac4,4")) { |
1388 | } else if (of_machine_is_compatible("PowerMac4,4")) { |
| 1314 | /* emac */ |
1389 | /* emac */ |
| 1315 | rdev->mode_info.connector_table = CT_EMAC; |
1390 | rdev->mode_info.connector_table = CT_EMAC; |
| 1316 | } else if (machine_is_compatible("PowerMac10,1")) { |
1391 | } else if (of_machine_is_compatible("PowerMac10,1")) { |
| 1317 | /* mini with internal tmds */ |
1392 | /* mini with internal tmds */ |
| 1318 | rdev->mode_info.connector_table = CT_MINI_INTERNAL; |
1393 | rdev->mode_info.connector_table = CT_MINI_INTERNAL; |
| 1319 | } else if (machine_is_compatible("PowerMac10,2")) { |
1394 | } else if (of_machine_is_compatible("PowerMac10,2")) { |
| 1320 | /* mini with external tmds */ |
1395 | /* mini with external tmds */ |
| 1321 | rdev->mode_info.connector_table = CT_MINI_EXTERNAL; |
1396 | rdev->mode_info.connector_table = CT_MINI_EXTERNAL; |
| 1322 | } else if (machine_is_compatible("PowerMac12,1")) { |
1397 | } else if (of_machine_is_compatible("PowerMac12,1")) { |
| 1323 | /* PowerMac8,1 ? */ |
1398 | /* PowerMac8,1 ? */ |
| 1324 | /* imac g5 isight */ |
1399 | /* imac g5 isight */ |
| 1325 | rdev->mode_info.connector_table = CT_IMAC_G5_ISIGHT; |
1400 | rdev->mode_info.connector_table = CT_IMAC_G5_ISIGHT; |
| 1326 | } else |
1401 | } else |
| Line 1907... | Line 1982... | ||
| 1907 | enum radeon_combios_connector connector; |
1982 | enum radeon_combios_connector connector; |
| 1908 | int i = 0; |
1983 | int i = 0; |
| 1909 | struct radeon_i2c_bus_rec ddc_i2c; |
1984 | struct radeon_i2c_bus_rec ddc_i2c; |
| 1910 | struct radeon_hpd hpd; |
1985 | struct radeon_hpd hpd; |
| Line 1911... | Line -... | ||
| 1911 | - | ||
| 1912 | if (rdev->bios == NULL) |
- | |
| 1913 | return false; |
- | |
| 1914 | 1986 | ||
| 1915 | conn_info = combios_get_table_offset(dev, COMBIOS_CONNECTOR_INFO_TABLE); |
1987 | conn_info = combios_get_table_offset(dev, COMBIOS_CONNECTOR_INFO_TABLE); |
| 1916 | if (conn_info) { |
1988 | if (conn_info) { |
| 1917 | for (i = 0; i < 4; i++) { |
1989 | for (i = 0; i < 4; i++) { |
| Line 2276... | Line 2348... | ||
| 2276 | radeon_link_encoder_connector(dev); |
2348 | radeon_link_encoder_connector(dev); |
| Line 2277... | Line 2349... | ||
| 2277 | 2349 | ||
| 2278 | return true; |
2350 | return true; |
| Line -... | Line 2351... | ||
| - | 2351 | } |
|
| - | 2352 | ||
| - | 2353 | void radeon_combios_get_power_modes(struct radeon_device *rdev) |
|
| - | 2354 | { |
|
| - | 2355 | struct drm_device *dev = rdev->ddev; |
|
| - | 2356 | u16 offset, misc, misc2 = 0; |
|
| - | 2357 | u8 rev, blocks, tmp; |
|
| - | 2358 | int state_index = 0; |
|
| - | 2359 | ||
| - | 2360 | rdev->pm.default_power_state = NULL; |
|
| - | 2361 | ||
| - | 2362 | if (rdev->flags & RADEON_IS_MOBILITY) { |
|
| - | 2363 | offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE); |
|
| - | 2364 | if (offset) { |
|
| - | 2365 | rev = RBIOS8(offset); |
|
| - | 2366 | blocks = RBIOS8(offset + 0x2); |
|
| - | 2367 | /* power mode 0 tends to be the only valid one */ |
|
| - | 2368 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
|
| - | 2369 | rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2); |
|
| - | 2370 | rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6); |
|
| - | 2371 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || |
|
| - | 2372 | (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) |
|
| - | 2373 | goto default_mode; |
|
| - | 2374 | /* skip overclock modes for now */ |
|
| - | 2375 | if ((rdev->pm.power_state[state_index].clock_info[0].mclk > |
|
| - | 2376 | rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) || |
|
| - | 2377 | (rdev->pm.power_state[state_index].clock_info[0].sclk > |
|
| - | 2378 | rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN)) |
|
| - | 2379 | goto default_mode; |
|
| - | 2380 | rdev->pm.power_state[state_index].type = |
|
| - | 2381 | POWER_STATE_TYPE_BATTERY; |
|
| - | 2382 | misc = RBIOS16(offset + 0x5 + 0x0); |
|
| - | 2383 | if (rev > 4) |
|
| - | 2384 | misc2 = RBIOS16(offset + 0x5 + 0xe); |
|
| - | 2385 | if (misc & 0x4) { |
|
| - | 2386 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO; |
|
| - | 2387 | if (misc & 0x8) |
|
| - | 2388 | rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = |
|
| - | 2389 | true; |
|
| - | 2390 | else |
|
| - | 2391 | rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = |
|
| - | 2392 | false; |
|
| - | 2393 | rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = true; |
|
| - | 2394 | if (rev < 6) { |
|
| - | 2395 | rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg = |
|
| - | 2396 | RBIOS16(offset + 0x5 + 0xb) * 4; |
|
| - | 2397 | tmp = RBIOS8(offset + 0x5 + 0xd); |
|
| - | 2398 | rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp); |
|
| - | 2399 | } else { |
|
| - | 2400 | u8 entries = RBIOS8(offset + 0x5 + 0xb); |
|
| - | 2401 | u16 voltage_table_offset = RBIOS16(offset + 0x5 + 0xc); |
|
| - | 2402 | if (entries && voltage_table_offset) { |
|
| - | 2403 | rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg = |
|
| - | 2404 | RBIOS16(voltage_table_offset) * 4; |
|
| - | 2405 | tmp = RBIOS8(voltage_table_offset + 0x2); |
|
| - | 2406 | rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp); |
|
| - | 2407 | } else |
|
| - | 2408 | rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = false; |
|
| - | 2409 | } |
|
| - | 2410 | switch ((misc2 & 0x700) >> 8) { |
|
| - | 2411 | case 0: |
|
| - | 2412 | default: |
|
| - | 2413 | rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 0; |
|
| - | 2414 | break; |
|
| - | 2415 | case 1: |
|
| - | 2416 | rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 33; |
|
| - | 2417 | break; |
|
| - | 2418 | case 2: |
|
| - | 2419 | rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 66; |
|
| - | 2420 | break; |
|
| - | 2421 | case 3: |
|
| - | 2422 | rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 99; |
|
| - | 2423 | break; |
|
| - | 2424 | case 4: |
|
| - | 2425 | rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 132; |
|
| - | 2426 | break; |
|
| - | 2427 | } |
|
| - | 2428 | } else |
|
| - | 2429 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
|
| - | 2430 | if (rev > 6) |
|
| - | 2431 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = |
|
| - | 2432 | RBIOS8(offset + 0x5 + 0x10); |
|
| - | 2433 | state_index++; |
|
| - | 2434 | } else { |
|
| - | 2435 | /* XXX figure out some good default low power mode for mobility cards w/out power tables */ |
|
| - | 2436 | } |
|
| - | 2437 | } else { |
|
| - | 2438 | /* XXX figure out some good default low power mode for desktop cards */ |
|
| - | 2439 | } |
|
| - | 2440 | ||
| - | 2441 | default_mode: |
|
| - | 2442 | /* add the default mode */ |
|
| - | 2443 | rdev->pm.power_state[state_index].type = |
|
| - | 2444 | POWER_STATE_TYPE_DEFAULT; |
|
| - | 2445 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
|
| - | 2446 | rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; |
|
| - | 2447 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; |
|
| - | 2448 | rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0]; |
|
| - | 2449 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
|
| - | 2450 | if (rdev->asic->get_pcie_lanes) |
|
| - | 2451 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev); |
|
| - | 2452 | else |
|
| - | 2453 | rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16; |
|
| - | 2454 | rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; |
|
| - | 2455 | rdev->pm.num_power_states = state_index + 1; |
|
| - | 2456 | ||
| - | 2457 | rdev->pm.current_power_state = rdev->pm.default_power_state; |
|
| - | 2458 | rdev->pm.current_clock_mode = |
|
| - | 2459 | rdev->pm.default_power_state->default_clock_mode; |
|
| 2279 | } |
2460 | } |
| 2280 | 2461 | ||
| 2281 | void radeon_external_tmds_setup(struct drm_encoder *encoder) |
2462 | void radeon_external_tmds_setup(struct drm_encoder *encoder) |
| 2282 | { |
2463 | { |
| Line 2287... | Line 2468... | ||
| 2287 | return; |
2468 | return; |
| Line 2288... | Line 2469... | ||
| 2288 | 2469 | ||
| 2289 | switch (tmds->dvo_chip) { |
2470 | switch (tmds->dvo_chip) { |
| 2290 | case DVO_SIL164: |
2471 | case DVO_SIL164: |
| 2291 | /* sil 164 */ |
- | |
| 2292 | radeon_i2c_do_lock(tmds->i2c_bus, 1); |
2472 | /* sil 164 */ |
| 2293 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2473 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2294 | tmds->slave_addr, |
2474 | tmds->slave_addr, |
| 2295 | 0x08, 0x30); |
2475 | 0x08, 0x30); |
| 2296 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2476 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2297 | tmds->slave_addr, |
2477 | tmds->slave_addr, |
| 2298 | 0x09, 0x00); |
2478 | 0x09, 0x00); |
| 2299 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2479 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2300 | tmds->slave_addr, |
2480 | tmds->slave_addr, |
| 2301 | 0x0a, 0x90); |
2481 | 0x0a, 0x90); |
| 2302 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2482 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2303 | tmds->slave_addr, |
2483 | tmds->slave_addr, |
| 2304 | 0x0c, 0x89); |
2484 | 0x0c, 0x89); |
| 2305 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2485 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2306 | tmds->slave_addr, |
2486 | tmds->slave_addr, |
| 2307 | 0x08, 0x3b); |
- | |
| 2308 | radeon_i2c_do_lock(tmds->i2c_bus, 0); |
2487 | 0x08, 0x3b); |
| 2309 | break; |
2488 | break; |
| 2310 | case DVO_SIL1178: |
2489 | case DVO_SIL1178: |
| 2311 | /* sil 1178 - untested */ |
2490 | /* sil 1178 - untested */ |
| 2312 | /* |
2491 | /* |
| Line 2336... | Line 2515... | ||
| 2336 | uint8_t blocks, slave_addr, rev; |
2515 | uint8_t blocks, slave_addr, rev; |
| 2337 | uint32_t index, id; |
2516 | uint32_t index, id; |
| 2338 | uint32_t reg, val, and_mask, or_mask; |
2517 | uint32_t reg, val, and_mask, or_mask; |
| 2339 | struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv; |
2518 | struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv; |
| Line 2340... | Line -... | ||
| 2340 | - | ||
| 2341 | if (rdev->bios == NULL) |
- | |
| 2342 | return false; |
- | |
| 2343 | 2519 | ||
| 2344 | if (!tmds) |
2520 | if (!tmds) |
| Line 2345... | Line 2521... | ||
| 2345 | return false; |
2521 | return false; |
| 2346 | 2522 | ||
| Line 2388... | Line 2564... | ||
| 2388 | index++; |
2564 | index++; |
| 2389 | reg = RBIOS8(index); |
2565 | reg = RBIOS8(index); |
| 2390 | index++; |
2566 | index++; |
| 2391 | val = RBIOS8(index); |
2567 | val = RBIOS8(index); |
| 2392 | index++; |
2568 | index++; |
| 2393 | radeon_i2c_do_lock(tmds->i2c_bus, 1); |
- | |
| 2394 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2569 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2395 | slave_addr, |
2570 | slave_addr, |
| 2396 | reg, val); |
2571 | reg, val); |
| 2397 | radeon_i2c_do_lock(tmds->i2c_bus, 0); |
- | |
| 2398 | break; |
2572 | break; |
| 2399 | default: |
2573 | default: |
| 2400 | DRM_ERROR("Unknown id %d\n", id >> 13); |
2574 | DRM_ERROR("Unknown id %d\n", id >> 13); |
| 2401 | break; |
2575 | break; |
| 2402 | } |
2576 | } |
| Line 2445... | Line 2619... | ||
| 2445 | break; |
2619 | break; |
| 2446 | case 6: |
2620 | case 6: |
| 2447 | reg = id & 0x1fff; |
2621 | reg = id & 0x1fff; |
| 2448 | val = RBIOS8(index); |
2622 | val = RBIOS8(index); |
| 2449 | index += 1; |
2623 | index += 1; |
| 2450 | radeon_i2c_do_lock(tmds->i2c_bus, 1); |
- | |
| 2451 | radeon_i2c_sw_put_byte(tmds->i2c_bus, |
2624 | radeon_i2c_put_byte(tmds->i2c_bus, |
| 2452 | tmds->slave_addr, |
2625 | tmds->slave_addr, |
| 2453 | reg, val); |
2626 | reg, val); |
| 2454 | radeon_i2c_do_lock(tmds->i2c_bus, 0); |
- | |
| 2455 | break; |
2627 | break; |
| 2456 | default: |
2628 | default: |
| 2457 | DRM_ERROR("Unknown id %d\n", id >> 13); |
2629 | DRM_ERROR("Unknown id %d\n", id >> 13); |
| 2458 | break; |
2630 | break; |
| 2459 | } |
2631 | } |