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Rev 1403 Rev 1430
Line 94... Line 94...
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void radeon_get_clock_info(struct drm_device *dev)
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void radeon_get_clock_info(struct drm_device *dev)
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{
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{
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	struct radeon_device *rdev = dev->dev_private;
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	struct radeon_device *rdev = dev->dev_private;
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	struct radeon_pll *p1pll = &rdev->clock.p1pll;
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	struct radeon_pll *p1pll = &rdev->clock.p1pll;
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	struct radeon_pll *p2pll = &rdev->clock.p2pll;
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	struct radeon_pll *p2pll = &rdev->clock.p2pll;
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	struct radeon_pll *dcpll = &rdev->clock.dcpll;
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	struct radeon_pll *spll = &rdev->clock.spll;
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	struct radeon_pll *spll = &rdev->clock.spll;
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	struct radeon_pll *mpll = &rdev->clock.mpll;
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	struct radeon_pll *mpll = &rdev->clock.mpll;
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	int ret;
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	int ret;
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		p2pll->max_post_div = 12;
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		p2pll->max_post_div = 12;
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		p2pll->min_frac_feedback_div = 0;
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		p2pll->min_frac_feedback_div = 0;
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		p2pll->max_frac_feedback_div = 0;
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		p2pll->max_frac_feedback_div = 0;
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	}
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	}
Line -... Line 207...
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	/* dcpll is DCE4 only */
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	dcpll->min_post_div = 2;
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	dcpll->max_post_div = 0x7f;
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	dcpll->min_frac_feedback_div = 0;
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	dcpll->max_frac_feedback_div = 9;
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	dcpll->min_ref_div = 2;
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	dcpll->max_ref_div = 0x3ff;
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	dcpll->min_feedback_div = 4;
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	dcpll->max_feedback_div = 0xfff;
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	dcpll->best_vco = 0;
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	p1pll->min_ref_div = 2;
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	p1pll->min_ref_div = 2;
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	p1pll->max_ref_div = 0x3ff;
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	p1pll->max_ref_div = 0x3ff;
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	p1pll->min_feedback_div = 4;
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	p1pll->min_feedback_div = 4;
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	p1pll->max_feedback_div = 0x7ff;
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	p1pll->max_feedback_div = 0x7ff;
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	struct radeon_device *rdev = dev->dev_private;
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	struct radeon_device *rdev = dev->dev_private;
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	/* XXX make sure engine is idle */
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	/* XXX make sure engine is idle */
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- 
 
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	if (radeon_dynclks != -1) {
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	if (radeon_dynclks != -1) {
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		if (radeon_dynclks) {
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		if (radeon_dynclks)
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			if (rdev->asic->set_clock_gating)
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			radeon_set_clock_gating(rdev, 1);
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			radeon_set_clock_gating(rdev, 1);
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		}
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	}
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	}
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	radeon_apply_clock_quirks(rdev);
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	radeon_apply_clock_quirks(rdev);