Rev 3120 | Rev 5078 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 3120 | Rev 3764 | ||
|---|---|---|---|
| Line 89... | Line 89... | ||
| 89 | // pci_unmap_rom(rdev->pdev, bios); |
89 | // pci_unmap_rom(rdev->pdev, bios); |
| 90 | return false; |
90 | return false; |
| 91 | } |
91 | } |
| 92 | rdev->bios = kmalloc(size, GFP_KERNEL); |
92 | rdev->bios = kmalloc(size, GFP_KERNEL); |
| 93 | if (rdev->bios == NULL) { |
93 | if (rdev->bios == NULL) { |
| 94 | // pci_unmap_rom(rdev->pdev, bios); |
- | |
| 95 | return false; |
94 | return false; |
| 96 | } |
95 | } |
| 97 | memcpy(rdev->bios, bios, size); |
96 | memcpy(rdev->bios, bios, size); |
| 98 | // pci_unmap_rom(rdev->pdev, bios); |
- | |
| 99 | return true; |
97 | return true; |
| 100 | } |
98 | } |
| Line 101... | Line 99... | ||
| 101 | 99 | ||
| 102 | #ifdef CONFIG_ACPI |
100 | #ifdef CONFIG_ACPI |
| Line 219... | Line 217... | ||
| 219 | vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); |
217 | vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); |
| 220 | rom_cntl = RREG32(R600_ROM_CNTL); |
218 | rom_cntl = RREG32(R600_ROM_CNTL); |
| Line 221... | Line 219... | ||
| 221 | 219 | ||
| 222 | /* enable the rom */ |
220 | /* enable the rom */ |
| - | 221 | WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); |
|
| 223 | WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); |
222 | if (!ASIC_IS_NODCE(rdev)) { |
| 224 | /* Disable VGA mode */ |
223 | /* Disable VGA mode */ |
| 225 | WREG32(AVIVO_D1VGA_CONTROL, |
224 | WREG32(AVIVO_D1VGA_CONTROL, |
| 226 | (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | |
225 | (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | |
| 227 | AVIVO_DVGA_CONTROL_TIMING_SELECT))); |
226 | AVIVO_DVGA_CONTROL_TIMING_SELECT))); |
| 228 | WREG32(AVIVO_D2VGA_CONTROL, |
227 | WREG32(AVIVO_D2VGA_CONTROL, |
| 229 | (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | |
228 | (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | |
| 230 | AVIVO_DVGA_CONTROL_TIMING_SELECT))); |
229 | AVIVO_DVGA_CONTROL_TIMING_SELECT))); |
| 231 | WREG32(AVIVO_VGA_RENDER_CONTROL, |
230 | WREG32(AVIVO_VGA_RENDER_CONTROL, |
| - | 231 | (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); |
|
| 232 | (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); |
232 | } |
| Line 233... | Line 233... | ||
| 233 | WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE); |
233 | WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE); |
| Line 234... | Line 234... | ||
| 234 | 234 | ||
| 235 | r = radeon_read_bios(rdev); |
235 | r = radeon_read_bios(rdev); |
| - | 236 | ||
| 236 | 237 | /* restore regs */ |
|
| 237 | /* restore regs */ |
238 | WREG32(R600_BUS_CNTL, bus_cntl); |
| 238 | WREG32(R600_BUS_CNTL, bus_cntl); |
239 | if (!ASIC_IS_NODCE(rdev)) { |
| - | 240 | WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); |
|
| 239 | WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); |
241 | WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); |
| 240 | WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); |
242 | WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); |
| 241 | WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); |
243 | } |
| Line 242... | Line 244... | ||
| 242 | WREG32(R600_ROM_CNTL, rom_cntl); |
244 | WREG32(R600_ROM_CNTL, rom_cntl); |