Rev 1321 | Rev 1412 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1321 | Rev 1404 | ||
---|---|---|---|
Line 112... | Line 112... | ||
112 | i2c.mm_i2c = false; |
112 | i2c.mm_i2c = false; |
Line 113... | Line 113... | ||
113 | 113 | ||
Line 114... | Line 114... | ||
114 | i2c.i2c_id = gpio->sucI2cId.ucAccess; |
114 | i2c.i2c_id = gpio->sucI2cId.ucAccess; |
- | 115 | ||
115 | 116 | i2c.valid = true; |
|
116 | i2c.valid = true; |
117 | break; |
Line 117... | Line 118... | ||
117 | } |
118 | } |
118 | } |
119 | } |
Line 343... | Line 344... | ||
343 | DRM_MODE_CONNECTOR_LVDS, |
344 | DRM_MODE_CONNECTOR_LVDS, |
344 | DRM_MODE_CONNECTOR_9PinDIN, |
345 | DRM_MODE_CONNECTOR_9PinDIN, |
345 | DRM_MODE_CONNECTOR_Unknown, |
346 | DRM_MODE_CONNECTOR_Unknown, |
346 | DRM_MODE_CONNECTOR_Unknown, |
347 | DRM_MODE_CONNECTOR_Unknown, |
347 | DRM_MODE_CONNECTOR_Unknown, |
348 | DRM_MODE_CONNECTOR_Unknown, |
348 | DRM_MODE_CONNECTOR_DisplayPort |
349 | DRM_MODE_CONNECTOR_DisplayPort, |
- | 350 | DRM_MODE_CONNECTOR_eDP, |
|
- | 351 | DRM_MODE_CONNECTOR_Unknown |
|
349 | }; |
352 | }; |
Line 350... | Line 353... | ||
350 | 353 | ||
351 | bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) |
354 | bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) |
352 | { |
355 | { |
Line 743... | Line 746... | ||
743 | dac), |
746 | dac), |
744 | (1 << i)); |
747 | (1 << i)); |
745 | else |
748 | else |
746 | radeon_add_legacy_encoder(dev, |
749 | radeon_add_legacy_encoder(dev, |
747 | radeon_get_encoder_id(dev, |
750 | radeon_get_encoder_id(dev, |
748 | (1 << |
751 | (1 << i), |
749 | i), |
- | |
750 | dac), |
752 | dac), |
751 | (1 << i)); |
753 | (1 << i)); |
752 | } |
754 | } |
Line 753... | Line 755... | ||
753 | 755 | ||
Line 756... | Line 758... | ||
756 | if (bios_connectors[i].valid) { |
758 | if (bios_connectors[i].valid) { |
757 | for (j = 0; j < max_device; j++) { |
759 | for (j = 0; j < max_device; j++) { |
758 | if (bios_connectors[j].valid && (i != j)) { |
760 | if (bios_connectors[j].valid && (i != j)) { |
759 | if (bios_connectors[i].line_mux == |
761 | if (bios_connectors[i].line_mux == |
760 | bios_connectors[j].line_mux) { |
762 | bios_connectors[j].line_mux) { |
761 | if (((bios_connectors[i]. |
763 | /* make sure not to combine LVDS */ |
762 | devices & |
764 | if (bios_connectors[i].devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
763 | (ATOM_DEVICE_DFP_SUPPORT)) |
765 | bios_connectors[i].line_mux = 53; |
764 | && (bios_connectors[j]. |
766 | bios_connectors[i].ddc_bus.valid = false; |
765 | devices & |
767 | continue; |
766 | (ATOM_DEVICE_CRT_SUPPORT))) |
- | |
767 | || |
768 | } |
768 | ((bios_connectors[j]. |
769 | if (bios_connectors[j].devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
769 | devices & |
770 | bios_connectors[j].line_mux = 53; |
770 | (ATOM_DEVICE_DFP_SUPPORT)) |
771 | bios_connectors[j].ddc_bus.valid = false; |
771 | && (bios_connectors[i]. |
772 | continue; |
772 | devices & |
773 | } |
- | 774 | /* combine analog and digital for DVI-I */ |
|
773 | (ATOM_DEVICE_CRT_SUPPORT)))) { |
775 | if (((bios_connectors[i].devices & (ATOM_DEVICE_DFP_SUPPORT)) && |
774 | bios_connectors[i]. |
776 | (bios_connectors[j].devices & (ATOM_DEVICE_CRT_SUPPORT))) || |
775 | devices |= |
777 | ((bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT)) && |
776 | bios_connectors[j]. |
778 | (bios_connectors[i].devices & (ATOM_DEVICE_CRT_SUPPORT)))) { |
777 | devices; |
779 | bios_connectors[i].devices |= |
778 | bios_connectors[i]. |
780 | bios_connectors[j].devices; |
779 | connector_type = |
781 | bios_connectors[i].connector_type = |
780 | DRM_MODE_CONNECTOR_DVII; |
782 | DRM_MODE_CONNECTOR_DVII; |
781 | if (bios_connectors[j].devices & |
783 | if (bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT)) |
782 | (ATOM_DEVICE_DFP_SUPPORT)) |
- | |
783 | bios_connectors[i].hpd = |
784 | bios_connectors[i].hpd = |
784 | bios_connectors[j].hpd; |
785 | bios_connectors[j].hpd; |
785 | bios_connectors[j]. |
786 | bios_connectors[j].valid = false; |
786 | valid = false; |
- | |
787 | } |
787 | } |
788 | } |
788 | } |
789 | } |
789 | } |
790 | } |
790 | } |
791 | } |
791 | } |
Line 936... | Line 936... | ||
936 | return true; |
936 | return true; |
937 | } |
937 | } |
938 | return false; |
938 | return false; |
939 | } |
939 | } |
Line -... | Line 940... | ||
- | 940 | ||
- | 941 | union igp_info { |
|
- | 942 | struct _ATOM_INTEGRATED_SYSTEM_INFO info; |
|
- | 943 | struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2; |
|
- | 944 | }; |
|
- | 945 | ||
- | 946 | bool radeon_atombios_sideport_present(struct radeon_device *rdev) |
|
- | 947 | { |
|
- | 948 | struct radeon_mode_info *mode_info = &rdev->mode_info; |
|
- | 949 | int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo); |
|
- | 950 | union igp_info *igp_info; |
|
- | 951 | u8 frev, crev; |
|
- | 952 | u16 data_offset; |
|
- | 953 | ||
- | 954 | atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, |
|
- | 955 | &crev, &data_offset); |
|
- | 956 | ||
- | 957 | igp_info = (union igp_info *)(mode_info->atom_context->bios + |
|
- | 958 | data_offset); |
|
- | 959 | ||
- | 960 | if (igp_info) { |
|
- | 961 | switch (crev) { |
|
- | 962 | case 1: |
|
- | 963 | if (igp_info->info.ucMemoryType & 0xf0) |
|
- | 964 | return true; |
|
- | 965 | break; |
|
- | 966 | case 2: |
|
- | 967 | if (igp_info->info_2.ucMemoryType & 0x0f) |
|
- | 968 | return true; |
|
- | 969 | break; |
|
- | 970 | default: |
|
- | 971 | DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev); |
|
- | 972 | break; |
|
- | 973 | } |
|
- | 974 | } |
|
- | 975 | return false; |
|
- | 976 | } |
|
940 | 977 | ||
941 | bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, |
978 | bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, |
942 | struct radeon_encoder_int_tmds *tmds) |
979 | struct radeon_encoder_int_tmds *tmds) |
943 | { |
980 | { |
944 | struct drm_device *dev = encoder->base.dev; |
981 | struct drm_device *dev = encoder->base.dev; |
Line 1027... | Line 1064... | ||
1027 | ss->type = ss_info->asSS_Info[i].ucSpreadSpectrumType; |
1064 | ss->type = ss_info->asSS_Info[i].ucSpreadSpectrumType; |
1028 | ss->step = ss_info->asSS_Info[i].ucSS_Step; |
1065 | ss->step = ss_info->asSS_Info[i].ucSS_Step; |
1029 | ss->delay = ss_info->asSS_Info[i].ucSS_Delay; |
1066 | ss->delay = ss_info->asSS_Info[i].ucSS_Delay; |
1030 | ss->range = ss_info->asSS_Info[i].ucSS_Range; |
1067 | ss->range = ss_info->asSS_Info[i].ucSS_Range; |
1031 | ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div; |
1068 | ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div; |
- | 1069 | break; |
|
1032 | } |
1070 | } |
1033 | } |
1071 | } |
1034 | } |
1072 | } |
1035 | return ss; |
1073 | return ss; |
1036 | } |
1074 | } |
Line 1232... | Line 1270... | ||
1232 | break; |
1270 | break; |
1233 | } |
1271 | } |
1234 | return true; |
1272 | return true; |
1235 | } |
1273 | } |
Line -... | Line 1274... | ||
- | 1274 | ||
- | 1275 | enum radeon_tv_std |
|
- | 1276 | radeon_atombios_get_tv_info(struct radeon_device *rdev) |
|
- | 1277 | { |
|
- | 1278 | struct radeon_mode_info *mode_info = &rdev->mode_info; |
|
- | 1279 | int index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); |
|
- | 1280 | uint16_t data_offset; |
|
- | 1281 | uint8_t frev, crev; |
|
- | 1282 | struct _ATOM_ANALOG_TV_INFO *tv_info; |
|
- | 1283 | enum radeon_tv_std tv_std = TV_STD_NTSC; |
|
- | 1284 | ||
- | 1285 | atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, &crev, &data_offset); |
|
- | 1286 | ||
- | 1287 | tv_info = (struct _ATOM_ANALOG_TV_INFO *)(mode_info->atom_context->bios + data_offset); |
|
- | 1288 | ||
- | 1289 | switch (tv_info->ucTV_BootUpDefaultStandard) { |
|
- | 1290 | case ATOM_TV_NTSC: |
|
- | 1291 | tv_std = TV_STD_NTSC; |
|
- | 1292 | DRM_INFO("Default TV standard: NTSC\n"); |
|
- | 1293 | break; |
|
- | 1294 | case ATOM_TV_NTSCJ: |
|
- | 1295 | tv_std = TV_STD_NTSC_J; |
|
- | 1296 | DRM_INFO("Default TV standard: NTSC-J\n"); |
|
- | 1297 | break; |
|
- | 1298 | case ATOM_TV_PAL: |
|
- | 1299 | tv_std = TV_STD_PAL; |
|
- | 1300 | DRM_INFO("Default TV standard: PAL\n"); |
|
- | 1301 | break; |
|
- | 1302 | case ATOM_TV_PALM: |
|
- | 1303 | tv_std = TV_STD_PAL_M; |
|
- | 1304 | DRM_INFO("Default TV standard: PAL-M\n"); |
|
- | 1305 | break; |
|
- | 1306 | case ATOM_TV_PALN: |
|
- | 1307 | tv_std = TV_STD_PAL_N; |
|
- | 1308 | DRM_INFO("Default TV standard: PAL-N\n"); |
|
- | 1309 | break; |
|
- | 1310 | case ATOM_TV_PALCN: |
|
- | 1311 | tv_std = TV_STD_PAL_CN; |
|
- | 1312 | DRM_INFO("Default TV standard: PAL-CN\n"); |
|
- | 1313 | break; |
|
- | 1314 | case ATOM_TV_PAL60: |
|
- | 1315 | tv_std = TV_STD_PAL_60; |
|
- | 1316 | DRM_INFO("Default TV standard: PAL-60\n"); |
|
- | 1317 | break; |
|
- | 1318 | case ATOM_TV_SECAM: |
|
- | 1319 | tv_std = TV_STD_SECAM; |
|
- | 1320 | DRM_INFO("Default TV standard: SECAM\n"); |
|
- | 1321 | break; |
|
- | 1322 | default: |
|
- | 1323 | tv_std = TV_STD_NTSC; |
|
- | 1324 | DRM_INFO("Unknown TV standard; defaulting to NTSC\n"); |
|
- | 1325 | break; |
|
- | 1326 | } |
|
- | 1327 | return tv_std; |
|
- | 1328 | } |
|
1236 | 1329 | ||
1237 | struct radeon_encoder_tv_dac * |
1330 | struct radeon_encoder_tv_dac * |
1238 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder) |
1331 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder) |
1239 | { |
1332 | { |
1240 | struct drm_device *dev = encoder->base.dev; |
1333 | struct drm_device *dev = encoder->base.dev; |
Line 1267... | Line 1360... | ||
1267 | 1360 | ||
1268 | bg = dac_info->ucDAC2_NTSC_BG_Adjustment; |
1361 | bg = dac_info->ucDAC2_NTSC_BG_Adjustment; |
1269 | dac = dac_info->ucDAC2_NTSC_DAC_Adjustment; |
1362 | dac = dac_info->ucDAC2_NTSC_DAC_Adjustment; |
Line -... | Line 1363... | ||
- | 1363 | tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); |
|
1270 | tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); |
1364 | |
1271 | 1365 | tv_dac->tv_std = radeon_atombios_get_tv_info(rdev); |
|
1272 | } |
1366 | } |
Line 1273... | Line 1367... | ||
1273 | return tv_dac; |
1367 | return tv_dac; |