WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/radeon.h



 *                          function should do is setting the GPU
 *                          memory controller (only MC setup failure
 *                          are considered as fatal)
 */

 
#include 

#include 
 

 
/*
 * GEM objects.
 */
struct radeon_gem {
	struct mutex		mutex;
	struct list_head	objects;

};
 

/*
 * locking -
 * mutex protects scheduled_ibs, ready, alloc_bm
 */
struct radeon_ib_pool {
	struct mutex		mutex;
	struct radeon_bo	*robj;
	struct list_head	bogus_ib;
	struct radeon_ib	ibs[RADEON_IB_POOL_SIZE];
    bool                ready;
	unsigned		head_id;

    unsigned            ring_free_dw;
    int                 count_dw;
    uint64_t            gpu_addr;
    uint32_t            align_mask;
    uint32_t            ptr_mask;
	struct mutex		mutex;
    bool                ready;
};

 
/*

    spinlock_t              lock;
    bool                enabled;
};

 
struct r600_blit {
	struct mutex		mutex;
	struct radeon_bo	*shader_obj;
	u64 shader_gpu_addr;
	u32 vs_offset, ps_offset;
	u32 state_offset;

 * CS.
 */
struct radeon_cs_reloc {
//	struct drm_gem_object		*gobj;
	struct radeon_bo		*robj;
	struct radeon_bo_list		lobj;
    uint32_t                handle;
    uint32_t                flags;
};

 

 * Some modes are overclocked by very low value, accept them
 */
#define RADEON_MODE_OVERCLOCK_MARGIN 500 /* 5 MHz */

 
struct radeon_pm {
	struct mutex		mutex;
//	struct delayed_work	idle_work;
	enum radeon_pm_state	state;
	enum radeon_pm_action	planned_action;
	unsigned long		action_timeout;

//    struct radeon_irq       irq;
    struct radeon_asic         *asic;
    struct radeon_gem       gem;
	struct radeon_pm		pm;
	uint32_t			bios_scratch[RADEON_BIOS_NUM_SCRATCH];
	struct mutex			cs_mutex;
    struct radeon_wb        wb;
	struct radeon_dummy_page	dummy_page;
    bool                gpu_lockup;
    bool                shutdown;
    bool                suspend;

	const struct firmware *pfp_fw;	/* r6/700 PFP firmware */
	const struct firmware *rlc_fw;	/* r6/700 RLC firmware */
	struct r600_blit r600_blit;
	int msi_enabled; /* msi enabled */
	int num_crtc; /* number of crtcs */
	struct mutex dc_hw_i2c_mutex; /* display controller hw i2c mutex */

 
	/* audio stuff */
//   struct timer_list   audio_timer;
	int			audio_channels;

Rev 1430	Rev 1630
Line 58...	Line 58...
58	* function should do is setting the GPU	58	* function should do is setting the GPU
59	* memory controller (only MC setup failure	59	* memory controller (only MC setup failure
60	* are considered as fatal)	60	* are considered as fatal)
61	*/	61	*/
Line -...	Line 62...
-		62
62		63	#include
Line 63...	Line 64...
63	#include	64	#include
64		65
Line 329...	Line 330...
329		330
330	/*	331	/*
331	* GEM objects.	332	* GEM objects.
332	*/	333	*/
-		334	struct radeon_gem {
333	struct radeon_gem {	335	struct mutex mutex;
334	struct list_head objects;	336	struct list_head objects;
Line 335...	Line 337...
335	};	337	};
336		338
Line 464...	Line 466...
464	/*	466	/*
465	* locking -	467	* locking -
466	* mutex protects scheduled_ibs, ready, alloc_bm	468	* mutex protects scheduled_ibs, ready, alloc_bm
467	*/	469	*/
468	struct radeon_ib_pool {	470	struct radeon_ib_pool {
469	// struct mutex mutex;	471	struct mutex mutex;
470	struct radeon_bo *robj;	472	struct radeon_bo *robj;
471	struct list_head bogus_ib;	473	struct list_head bogus_ib;
472	struct radeon_ib ibs[RADEON_IB_POOL_SIZE];	474	struct radeon_ib ibs[RADEON_IB_POOL_SIZE];
473	bool ready;	475	bool ready;
474	unsigned head_id;	476	unsigned head_id;
Line 484...	Line 486...
484	unsigned ring_free_dw;	486	unsigned ring_free_dw;
485	int count_dw;	487	int count_dw;
486	uint64_t gpu_addr;	488	uint64_t gpu_addr;
487	uint32_t align_mask;	489	uint32_t align_mask;
488	uint32_t ptr_mask;	490	uint32_t ptr_mask;
489	// struct mutex mutex;	491	struct mutex mutex;
490	bool ready;	492	bool ready;
491	};	493	};
Line 492...	Line 494...
492		494
493	/*	495	/*
Line 505...	Line 507...
505	spinlock_t lock;	507	spinlock_t lock;
506	bool enabled;	508	bool enabled;
507	};	509	};
Line 508...	Line 510...
508		510
-		511	struct r600_blit {
509	struct r600_blit {	512	struct mutex mutex;
510	struct radeon_bo *shader_obj;	513	struct radeon_bo *shader_obj;
511	u64 shader_gpu_addr;	514	u64 shader_gpu_addr;
512	u32 vs_offset, ps_offset;	515	u32 vs_offset, ps_offset;
513	u32 state_offset;	516	u32 state_offset;
Line 537...	Line 540...
537	* CS.	540	* CS.
538	*/	541	*/
539	struct radeon_cs_reloc {	542	struct radeon_cs_reloc {
540	// struct drm_gem_object *gobj;	543	// struct drm_gem_object *gobj;
541	struct radeon_bo *robj;	544	struct radeon_bo *robj;
542	// struct radeon_bo_list lobj;	545	struct radeon_bo_list lobj;
543	uint32_t handle;	546	uint32_t handle;
544	uint32_t flags;	547	uint32_t flags;
545	};	548	};
Line 546...	Line 549...
546		549
Line 743...	Line 746...
743	* Some modes are overclocked by very low value, accept them	746	* Some modes are overclocked by very low value, accept them
744	*/	747	*/
745	#define RADEON_MODE_OVERCLOCK_MARGIN 500 /* 5 MHz */	748	#define RADEON_MODE_OVERCLOCK_MARGIN 500 /* 5 MHz */
Line 746...	Line 749...
746		749
747	struct radeon_pm {	750	struct radeon_pm {
748	// struct mutex mutex;	751	struct mutex mutex;
749	// struct delayed_work idle_work;	752	// struct delayed_work idle_work;
750	enum radeon_pm_state state;	753	enum radeon_pm_state state;
751	enum radeon_pm_action planned_action;	754	enum radeon_pm_action planned_action;
752	unsigned long action_timeout;	755	unsigned long action_timeout;
Line 960...	Line 963...
960	// struct radeon_irq irq;	963	// struct radeon_irq irq;
961	struct radeon_asic *asic;	964	struct radeon_asic *asic;
962	struct radeon_gem gem;	965	struct radeon_gem gem;
963	struct radeon_pm pm;	966	struct radeon_pm pm;
964	uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH];	967	uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH];
965	// struct mutex cs_mutex;	968	struct mutex cs_mutex;
966	struct radeon_wb wb;	969	struct radeon_wb wb;
967	struct radeon_dummy_page dummy_page;	970	struct radeon_dummy_page dummy_page;
968	bool gpu_lockup;	971	bool gpu_lockup;
969	bool shutdown;	972	bool shutdown;
970	bool suspend;	973	bool suspend;
Line 975...	Line 978...
975	const struct firmware pfp_fw; / r6/700 PFP firmware */	978	const struct firmware pfp_fw; / r6/700 PFP firmware */
976	const struct firmware rlc_fw; / r6/700 RLC firmware */	979	const struct firmware rlc_fw; / r6/700 RLC firmware */
977	struct r600_blit r600_blit;	980	struct r600_blit r600_blit;
978	int msi_enabled; /* msi enabled */	981	int msi_enabled; /* msi enabled */
979	int num_crtc; /* number of crtcs */	982	int num_crtc; /* number of crtcs */
-		983	struct mutex dc_hw_i2c_mutex; /* display controller hw i2c mutex */
Line 980...	Line 984...
980		984
981	/* audio stuff */	985	/* audio stuff */
982	// struct timer_list audio_timer;	986	// struct timer_list audio_timer;
983	int audio_channels;	987	int audio_channels;

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/radeon/radeon.h – Rev 1430 → 1630