Rev 1246 | Rev 1321 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1246 | Rev 1268 | ||
---|---|---|---|
Line 200... | Line 200... | ||
200 | /* 10 Khz units */ |
200 | /* 10 Khz units */ |
201 | uint32_t default_mclk; |
201 | uint32_t default_mclk; |
202 | uint32_t default_sclk; |
202 | uint32_t default_sclk; |
203 | }; |
203 | }; |
Line -... | Line 204... | ||
- | 204 | ||
- | 205 | /* |
|
- | 206 | * Power management |
|
- | 207 | */ |
|
Line 204... | Line 208... | ||
204 | 208 | int radeon_pm_init(struct radeon_device *rdev); |
|
205 | 209 | ||
206 | /* |
210 | /* |
207 | * Fences. |
211 | * Fences. |
Line 311... | Line 315... | ||
311 | union radeon_gart_table { |
315 | union radeon_gart_table { |
312 | struct radeon_gart_table_ram ram; |
316 | struct radeon_gart_table_ram ram; |
313 | struct radeon_gart_table_vram vram; |
317 | struct radeon_gart_table_vram vram; |
314 | }; |
318 | }; |
Line -... | Line 319... | ||
- | 319 | ||
- | 320 | #define RADEON_GPU_PAGE_SIZE 4096 |
|
315 | 321 | ||
316 | struct radeon_gart { |
322 | struct radeon_gart { |
317 | dma_addr_t table_addr; |
323 | dma_addr_t table_addr; |
318 | unsigned num_gpu_pages; |
324 | unsigned num_gpu_pages; |
319 | unsigned num_cpu_pages; |
325 | unsigned num_cpu_pages; |
Line 632... | Line 638... | ||
632 | int (*copy)(struct radeon_device *rdev, |
638 | int (*copy)(struct radeon_device *rdev, |
633 | uint64_t src_offset, |
639 | uint64_t src_offset, |
634 | uint64_t dst_offset, |
640 | uint64_t dst_offset, |
635 | unsigned num_pages, |
641 | unsigned num_pages, |
636 | struct radeon_fence *fence); |
642 | struct radeon_fence *fence); |
- | 643 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); |
|
637 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
644 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
- | 645 | uint32_t (*get_memory_clock)(struct radeon_device *rdev); |
|
638 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); |
646 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); |
639 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
647 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
640 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
648 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
641 | int (*set_surface_reg)(struct radeon_device *rdev, int reg, |
649 | int (*set_surface_reg)(struct radeon_device *rdev, int reg, |
642 | uint32_t tiling_flags, uint32_t pitch, |
650 | uint32_t tiling_flags, uint32_t pitch, |
Line 770... | Line 778... | ||
770 | bool accel_working; |
778 | bool accel_working; |
771 | struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES]; |
779 | struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES]; |
772 | const struct firmware *me_fw; /* all family ME firmware */ |
780 | const struct firmware *me_fw; /* all family ME firmware */ |
773 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ |
781 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ |
774 | struct r600_blit r600_blit; |
782 | struct r600_blit r600_blit; |
- | 783 | int msi_enabled; /* msi enabled */ |
|
775 | }; |
784 | }; |
Line 776... | Line 785... | ||
776 | 785 | ||
777 | int radeon_device_init(struct radeon_device *rdev, |
786 | int radeon_device_init(struct radeon_device *rdev, |
778 | struct drm_device *ddev, |
787 | struct drm_device *ddev, |
Line 937... | Line 946... | ||
937 | #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc)) |
946 | #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc)) |
938 | #define radeon_fence_ring_emit(rdev, fence) (rdev)->asic->fence_ring_emit((rdev), (fence)) |
947 | #define radeon_fence_ring_emit(rdev, fence) (rdev)->asic->fence_ring_emit((rdev), (fence)) |
939 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) |
948 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) |
940 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) |
949 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) |
941 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) |
950 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) |
- | 951 | #define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) |
|
942 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
952 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
- | 953 | #define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) |
|
943 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
954 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
944 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) |
955 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) |
945 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) |
956 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) |
946 | #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) |
957 | #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) |
947 | #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) |
958 | #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) |