Rev 1403 | Rev 2997 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1403 | Rev 1963 | ||
|---|---|---|---|
| Line 79... | Line 79... | ||
| 79 | #define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 |
79 | #define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 |
| 80 | #define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c |
80 | #define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c |
| 81 | #define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 |
81 | #define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 |
| 82 | #define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 |
82 | #define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 |
| Line 83... | Line -... | ||
| 83 | - | ||
| - | 83 | ||
| - | 84 | #define R600_D1GRPH_SWAP_CONTROL 0x610C |
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| - | 85 | # define R600_D1GRPH_SWAP_ENDIAN_NONE (0 << 0) |
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| - | 86 | # define R600_D1GRPH_SWAP_ENDIAN_16BIT (1 << 0) |
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| - | 87 | # define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0) |
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| Line 84... | Line 88... | ||
| 84 | 88 | # define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0) |
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| Line 85... | Line 89... | ||
| 85 | 89 | ||
| - | 90 | #define R600_HDP_NONSURFACE_BASE 0x2c04 |
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| 86 | #define R600_HDP_NONSURFACE_BASE 0x2c04 |
91 | |
| 87 | 92 | #define R600_BUS_CNTL 0x5420 |
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| 88 | #define R600_BUS_CNTL 0x5420 |
93 | # define R600_BIOS_ROM_DIS (1 << 1) |
| 89 | #define R600_CONFIG_CNTL 0x5424 |
94 | #define R600_CONFIG_CNTL 0x5424 |
| Line 150... | Line 155... | ||
| 150 | #define R600_AUDIO_PIN_SENSE 0x73d0 |
155 | #define R600_AUDIO_PIN_SENSE 0x73d0 |
| 151 | #define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4 |
156 | #define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4 |
| 152 | #define R600_AUDIO_STATUS_BITS 0x73d8 |
157 | #define R600_AUDIO_STATUS_BITS 0x73d8 |
| Line 153... | Line 158... | ||
| 153 | 158 | ||
| 154 | /* HDMI base register addresses */ |
159 | /* HDMI base register addresses */ |
| 155 | #define R600_HDMI_TMDS1 0x7400 |
160 | #define R600_HDMI_BLOCK1 0x7400 |
| 156 | #define R600_HDMI_TMDS2 0x7700 |
161 | #define R600_HDMI_BLOCK2 0x7700 |
| Line 157... | Line 162... | ||
| 157 | #define R600_HDMI_DIG 0x7800 |
162 | #define R600_HDMI_BLOCK3 0x7800 |
| 158 | 163 | ||
| 159 | /* HDMI registers */ |
164 | /* HDMI registers */ |
| - | 165 | #define R600_HDMI_ENABLE 0x00 |
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| 160 | #define R600_HDMI_ENABLE 0x00 |
166 | #define R600_HDMI_STATUS 0x04 |
| - | 167 | # define R600_HDMI_INT_PENDING (1 << 29) |
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| - | 168 | #define R600_HDMI_CNTL 0x08 |
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| 161 | #define R600_HDMI_STATUS 0x04 |
169 | # define R600_HDMI_INT_EN (1 << 28) |
| 162 | #define R600_HDMI_CNTL 0x08 |
170 | # define R600_HDMI_INT_ACK (1 << 29) |
| 163 | #define R600_HDMI_UNKNOWN_0 0x0C |
171 | #define R600_HDMI_UNKNOWN_0 0x0C |
| 164 | #define R600_HDMI_AUDIOCNTL 0x10 |
172 | #define R600_HDMI_AUDIOCNTL 0x10 |
| 165 | #define R600_HDMI_VIDEOCNTL 0x14 |
173 | #define R600_HDMI_VIDEOCNTL 0x14 |
| Line 183... | Line 191... | ||
| 183 | #define R600_HDMI_AUDIO_DEBUG_0 0xe0 |
191 | #define R600_HDMI_AUDIO_DEBUG_0 0xe0 |
| 184 | #define R600_HDMI_AUDIO_DEBUG_1 0xe4 |
192 | #define R600_HDMI_AUDIO_DEBUG_1 0xe4 |
| 185 | #define R600_HDMI_AUDIO_DEBUG_2 0xe8 |
193 | #define R600_HDMI_AUDIO_DEBUG_2 0xe8 |
| 186 | #define R600_HDMI_AUDIO_DEBUG_3 0xec |
194 | #define R600_HDMI_AUDIO_DEBUG_3 0xec |
| Line -... | Line 195... | ||
| - | 195 | ||
| - | 196 | /* HDMI additional config base register addresses */ |
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| - | 197 | #define R600_HDMI_CONFIG1 0x7600 |
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| - | 198 | #define R600_HDMI_CONFIG2 0x7a00 |
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| 187 | 199 | ||