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Rev 3120 | Rev 3764 | ||
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Line 34... | Line 34... | ||
34 | #include "atom.h" |
34 | #include "atom.h" |
35 | #include "r100d.h" |
35 | #include "r100d.h" |
36 | #include "r420d.h" |
36 | #include "r420d.h" |
37 | #include "r420_reg_safe.h" |
37 | #include "r420_reg_safe.h" |
Line -... | Line 38... | ||
- | 38 | ||
- | 39 | void r420_pm_init_profile(struct radeon_device *rdev) |
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- | 40 | { |
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- | 41 | /* default */ |
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- | 42 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; |
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- | 43 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
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- | 44 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; |
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- | 45 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; |
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- | 46 | /* low sh */ |
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- | 47 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; |
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- | 48 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; |
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- | 49 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
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- | 50 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
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- | 51 | /* mid sh */ |
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- | 52 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; |
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- | 53 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; |
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- | 54 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; |
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- | 55 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; |
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- | 56 | /* high sh */ |
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- | 57 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; |
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- | 58 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
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- | 59 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; |
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- | 60 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; |
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- | 61 | /* low mh */ |
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- | 62 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 0; |
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- | 63 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
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- | 64 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
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- | 65 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
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- | 66 | /* mid mh */ |
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- | 67 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; |
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- | 68 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
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- | 69 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; |
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- | 70 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; |
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- | 71 | /* high mh */ |
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- | 72 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; |
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- | 73 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; |
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- | 74 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; |
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- | 75 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; |
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- | 76 | } |
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38 | 77 | ||
39 | static void r420_set_reg_safe(struct radeon_device *rdev) |
78 | static void r420_set_reg_safe(struct radeon_device *rdev) |
40 | { |
79 | { |
41 | rdev->config.r300.reg_safe_bm = r420_reg_safe_bm; |
80 | rdev->config.r300.reg_safe_bm = r420_reg_safe_bm; |
42 | rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm); |
81 | rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm); |
Line 224... | Line 263... | ||
224 | dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); |
263 | dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); |
225 | return r; |
264 | return r; |
226 | } |
265 | } |
Line 227... | Line 266... | ||
227 | 266 | ||
- | 267 | /* Enable IRQ */ |
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- | 268 | if (!rdev->irq.installed) { |
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- | 269 | r = radeon_irq_kms_init(rdev); |
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- | 270 | if (r) |
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- | 271 | return r; |
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- | 272 | } |
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228 | /* Enable IRQ */ |
273 | |
229 | r100_irq_set(rdev); |
274 | r100_irq_set(rdev); |
230 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
275 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
231 | /* 1M ring buffer */ |
276 | /* 1M ring buffer */ |
232 | r = r100_cp_init(rdev, 1024 * 1024); |
277 | r = r100_cp_init(rdev, 1024 * 1024); |
Line 303... | Line 348... | ||
303 | /* Fence driver */ |
348 | /* Fence driver */ |
304 | r = radeon_fence_driver_init(rdev); |
349 | r = radeon_fence_driver_init(rdev); |
305 | if (r) { |
350 | if (r) { |
306 | return r; |
351 | return r; |
307 | } |
352 | } |
308 | r = radeon_irq_kms_init(rdev); |
- | |
309 | if (r) { |
- | |
310 | return r; |
- | |
311 | } |
- | |
312 | /* Memory manager */ |
353 | /* Memory manager */ |
313 | r = radeon_bo_init(rdev); |
354 | r = radeon_bo_init(rdev); |
314 | if (r) { |
355 | if (r) { |
315 | return r; |
356 | return r; |
316 | } |
357 | } |