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Rev 5078 | Rev 5271 | ||
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Line 1364... | Line 1364... | ||
1364 | } |
1364 | } |
Line 1365... | Line 1365... | ||
1365 | 1365 | ||
1366 | void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) |
1366 | void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) |
1367 | { |
1367 | { |
- | 1368 | struct radeon_ring *ring = &rdev->ring[ib->ring]; |
|
1368 | struct radeon_ring *ring = &rdev->ring[ib->ring]; |
1369 | unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0; |
1369 | u32 cp_coher_cntl = PACKET3_FULL_CACHE_ENA | PACKET3_TC_ACTION_ENA | |
1370 | u32 cp_coher_cntl = PACKET3_FULL_CACHE_ENA | PACKET3_TC_ACTION_ENA | |
Line 1370... | Line 1371... | ||
1370 | PACKET3_SH_ACTION_ENA; |
1371 | PACKET3_SH_ACTION_ENA; |
1371 | 1372 | ||
Line 1386... | Line 1387... | ||
1386 | #ifdef __BIG_ENDIAN |
1387 | #ifdef __BIG_ENDIAN |
1387 | (2 << 0) | |
1388 | (2 << 0) | |
1388 | #endif |
1389 | #endif |
1389 | (ib->gpu_addr & 0xFFFFFFFC)); |
1390 | (ib->gpu_addr & 0xFFFFFFFC)); |
1390 | radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); |
1391 | radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); |
1391 | radeon_ring_write(ring, ib->length_dw | |
1392 | radeon_ring_write(ring, ib->length_dw | (vm_id << 24)); |
1392 | (ib->vm ? (ib->vm->id << 24) : 0)); |
- | |
Line 1393... | Line 1393... | ||
1393 | 1393 | ||
1394 | /* flush read cache over gart for this vmid */ |
1394 | /* flush read cache over gart for this vmid */ |
1395 | radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); |
1395 | radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); |
1396 | radeon_ring_write(ring, PACKET3_ENGINE_ME | cp_coher_cntl); |
1396 | radeon_ring_write(ring, PACKET3_ENGINE_ME | cp_coher_cntl); |
1397 | radeon_ring_write(ring, 0xFFFFFFFF); |
1397 | radeon_ring_write(ring, 0xFFFFFFFF); |
1398 | radeon_ring_write(ring, 0); |
1398 | radeon_ring_write(ring, 0); |
1399 | radeon_ring_write(ring, ((ib->vm ? ib->vm->id : 0) << 24) | 10); /* poll interval */ |
1399 | radeon_ring_write(ring, (vm_id << 24) | 10); /* poll interval */ |
Line 1400... | Line 1400... | ||
1400 | } |
1400 | } |
1401 | 1401 | ||
1402 | static void cayman_cp_enable(struct radeon_device *rdev, bool enable) |
1402 | static void cayman_cp_enable(struct radeon_device *rdev, bool enable) |
Line 2393... | Line 2393... | ||
2393 | * @rdev: radeon_device pointer |
2393 | * @rdev: radeon_device pointer |
2394 | * |
2394 | * |
2395 | * Update the page table base and flush the VM TLB |
2395 | * Update the page table base and flush the VM TLB |
2396 | * using the CP (cayman-si). |
2396 | * using the CP (cayman-si). |
2397 | */ |
2397 | */ |
2398 | void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) |
2398 | void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
- | 2399 | unsigned vm_id, uint64_t pd_addr) |
|
2399 | { |
2400 | { |
2400 | struct radeon_ring *ring = &rdev->ring[ridx]; |
- | |
2401 | - | ||
2402 | if (vm == NULL) |
- | |
2403 | return; |
- | |
2404 | - | ||
2405 | radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2), 0)); |
2401 | radeon_ring_write(ring, PACKET0(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2), 0)); |
2406 | radeon_ring_write(ring, vm->pd_gpu_addr >> 12); |
2402 | radeon_ring_write(ring, pd_addr >> 12); |
Line 2407... | Line 2403... | ||
2407 | 2403 | ||
2408 | /* flush hdp cache */ |
2404 | /* flush hdp cache */ |
2409 | radeon_ring_write(ring, PACKET0(HDP_MEM_COHERENCY_FLUSH_CNTL, 0)); |
2405 | radeon_ring_write(ring, PACKET0(HDP_MEM_COHERENCY_FLUSH_CNTL, 0)); |
Line 2410... | Line 2406... | ||
2410 | radeon_ring_write(ring, 0x1); |
2406 | radeon_ring_write(ring, 0x1); |
2411 | 2407 | ||
2412 | /* bits 0-7 are the VM contexts0-7 */ |
2408 | /* bits 0-7 are the VM contexts0-7 */ |
Line 2413... | Line 2409... | ||
2413 | radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); |
2409 | radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); |
2414 | radeon_ring_write(ring, 1 << vm->id); |
2410 | radeon_ring_write(ring, 1 << vm_id); |
2415 | 2411 | ||
2416 | /* sync PFP to ME, otherwise we might get invalid PFP reads */ |
2412 | /* sync PFP to ME, otherwise we might get invalid PFP reads */ |