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Rev 2997 | Rev 3120 | ||
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Line 1042... | Line 1042... | ||
1042 | /* Set the write pointer delay */ |
1042 | /* Set the write pointer delay */ |
1043 | WREG32(CP_RB_WPTR_DELAY, 0); |
1043 | WREG32(CP_RB_WPTR_DELAY, 0); |
Line 1044... | Line 1044... | ||
1044 | 1044 | ||
Line 1045... | Line 1045... | ||
1045 | WREG32(CP_DEBUG, (1 << 27)); |
1045 | WREG32(CP_DEBUG, (1 << 27)); |
1046 | 1046 | ||
1047 | /* set the wb address wether it's enabled or not */ |
1047 | /* set the wb address whether it's enabled or not */ |
Line 1048... | Line 1048... | ||
1048 | WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); |
1048 | WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); |
1049 | WREG32(SCRATCH_UMSK, 0xff); |
1049 | WREG32(SCRATCH_UMSK, 0xff); |
Line 1059... | Line 1059... | ||
1059 | #ifdef __BIG_ENDIAN |
1059 | #ifdef __BIG_ENDIAN |
1060 | rb_cntl |= BUF_SWAP_32BIT; |
1060 | rb_cntl |= BUF_SWAP_32BIT; |
1061 | #endif |
1061 | #endif |
1062 | WREG32(cp_rb_cntl[i], rb_cntl); |
1062 | WREG32(cp_rb_cntl[i], rb_cntl); |
Line 1063... | Line 1063... | ||
1063 | 1063 | ||
1064 | /* set the wb address wether it's enabled or not */ |
1064 | /* set the wb address whether it's enabled or not */ |
1065 | addr = rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET; |
1065 | addr = rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET; |
1066 | WREG32(cp_rb_rptr_addr[i], addr & 0xFFFFFFFC); |
1066 | WREG32(cp_rb_rptr_addr[i], addr & 0xFFFFFFFC); |
1067 | WREG32(cp_rb_rptr_addr_hi[i], upper_32_bits(addr) & 0xFF); |
1067 | WREG32(cp_rb_rptr_addr_hi[i], upper_32_bits(addr) & 0xFF); |