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Rev 5078 Rev 5271
Line 33... Line 33...
33
 
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#define MAX(a,b)                   (((a)>(b))?(a):(b))
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#define MAX(a,b)                   (((a)>(b))?(a):(b))
Line 35... Line 35...
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#define MIN(a,b)                   (((a)<(b))?(a):(b))
35
#define MIN(a,b)                   (((a)<(b))?(a):(b))
36
 
36
 
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int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
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int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
38
			   struct radeon_cs_reloc **cs_reloc);
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			   struct radeon_bo_list **cs_reloc);
39
struct evergreen_cs_track {
39
struct evergreen_cs_track {
40
	u32			group_size;
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	u32			group_size;
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	u32			nbanks;
41
	u32			nbanks;
Line 1092... Line 1092...
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 * will test it against a list of register needind special handling.
1092
 * will test it against a list of register needind special handling.
1093
 */
1093
 */
1094
static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
1094
static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
1095
{
1095
{
1096
	struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track;
1096
	struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track;
1097
	struct radeon_cs_reloc *reloc;
1097
	struct radeon_bo_list *reloc;
1098
	u32 last_reg;
1098
	u32 last_reg;
1099
	u32 m, i, tmp, *ib;
1099
	u32 m, i, tmp, *ib;
1100
	int r;
1100
	int r;
Line 1101... Line 1101...
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Line 1790... Line 1790...
1790
}
1790
}
Line 1791... Line 1791...
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1791
 
1792
static int evergreen_packet3_check(struct radeon_cs_parser *p,
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static int evergreen_packet3_check(struct radeon_cs_parser *p,
1793
				   struct radeon_cs_packet *pkt)
1793
				   struct radeon_cs_packet *pkt)
1794
{
1794
{
1795
	struct radeon_cs_reloc *reloc;
1795
	struct radeon_bo_list *reloc;
1796
	struct evergreen_cs_track *track;
1796
	struct evergreen_cs_track *track;
1797
	volatile u32 *ib;
1797
	volatile u32 *ib;
1798
	unsigned idx;
1798
	unsigned idx;
1799
	unsigned i;
1799
	unsigned i;
Line 2659... Line 2659...
2659
		if (r) {
2659
		if (r) {
2660
			kfree(p->track);
2660
			kfree(p->track);
2661
			p->track = NULL;
2661
			p->track = NULL;
2662
			return r;
2662
			return r;
2663
		}
2663
		}
2664
	} while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
2664
	} while (p->idx < p->chunk_ib->length_dw);
2665
#if 0
2665
#if 0
2666
	for (r = 0; r < p->ib.length_dw; r++) {
2666
	for (r = 0; r < p->ib.length_dw; r++) {
2667
		printk(KERN_INFO "%05d  0x%08X\n", r, p->ib.ptr[r]);
2667
		printk(KERN_INFO "%05d  0x%08X\n", r, p->ib.ptr[r]);
2668
		mdelay(1);
2668
		mdelay(1);
2669
	}
2669
	}
Line 2682... Line 2682...
2682
 * checks for errors. (Evergreen-Cayman)
2682
 * checks for errors. (Evergreen-Cayman)
2683
 * Returns 0 for success and an error on failure.
2683
 * Returns 0 for success and an error on failure.
2684
 **/
2684
 **/
2685
int evergreen_dma_cs_parse(struct radeon_cs_parser *p)
2685
int evergreen_dma_cs_parse(struct radeon_cs_parser *p)
2686
{
2686
{
2687
	struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
2687
	struct radeon_cs_chunk *ib_chunk = p->chunk_ib;
2688
	struct radeon_cs_reloc *src_reloc, *dst_reloc, *dst2_reloc;
2688
	struct radeon_bo_list *src_reloc, *dst_reloc, *dst2_reloc;
2689
	u32 header, cmd, count, sub_cmd;
2689
	u32 header, cmd, count, sub_cmd;
2690
	volatile u32 *ib = p->ib.ptr;
2690
	volatile u32 *ib = p->ib.ptr;
2691
	u32 idx;
2691
	u32 idx;
2692
	u64 src_offset, dst_offset, dst2_offset;
2692
	u64 src_offset, dst_offset, dst2_offset;
2693
	int r;
2693
	int r;
Line 3098... Line 3098...
3098
			break;
3098
			break;
3099
		default:
3099
		default:
3100
			DRM_ERROR("Unknown packet type %d at %d !\n", cmd, idx);
3100
			DRM_ERROR("Unknown packet type %d at %d !\n", cmd, idx);
3101
			return -EINVAL;
3101
			return -EINVAL;
3102
		}
3102
		}
3103
	} while (p->idx < p->chunks[p->chunk_ib_idx].length_dw);
3103
	} while (p->idx < p->chunk_ib->length_dw);
3104
#if 0
3104
#if 0
3105
	for (r = 0; r < p->ib->length_dw; r++) {
3105
	for (r = 0; r < p->ib->length_dw; r++) {
3106
		printk(KERN_INFO "%05d  0x%08X\n", r, p->ib.ptr[r]);
3106
		printk(KERN_INFO "%05d  0x%08X\n", r, p->ib.ptr[r]);
3107
		mdelay(1);
3107
		mdelay(1);
3108
	}
3108
	}