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| Rev 1990 | Rev 2004 | ||
|---|---|---|---|
| Line 279... | Line 279... | ||
| 279 | default: |
279 | default: |
| 280 | break; |
280 | break; |
| 281 | } |
281 | } |
| 282 | } |
282 | } |
| Line 283... | Line -... | ||
| 283 | - | ||
| 284 | #if 0 |
283 | |
| 285 | void evergreen_hpd_init(struct radeon_device *rdev) |
284 | void evergreen_hpd_init(struct radeon_device *rdev) |
| 286 | { |
285 | { |
| 287 | struct drm_device *dev = rdev->ddev; |
286 | struct drm_device *dev = rdev->ddev; |
| 288 | struct drm_connector *connector; |
287 | struct drm_connector *connector; |
| Line 318... | Line 317... | ||
| 318 | break; |
317 | break; |
| 319 | default: |
318 | default: |
| 320 | break; |
319 | break; |
| 321 | } |
320 | } |
| 322 | } |
321 | } |
| 323 | if (rdev->irq.installed) |
322 | // if (rdev->irq.installed) |
| 324 | evergreen_irq_set(rdev); |
323 | // evergreen_irq_set(rdev); |
| 325 | } |
324 | } |
| Line -... | Line 325... | ||
| - | 325 | ||
| - | 326 | #if 0 |
|
| 326 | 327 | ||
| 327 | void evergreen_hpd_fini(struct radeon_device *rdev) |
328 | void evergreen_hpd_fini(struct radeon_device *rdev) |
| 328 | { |
329 | { |
| 329 | struct drm_device *dev = rdev->ddev; |
330 | struct drm_device *dev = rdev->ddev; |
| Line 2238... | Line 2239... | ||
| 2238 | u32 tmp; |
2239 | u32 tmp; |
| 2239 | int chansize, numchan; |
2240 | int chansize, numchan; |
| Line 2240... | Line 2241... | ||
| 2240 | 2241 | ||
| 2241 | /* Get VRAM informations */ |
2242 | /* Get VRAM informations */ |
| - | 2243 | rdev->mc.vram_is_ddr = true; |
|
| - | 2244 | if (rdev->flags & RADEON_IS_IGP) |
|
| - | 2245 | tmp = RREG32(FUS_MC_ARB_RAMCFG); |
|
| 2242 | rdev->mc.vram_is_ddr = true; |
2246 | else |
| 2243 | tmp = RREG32(MC_ARB_RAMCFG); |
2247 | tmp = RREG32(MC_ARB_RAMCFG); |
| 2244 | if (tmp & CHANSIZE_OVERRIDE) { |
2248 | if (tmp & CHANSIZE_OVERRIDE) { |
| 2245 | chansize = 16; |
2249 | chansize = 16; |
| 2246 | } else if (tmp & CHANSIZE_MASK) { |
2250 | } else if (tmp & CHANSIZE_MASK) { |