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Rev 6104 Rev 6661
Line 118... Line 118...
118 
			break;
 118 
			break;
119 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
 119 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
120 
		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
 120 
		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
121 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
 121 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
122 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
 122 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
- 
 
 123 
		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
123 
			if (dig->backlight_level == 0)
 124 
			if (dig->backlight_level == 0)
124 
				atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0);
 125 
				atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0);
125 
			else {
 126 
			else {
126 
				atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_BL_BRIGHTNESS_CONTROL, 0, 0);
 127 
				atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_BL_BRIGHTNESS_CONTROL, 0, 0);
127 
				atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
 128 
				atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
Line 308... Line 309...
308 
	/* hw bug */
 309 
	/* hw bug */
309 
	if ((mode->flags & DRM_MODE_FLAG_INTERLACE)
 310 
	if ((mode->flags & DRM_MODE_FLAG_INTERLACE)
310 
	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
 311 
	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
311 
		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
 312 
		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
Line -... Line 313...
- 
 
 313 
 
- 
 
 314 
	/* vertical FP must be at least 1 */
- 
 
 315 
	if (mode->crtc_vsync_start == mode->crtc_vdisplay)
- 
 
 316 
		adjusted_mode->crtc_vsync_start++;
312 
 
 317 
 
313 
	/* get the native mode for scaling */
 318 
	/* get the native mode for scaling */
314 
	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
 319 
	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
315 
		radeon_panel_mode_fixup(encoder, adjusted_mode);
 320 
		radeon_panel_mode_fixup(encoder, adjusted_mode);
316 
	} else if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
 321 
	} else if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
Line 890... Line 895...
890 
			else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock))
 895 
			else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock))
891 
				args.v1.ucLaneNum = 8;
 896 
				args.v1.ucLaneNum = 8;
892 
			else
 897 
			else
893 
				args.v1.ucLaneNum = 4;
 898 
				args.v1.ucLaneNum = 4;
Line 894... Line -...
894 
 
 - 
 
895 
			if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))
 - 
 
896 
				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
 899 
 
897 
			switch (radeon_encoder->encoder_id) {
 900 
			switch (radeon_encoder->encoder_id) {
898 
			case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
 901 
			case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
899 
				args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1;
 902 
				args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1;
900 
				break;
 903 
				break;
Line 908... Line 911...
908 
			}
 911 
			}
909 
			if (dig->linkb)
 912 
			if (dig->linkb)
910 
				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
 913 
				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
911 
			else
 914 
			else
912 
				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
 915 
				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
- 
 
 916 
 
- 
 
 917 
			if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))
- 
 
 918 
				args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
- 
 
 919 
 
913 
			break;
 920 
			break;
914 
		case 2:
 921 
		case 2:
915 
		case 3:
 922 
		case 3:
916 
			args.v3.ucAction = action;
 923 
			args.v3.ucAction = action;
917 
			args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
 924 
			args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);