Subversion Repositories Kolibri OS

Rev

Rev 1268 | Rev 1404 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 1268 Rev 1321
Line 239... Line 239...
239 
 
 239 
 
240 
void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
 240 
void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
241 
{
 241 
{
242 
	struct drm_device *dev = crtc->dev;
 242 
	struct drm_device *dev = crtc->dev;
- 
 
 243 
	struct radeon_device *rdev = dev->dev_private;
Line 243... Line 244...
243 
	struct radeon_device *rdev = dev->dev_private;
 244 
	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
244 
 
 245 
 
245 
	switch (mode) {
 246 
	switch (mode) {
246 
	case DRM_MODE_DPMS_ON:
 247 
	case DRM_MODE_DPMS_ON:
247 
		atombios_enable_crtc(crtc, 1);
 248 
		atombios_enable_crtc(crtc, 1);
248 
		if (ASIC_IS_DCE3(rdev))
 249 
		if (ASIC_IS_DCE3(rdev))
- 
 
 250 
			atombios_enable_crtc_memreq(crtc, 1);
249 
			atombios_enable_crtc_memreq(crtc, 1);
 251 
		atombios_blank_crtc(crtc, 0);
250 
		atombios_blank_crtc(crtc, 0);
 252 
		radeon_crtc_load_lut(crtc);
251 
		break;
 253 
		break;
252 
	case DRM_MODE_DPMS_STANDBY:
 254 
	case DRM_MODE_DPMS_STANDBY:
253 
	case DRM_MODE_DPMS_SUSPEND:
 255 
	case DRM_MODE_DPMS_SUSPEND:
254 
	case DRM_MODE_DPMS_OFF:
 256 
	case DRM_MODE_DPMS_OFF:
255 
		atombios_blank_crtc(crtc, 1);
 257 
		atombios_blank_crtc(crtc, 1);
256 
		if (ASIC_IS_DCE3(rdev))
 258 
		if (ASIC_IS_DCE3(rdev))
257 
			atombios_enable_crtc_memreq(crtc, 0);
 259 
			atombios_enable_crtc_memreq(crtc, 0);
258 
		atombios_enable_crtc(crtc, 0);
 260 
		atombios_enable_crtc(crtc, 0);
259 
		break;
 - 
 
260 
	}
 - 
 
261 
 
 - 
 
262 
	if (mode != DRM_MODE_DPMS_OFF) {
 - 
 
263 
         radeon_crtc_load_lut(crtc);
 261 
		break;
Line 264... Line 262...
264 
	}
 262 
	}
265 
}
 263 
}
266 
 
 264 
 
Line 455... Line 453...
455 
		if (encoder->crtc == crtc) {
 453 
		if (encoder->crtc == crtc) {
456 
			if (!ASIC_IS_AVIVO(rdev)) {
 454 
			if (!ASIC_IS_AVIVO(rdev)) {
457 
				if (encoder->encoder_type !=
 455 
				if (encoder->encoder_type !=
458 
				    DRM_MODE_ENCODER_DAC)
 456 
				    DRM_MODE_ENCODER_DAC)
459 
					pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
 457 
					pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
460 
				if (!ASIC_IS_AVIVO(rdev)
 - 
 
461 
				    && (encoder->encoder_type ==
 458 
				if (encoder->encoder_type ==
462 
					DRM_MODE_ENCODER_LVDS))
 459 
					DRM_MODE_ENCODER_LVDS)
463 
					pll_flags |= RADEON_PLL_USE_REF_DIV;
 460 
					pll_flags |= RADEON_PLL_USE_REF_DIV;
464 
			}
 461 
			}
465 
			radeon_encoder = to_radeon_encoder(encoder);
 462 
			radeon_encoder = to_radeon_encoder(encoder);
466 
			break;
 463 
			break;
467 
		}
 464 
		}
Line 498... Line 495...
498 
	if (radeon_crtc->crtc_id == 0)
 495 
	if (radeon_crtc->crtc_id == 0)
499 
		pll = &rdev->clock.p1pll;
 496 
		pll = &rdev->clock.p1pll;
500 
	else
 497 
	else
501 
		pll = &rdev->clock.p2pll;
 498 
		pll = &rdev->clock.p2pll;
Line -... Line 499...
- 
 
 499 
 
- 
 
 500 
	if (ASIC_IS_AVIVO(rdev)) {
- 
 
 501 
		if (radeon_new_pll)
- 
 
 502 
			radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock,
- 
 
 503 
						 &fb_div, &frac_fb_div,
- 
 
 504 
						 &ref_div, &post_div, pll_flags);
- 
 
 505 
		else
- 
 
 506 
			radeon_compute_pll(pll, adjusted_clock, &pll_clock,
- 
 
 507 
					   &fb_div, &frac_fb_div,
- 
 
 508 
					   &ref_div, &post_div, pll_flags);
502 
 
 509 
	} else
503 
	radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
 510 
	radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
Line 504... Line 511...
504 
			   &ref_div, &post_div, pll_flags);
 511 
			   &ref_div, &post_div, pll_flags);
505 
 
 512 
 
Line 574... Line 581...
574 
	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 581 
	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
575 
	struct drm_device *dev = crtc->dev;
 582 
	struct drm_device *dev = crtc->dev;
576 
	struct radeon_device *rdev = dev->dev_private;
 583 
	struct radeon_device *rdev = dev->dev_private;
577 
	struct radeon_framebuffer *radeon_fb;
 584 
	struct radeon_framebuffer *radeon_fb;
578 
	struct drm_gem_object *obj;
 585 
	struct drm_gem_object *obj;
579 
	struct drm_radeon_gem_object *obj_priv;
 586 
	struct radeon_bo *rbo;
580 
	uint64_t fb_location;
 587 
	uint64_t fb_location;
581 
	uint32_t fb_format, fb_pitch_pixels, tiling_flags;
 588 
	uint32_t fb_format, fb_pitch_pixels, tiling_flags;
- 
 
 589 
	int r;
Line -... Line 590...
- 
 
 590 
 
582 
 
 591 
	/* no fb bound */
- 
 
 592 
	if (!crtc->fb) {
583 
	if (!crtc->fb)
 593 
		DRM_DEBUG("No FB bound\n");
- 
 
 594 
		return 0;
Line 584... Line 595...
584 
		return -EINVAL;
 595 
	}
Line -... Line 596...
- 
 
 596 
 
585 
 
 597 
	radeon_fb = to_radeon_framebuffer(crtc->fb);
586 
	radeon_fb = to_radeon_framebuffer(crtc->fb);
 598 
 
Line 587... Line 599...
587 
 
 599 
	/* Pin framebuffer & get tilling informations */
588 
	obj = radeon_fb->obj;
 600 
	obj = radeon_fb->obj;
589 
	obj_priv = obj->driver_private;
 601 
	obj_priv = obj->driver_private;
Line 590... Line 602...
590 
 
 602 
 
- 
 
 603 
//	if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &fb_location)) {
Line 591... Line 604...
591 
//	if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &fb_location)) {
 604 
//		return -EINVAL;
592 
//		return -EINVAL;
 605 
//	}
593 
//	}
 606 
 
594 
 
 607 
    fb_location = rdev->mc.vram_location;
Line 620... Line 633...
620 
		DRM_ERROR("Unsupported screen depth %d\n",
 633 
		DRM_ERROR("Unsupported screen depth %d\n",
621 
			  crtc->fb->bits_per_pixel);
 634 
			  crtc->fb->bits_per_pixel);
622 
		return -EINVAL;
 635 
		return -EINVAL;
623 
	}
 636 
	}
Line 624... Line -...
624 
 
 - 
 
625 
//	radeon_object_get_tiling_flags(obj->driver_private,
 - 
 
626 
//				       &tiling_flags, NULL);
 637 
 
627 
//	if (tiling_flags & RADEON_TILING_MACRO)
 638 
	if (tiling_flags & RADEON_TILING_MACRO)
Line 628... Line 639...
628 
//		fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
 639 
		fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
629 
 
 640 
 
Line 630... Line 641...
630 
//	if (tiling_flags & RADEON_TILING_MICRO)
 641 
	if (tiling_flags & RADEON_TILING_MICRO)
631 
//		fb_format |= AVIVO_D1GRPH_TILED;
 642 
		fb_format |= AVIVO_D1GRPH_TILED;
632 
 
 643 
 
633 
	if (radeon_crtc->crtc_id == 0)
 644 
	if (radeon_crtc->crtc_id == 0)