Rev 2351 | Rev 4280 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 2351 | Rev 3031 | ||
|---|---|---|---|
| Line 675... | Line 675... | ||
| 675 | region->start = res->start; |
675 | region->start = res->start; |
| 676 | region->end = res->end; |
676 | region->end = res->end; |
| 677 | } |
677 | } |
| 678 | 678 | ||
| Line 679... | Line -... | ||
| 679 | static inline int pci_read_config_dword(struct pci_dev *dev, int where, |
- | |
| 680 | u32 *val) |
- | |
| 681 | { |
- | |
| 682 | *val = PciRead32(dev->busnr, dev->devfn, where); |
- | |
| 683 | return 1; |
- | |
| 684 | } |
- | |
| 685 | - | ||
| 686 | static inline int pci_write_config_dword(struct pci_dev *dev, int where, |
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| 687 | u32 val) |
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| 688 | { |
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| 689 | PciWrite32(dev->busnr, dev->devfn, where, val); |
- | |
| 690 | return 1; |
- | |
| 691 | } |
- | |
| Line 692... | Line 679... | ||
| 692 | 679 | ||
| 693 | int pci_enable_rom(struct pci_dev *pdev) |
680 | int pci_enable_rom(struct pci_dev *pdev) |
| 694 | { |
681 | { |
| 695 | struct resource *res = pdev->resource + PCI_ROM_RESOURCE; |
682 | struct resource *res = pdev->resource + PCI_ROM_RESOURCE; |
| Line 842... | Line 829... | ||
| 842 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW))) |
829 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW))) |
| 843 | pci_disable_rom(pdev); |
830 | pci_disable_rom(pdev); |
| 844 | } |
831 | } |
| 845 | 832 | ||
| Line -... | Line 833... | ||
| - | 833 | #if 0 |
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| - | 834 | void pcibios_set_master(struct pci_dev *dev) |
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| - | 835 | { |
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| - | 836 | u8 lat; |
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| - | 837 | ||
| - | 838 | /* The latency timer doesn't apply to PCIe (either Type 0 or Type 1) */ |
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| - | 839 | if (pci_is_pcie(dev)) |
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| - | 840 | return; |
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| - | 841 | ||
| - | 842 | pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); |
|
| - | 843 | if (lat < 16) |
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| - | 844 | lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; |
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| - | 845 | else if (lat > pcibios_max_latency) |
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| - | 846 | lat = pcibios_max_latency; |
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| - | 847 | else |
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| - | 848 | return; |
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| - | 849 | dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat); |
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| - | 850 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); |
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| - | 851 | } |
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| - | 852 | #endif |
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| - | 853 | ||
| - | 854 | ||
| - | 855 | static void __pci_set_master(struct pci_dev *dev, bool enable) |
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| - | 856 | { |
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| - | 857 | u16 old_cmd, cmd; |
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| - | 858 | ||
| - | 859 | pci_read_config_word(dev, PCI_COMMAND, &old_cmd); |
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| - | 860 | if (enable) |
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| - | 861 | cmd = old_cmd | PCI_COMMAND_MASTER; |
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| - | 862 | else |
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| - | 863 | cmd = old_cmd & ~PCI_COMMAND_MASTER; |
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| - | 864 | if (cmd != old_cmd) { |
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| - | 865 | dbgprintf("%s bus mastering\n", |
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| - | 866 | enable ? "enabling" : "disabling"); |
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| - | 867 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
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| - | 868 | } |
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| - | 869 | dev->is_busmaster = enable; |
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| - | 870 | } |
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| - | 871 | ||
| - | 872 | void pci_set_master(struct pci_dev *dev) |
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| - | 873 | { |
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| - | 874 | __pci_set_master(dev, true); |
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| - | 875 | // pcibios_set_master(dev); |
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| - | 876 | } |
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| - | 877 | ||
| - | 878 | ||
| - | 879 | ||