WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/intel_sprite.c

 		 */
 		BUG();
 		break;
+	}
+	/*
+	 * Enable gamma to match primary/cursor plane behaviour.
+	 * FIXME should be user controllable via propertiesa.
+	 */
+	sprctl |= SP_GAMMA_ENABLE;
 	if (obj->tiling_mode != I915_TILING_NONE)
 		sprctl |= SP_TILED;
 	else
 		I915_WRITE(SPLINOFF(pipe, plane), linear_offset);
 	I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w);
 	I915_WRITE(SPCNTR(pipe, plane), sprctl);
-	I915_MODIFY_DISPBASE(SPSURF(pipe, plane), i915_gem_obj_ggtt_offset(obj) +
+	I915_WRITE(SPSURF(pipe, plane), i915_gem_obj_ggtt_offset(obj) +
 			     sprsurf_offset);
 	POSTING_READ(SPSURF(pipe, plane));
+}
 	int plane = intel_plane->plane;
 	I915_WRITE(SPCNTR(pipe, plane), I915_READ(SPCNTR(pipe, plane)) &
 		   ~SP_ENABLE);
 	/* Activate double buffered register update */
-	I915_MODIFY_DISPBASE(SPSURF(pipe, plane), 0);
+	I915_WRITE(SPSURF(pipe, plane), 0);
 	POSTING_READ(SPSURF(pipe, plane));
 	struct intel_plane *intel_plane = to_intel_plane(plane);
 	int pipe = intel_plane->pipe;
 	u32 sprctl, sprscale = 0;
 	unsigned long sprsurf_offset, linear_offset;
 	int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
-	bool scaling_was_enabled = dev_priv->sprite_scaling_enabled;
 	sprctl = I915_READ(SPRCTL(pipe));
 		break;
 	default:
 		BUG();
+	}
+	/*
+	 * Enable gamma to match primary/cursor plane behaviour.
+	 * FIXME should be user controllable via propertiesa.
+	 */
+	sprctl |= SPRITE_GAMMA_ENABLE;
 	if (obj->tiling_mode != I915_TILING_NONE)
 		sprctl |= SPRITE_TILED;
-	if (IS_HASWELL(dev))
+	if (IS_HASWELL(dev) || IS_BROADWELL(dev))
 		sprctl &= ~SPRITE_TRICKLE_FEED_DISABLE;
 	else
 	sprctl |= SPRITE_TRICKLE_FEED_DISABLE;
 	sprctl |= SPRITE_ENABLE;
 	src_w--;
 	src_h--;
 	crtc_w--;
 	crtc_h--;
-	/*
-	 * IVB workaround: must disable low power watermarks for at least
-	 * one frame before enabling scaling.  LP watermarks can be re-enabled
-	 * when scaling is disabled.
-	 */
-	if (crtc_w != src_w || crtc_h != src_h) {
-		dev_priv->sprite_scaling_enabled |= 1 << pipe;
-		if (!scaling_was_enabled) {
-			intel_update_watermarks(dev);
-		intel_wait_for_vblank(dev, pipe);
 	if (crtc_w != src_w || crtc_h != src_h)
-		sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
-	} else
-		dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
+		sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
 	I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);
 						 pixel_size, fb->pitches[0]);
 	linear_offset -= sprsurf_offset;
 	/* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
 	 * register */
-	if (IS_HASWELL(dev))
+	if (IS_HASWELL(dev) || IS_BROADWELL(dev))
 		I915_WRITE(SPROFFSET(pipe), (y << 16) | x);
 	else if (obj->tiling_mode != I915_TILING_NONE)
 		I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x);
 	else
 		I915_WRITE(SPRLINOFF(pipe), linear_offset);
 	I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
 	if (intel_plane->can_scale)
 	I915_WRITE(SPRSCALE(pipe), sprscale);
 	I915_WRITE(SPRCTL(pipe), sprctl);
-	I915_MODIFY_DISPBASE(SPRSURF(pipe),
+	I915_WRITE(SPRSURF(pipe),
-			     i915_gem_obj_ggtt_offset(obj) + sprsurf_offset);
-	POSTING_READ(SPRSURF(pipe));
-	/* potentially re-enable LP watermarks */
-	if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
+			     i915_gem_obj_ggtt_offset(obj) + sprsurf_offset);
-		intel_update_watermarks(dev);
+	POSTING_READ(SPRSURF(pipe));
+}
 static void
 ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
+{
 	struct drm_device *dev = plane->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_plane *intel_plane = to_intel_plane(plane);
+	struct drm_i915_private *dev_priv = dev->dev_private;
-	int pipe = intel_plane->pipe;
+	struct intel_plane *intel_plane = to_intel_plane(plane);
-	bool scaling_was_enabled = dev_priv->sprite_scaling_enabled;
+	int pipe = intel_plane->pipe;
 	I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE);
 	/* Can't leave the scaler enabled... */
 	if (intel_plane->can_scale)
+	I915_WRITE(SPRSCALE(pipe), 0);
-	I915_WRITE(SPRSCALE(pipe), 0);
+	/* Activate double buffered register update */
+	I915_WRITE(SPRSURF(pipe), 0);
+	POSTING_READ(SPRSURF(pipe));
-	/* Activate double buffered register update */
+	/*
-	I915_MODIFY_DISPBASE(SPRSURF(pipe), 0);
-	POSTING_READ(SPRSURF(pipe));
-	dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
 	 * Avoid underruns when disabling the sprite.
-	intel_update_sprite_watermarks(plane, crtc, 0, 0, false, false);
+	 * FIXME remove once watermark updates are done properly.
 	 */
-	/* potentially re-enable LP watermarks */
+	intel_wait_for_vblank(dev, pipe);
 		break;
 	default:
 		BUG();
+	}
+	/*
+	 * Enable gamma to match primary/cursor plane behaviour.
+	 * FIXME should be user controllable via propertiesa.
+	 */
+	dvscntr |= DVS_GAMMA_ENABLE;
 	if (obj->tiling_mode != I915_TILING_NONE)
 		dvscntr |= DVS_TILED;
 	src_h--;
 	crtc_w--;
 	crtc_h--;
 	dvsscale = 0;
-	if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)
+	if (crtc_w != src_w || crtc_h != src_h)
 		dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
 		I915_WRITE(DVSLINOFF(pipe), linear_offset);
 	I915_WRITE(DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
 	I915_WRITE(DVSSCALE(pipe), dvsscale);
 	I915_WRITE(DVSCNTR(pipe), dvscntr);
-	I915_MODIFY_DISPBASE(DVSSURF(pipe),
+	I915_WRITE(DVSSURF(pipe),
 			     i915_gem_obj_ggtt_offset(obj) + dvssurf_offset);
 	POSTING_READ(DVSSURF(pipe));
+}
 	I915_WRITE(DVSCNTR(pipe), I915_READ(DVSCNTR(pipe)) & ~DVS_ENABLE);
 	/* Disable the scaler */
 	I915_WRITE(DVSSCALE(pipe), 0);
 	/* Flush double buffered register updates */
-	I915_MODIFY_DISPBASE(DVSSURF(pipe), 0);
+	I915_WRITE(DVSSURF(pipe), 0);
+	POSTING_READ(DVSSURF(pipe));
+	/*
+	 * Avoid underruns when disabling the sprite.
+	 * FIXME remove once watermark updates are done properly.
+	 */
-	POSTING_READ(DVSSURF(pipe));
+	intel_wait_for_vblank(dev, pipe);
 	intel_update_sprite_watermarks(plane, crtc, 0, 0, false, false);
+}
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int reg = DSPCNTR(intel_crtc->plane);
-	if (!intel_crtc->primary_disabled)
+	if (intel_crtc->primary_enabled)
 		return;
 	intel_crtc->primary_disabled = false;
+	intel_crtc->primary_enabled = true;
+	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
+	intel_flush_primary_plane(dev_priv, intel_crtc->plane);
+	/*
+	 * FIXME IPS should be fine as long as one plane is
+	 * enabled, but in practice it seems to have problems
+	 * when going from primary only to sprite only and vice
+	 * versa.
+	 */
+	if (intel_crtc->config.ips_enabled) {
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+		hsw_enable_ips(intel_crtc);
+	}
-	intel_update_fbc(dev);
+	mutex_lock(&dev->struct_mutex);
 	intel_update_fbc(dev);
-	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
+	mutex_unlock(&dev->struct_mutex);
+}
 static void
 intel_disable_primary(struct drm_crtc *crtc)
+{
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int reg = DSPCNTR(intel_crtc->plane);
+	if (!intel_crtc->primary_enabled)
+		return;
+	intel_crtc->primary_enabled = false;
+	mutex_lock(&dev->struct_mutex);
+	if (dev_priv->fbc.plane == intel_crtc->plane)
+		intel_disable_fbc(dev);
+	mutex_unlock(&dev->struct_mutex);
+	/*
+	 * FIXME IPS should be fine as long as one plane is
+	 * enabled, but in practice it seems to have problems
-	if (intel_crtc->primary_disabled)
+	 * when going from primary only to sprite only and vice
-		return;
+	 * versa.
 	 */
-	I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
+	hsw_disable_ips(intel_crtc);
 	default:
 		return false;
+	}
+}
+static bool colorkey_enabled(struct intel_plane *intel_plane)
+{
+	struct drm_intel_sprite_colorkey key;
+	intel_plane->get_colorkey(&intel_plane->base, &key);
+	return key.flags != I915_SET_COLORKEY_NONE;
+}
 static int
 intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 		   struct drm_framebuffer *fb, int crtc_x, int crtc_y,
 		   unsigned int crtc_w, unsigned int crtc_h,
 		   uint32_t src_x, uint32_t src_y,
 		   uint32_t src_w, uint32_t src_h)
+{
-	struct drm_device *dev = plane->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_device *dev = plane->dev;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct intel_plane *intel_plane = to_intel_plane(plane);
-	struct intel_framebuffer *intel_fb;
+	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
-	struct drm_i915_gem_object *obj, *old_obj;
+	struct drm_i915_gem_object *obj = intel_fb->obj;
-	int pipe = intel_plane->pipe;
-	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
-								      pipe);
+	struct drm_i915_gem_object *old_obj = intel_plane->obj;
-	int ret = 0;
+	int ret;
 	bool disable_primary = false;
 	bool visible;
 	int hscale, vscale;
 	int max_scale, min_scale;
 		.x2 = crtc_x + crtc_w,
 		.y1 = crtc_y,
 		.y2 = crtc_y + crtc_h,
 	};
 	const struct drm_rect clip = {
+		.x2 = intel_crtc->active ? intel_crtc->config.pipe_src_w : 0,
+		.y2 = intel_crtc->active ? intel_crtc->config.pipe_src_h : 0,
+	};
+	const struct {
-		.x2 = crtc->mode.hdisplay,
+		int crtc_x, crtc_y;
+		unsigned int crtc_w, crtc_h;
+		uint32_t src_x, src_y, src_w, src_h;
+	} orig = {
+		.crtc_x = crtc_x,
-		.y2 = crtc->mode.vdisplay,
+		.crtc_y = crtc_y,
+		.crtc_w = crtc_w,
+		.crtc_h = crtc_h,
+		.src_x = src_x,
+		.src_y = src_y,
+		.src_w = src_w,
+		.src_h = src_h,
 	};
-	intel_fb = to_intel_framebuffer(fb);
-	obj = intel_fb->obj;
-	old_obj = intel_plane->obj;
-	intel_plane->crtc_x = crtc_x;
-	intel_plane->crtc_y = crtc_y;
-	intel_plane->crtc_w = crtc_w;
-	intel_plane->crtc_h = crtc_h;
-	intel_plane->src_x = src_x;
-	intel_plane->src_y = src_y;
-	intel_plane->src_w = src_w;
-	intel_plane->src_h = src_h;
-	/* Pipe must be running... */
-	if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE)) {
-		DRM_DEBUG_KMS("Pipe disabled\n");
-		return -EINVAL;
-	}
 	/* Don't modify another pipe's plane */
 	if (intel_plane->pipe != intel_crtc->pipe) {
 		DRM_DEBUG_KMS("Wrong plane <-> crtc mapping\n");
 	/*
 	 * If the sprite is completely covering the primary plane,
 	 * we can disable the primary and save power.
 	 */
-	disable_primary = drm_rect_equals(&dst, &clip);
+	disable_primary = drm_rect_equals(&dst, &clip) && !colorkey_enabled(intel_plane);
-	WARN_ON(disable_primary && !visible);
+	WARN_ON(disable_primary && !visible && intel_crtc->active);
 	mutex_lock(&dev->struct_mutex);
 	/* Note that this will apply the VT-d workaround for scanouts,
 	 * which is more restrictive than required for sprites. (The
 	 * primary plane requires 256KiB alignment with 64 PTE padding,
+	 * the sprite planes only require 128KiB alignment and 32 PTE padding.
+	 */
+	ret = intel_pin_and_fence_fb_obj(dev, obj, NULL);
 	 * the sprite planes only require 128KiB alignment and 32 PTE padding.
-	 */
+	mutex_unlock(&dev->struct_mutex);
+	if (ret)
+		return ret;
+	intel_plane->crtc_x = orig.crtc_x;
+	intel_plane->crtc_y = orig.crtc_y;
+	intel_plane->crtc_w = orig.crtc_w;
+	intel_plane->crtc_h = orig.crtc_h;
-	ret = intel_pin_and_fence_fb_obj(dev, obj, NULL);
+	intel_plane->src_x = orig.src_x;
+	intel_plane->src_y = orig.src_y;
-	if (ret)
+	intel_plane->src_w = orig.src_w;
-		goto out_unlock;
+	intel_plane->src_h = orig.src_h;
 	intel_plane->obj = obj;
 	intel_plane->obj = obj;
 	if (intel_crtc->active) {
 	else
 		intel_plane->disable_plane(plane, crtc);
 	if (disable_primary)
+		intel_disable_primary(crtc);
 		intel_disable_primary(crtc);
 	/* Unpin old obj after new one is active to avoid ugliness */
 	if (old_obj) {
 		/*
 		 * It's fairly common to simply update the position of
 		 * an existing object.  In that case, we don't need to
 		 * wait for vblank to avoid ugliness, we only need to
 		 * do the pin & ref bookkeeping.
-		 */
-		if (old_obj != obj) {
+		 */
+		if (old_obj != obj && intel_crtc->active)
-			mutex_unlock(&dev->struct_mutex);
+			intel_wait_for_vblank(dev, intel_crtc->pipe);
-			intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
 			mutex_lock(&dev->struct_mutex);
+			mutex_lock(&dev->struct_mutex);
 		intel_unpin_fb_obj(old_obj);
-		intel_unpin_fb_obj(old_obj);
-	}
+		mutex_unlock(&dev->struct_mutex);
 out_unlock:
 	mutex_unlock(&dev->struct_mutex);
-	return ret;
+	return 0;
+}
 static int
 intel_disable_plane(struct drm_plane *plane)
+{
 	struct drm_device *dev = plane->dev;
 	struct intel_plane *intel_plane = to_intel_plane(plane);
-	int ret = 0;
+	struct intel_crtc *intel_crtc;
+	if (!plane->fb)
+		return 0;
-	if (!plane->fb)
+	if (WARN_ON(!plane->crtc))
+		return -EINVAL;
-		return 0;
+	intel_crtc = to_intel_crtc(plane->crtc);
-	if (WARN_ON(!plane->crtc))
 		return -EINVAL;
 	if (intel_crtc->active) {
 		intel_enable_primary(plane->crtc);
-	intel_plane->disable_plane(plane, plane->crtc);
 	intel_plane->disable_plane(plane, plane->crtc);
-	if (!intel_plane->obj)
+	}
+	if (intel_plane->obj) {
-		goto out;
+		if (intel_crtc->active)
 	intel_wait_for_vblank(dev, intel_plane->pipe);
 	intel_wait_for_vblank(dev, intel_plane->pipe);
 	mutex_lock(&dev->struct_mutex);
-	mutex_lock(&dev->struct_mutex);
+	intel_unpin_fb_obj(intel_plane->obj);
 	drm_modeset_lock_all(dev);
 	obj = drm_mode_object_find(dev, set->plane_id, DRM_MODE_OBJECT_PLANE);
 	if (!obj) {
-		ret = -EINVAL;
+		ret = -ENOENT;
 		goto out_unlock;
+	}
 	drm_modeset_lock_all(dev);
 	obj = drm_mode_object_find(dev, get->plane_id, DRM_MODE_OBJECT_PLANE);
 	if (!obj) {
-		ret = -EINVAL;
+		ret = -ENOENT;
 		goto out_unlock;
+	}
 	int ret;
 	if (INTEL_INFO(dev)->gen < 5)
 		return -ENODEV;
-	intel_plane = kzalloc(sizeof(struct intel_plane), GFP_KERNEL);
+	intel_plane = kzalloc(sizeof(*intel_plane), GFP_KERNEL);
 	if (!intel_plane)
 		return -ENOMEM;
 			num_plane_formats = ARRAY_SIZE(ilk_plane_formats);
+		}
 		break;
+	case 7:
-	case 7:
+	case 8:
 		if (IS_IVYBRIDGE(dev)) {
 			intel_plane->can_scale = true;
 			intel_plane->max_downscale = 2;
 		} else {

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/intel_sprite.c – Rev 4104 → 4560