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Line 28... | Line 28... | ||
28 | #include |
28 | #include |
29 | #include |
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | #include |
32 | #include |
32 | #include |
- | 33 | #include |
|
33 | #include |
34 | #include |
34 | #include |
35 | #include |
35 | #include "intel_drv.h" |
36 | #include "intel_drv.h" |
36 | #include |
37 | #include |
37 | #include "i915_drv.h" |
38 | #include "i915_drv.h" |
Line 50... | Line 51... | ||
50 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
51 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
51 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
52 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
52 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
53 | #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) |
Line 53... | Line 54... | ||
53 | 54 | ||
54 | 55 | ||
55 | static const char *tv_format_names[] = { |
56 | static const char * const tv_format_names[] = { |
56 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
57 | "NTSC_M" , "NTSC_J" , "NTSC_443", |
57 | "PAL_B" , "PAL_D" , "PAL_G" , |
58 | "PAL_B" , "PAL_D" , "PAL_G" , |
58 | "PAL_H" , "PAL_I" , "PAL_M" , |
59 | "PAL_H" , "PAL_I" , "PAL_M" , |
59 | "PAL_N" , "PAL_NC" , "PAL_60" , |
60 | "PAL_N" , "PAL_NC" , "PAL_60" , |
60 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
61 | "SECAM_B" , "SECAM_D" , "SECAM_G" , |
61 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
62 | "SECAM_K" , "SECAM_K1", "SECAM_L" , |
Line 62... | Line 63... | ||
62 | "SECAM_60" |
63 | "SECAM_60" |
Line 63... | Line 64... | ||
63 | }; |
64 | }; |
64 | 65 | ||
Line 65... | Line 66... | ||
65 | #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) |
66 | #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names) |
Line 104... | Line 105... | ||
104 | */ |
105 | */ |
105 | uint32_t color_range; |
106 | uint32_t color_range; |
106 | bool color_range_auto; |
107 | bool color_range_auto; |
Line 107... | Line 108... | ||
107 | 108 | ||
- | 109 | /** |
|
- | 110 | * HDMI user specified aspect ratio |
|
- | 111 | */ |
|
- | 112 | enum hdmi_picture_aspect aspect_ratio; |
|
- | 113 | ||
108 | /** |
114 | /** |
109 | * This is set if we're going to treat the device as TV-out. |
115 | * This is set if we're going to treat the device as TV-out. |
110 | * |
116 | * |
111 | * While we have these nice friendly flags for output types that ought |
117 | * While we have these nice friendly flags for output types that ought |
112 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
118 | * to decide this for us, the S-Video output on our HDMI+S-Video card |
Line 239... | Line 245... | ||
239 | u32 bval = val, cval = val; |
245 | u32 bval = val, cval = val; |
240 | int i; |
246 | int i; |
Line 241... | Line 247... | ||
241 | 247 | ||
242 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
248 | if (intel_sdvo->sdvo_reg == PCH_SDVOB) { |
243 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
249 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
- | 250 | POSTING_READ(intel_sdvo->sdvo_reg); |
|
- | 251 | /* |
|
- | 252 | * HW workaround, need to write this twice for issue |
|
- | 253 | * that may result in first write getting masked. |
|
- | 254 | */ |
|
- | 255 | if (HAS_PCH_IBX(dev)) { |
|
- | 256 | I915_WRITE(intel_sdvo->sdvo_reg, val); |
|
- | 257 | POSTING_READ(intel_sdvo->sdvo_reg); |
|
244 | I915_READ(intel_sdvo->sdvo_reg); |
258 | } |
245 | return; |
259 | return; |
Line 246... | Line 260... | ||
246 | } |
260 | } |
247 | 261 | ||
Line 256... | Line 270... | ||
256 | * The BIOS does this too. Yay, magic |
270 | * The BIOS does this too. Yay, magic |
257 | */ |
271 | */ |
258 | for (i = 0; i < 2; i++) |
272 | for (i = 0; i < 2; i++) |
259 | { |
273 | { |
260 | I915_WRITE(GEN3_SDVOB, bval); |
274 | I915_WRITE(GEN3_SDVOB, bval); |
261 | I915_READ(GEN3_SDVOB); |
275 | POSTING_READ(GEN3_SDVOB); |
262 | I915_WRITE(GEN3_SDVOC, cval); |
276 | I915_WRITE(GEN3_SDVOC, cval); |
263 | I915_READ(GEN3_SDVOC); |
277 | POSTING_READ(GEN3_SDVOC); |
264 | } |
278 | } |
265 | } |
279 | } |
Line 266... | Line 280... | ||
266 | 280 | ||
267 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
281 | static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) |
Line 441... | Line 455... | ||
441 | #undef BUF_LEN |
455 | #undef BUF_LEN |
Line 442... | Line 456... | ||
442 | 456 | ||
443 | DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); |
457 | DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); |
Line 444... | Line 458... | ||
444 | } |
458 | } |
445 | 459 | ||
446 | static const char *cmd_status_names[] = { |
460 | static const char * const cmd_status_names[] = { |
447 | "Power on", |
461 | "Power on", |
448 | "Success", |
462 | "Success", |
449 | "Not supported", |
463 | "Not supported", |
Line 592... | Line 606... | ||
592 | log_fail: |
606 | log_fail: |
593 | DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo)); |
607 | DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo)); |
594 | return false; |
608 | return false; |
595 | } |
609 | } |
Line 596... | Line 610... | ||
596 | 610 | ||
597 | static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) |
611 | static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode) |
598 | { |
612 | { |
599 | if (mode->clock >= 100000) |
613 | if (adjusted_mode->crtc_clock >= 100000) |
600 | return 1; |
614 | return 1; |
601 | else if (mode->clock >= 50000) |
615 | else if (adjusted_mode->crtc_clock >= 50000) |
602 | return 2; |
616 | return 2; |
603 | else |
617 | else |
604 | return 4; |
618 | return 4; |
Line 1005... | Line 1019... | ||
1005 | DRM_ERROR("couldn't fill AVI infoframe\n"); |
1019 | DRM_ERROR("couldn't fill AVI infoframe\n"); |
1006 | return false; |
1020 | return false; |
1007 | } |
1021 | } |
Line 1008... | Line 1022... | ||
1008 | 1022 | ||
1009 | if (intel_sdvo->rgb_quant_range_selectable) { |
1023 | if (intel_sdvo->rgb_quant_range_selectable) { |
1010 | if (intel_crtc->config.limited_color_range) |
1024 | if (intel_crtc->config->limited_color_range) |
1011 | frame.avi.quantization_range = |
1025 | frame.avi.quantization_range = |
1012 | HDMI_QUANTIZATION_RANGE_LIMITED; |
1026 | HDMI_QUANTIZATION_RANGE_LIMITED; |
1013 | else |
1027 | else |
1014 | frame.avi.quantization_range = |
1028 | frame.avi.quantization_range = |
Line 1083... | Line 1097... | ||
1083 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
1097 | intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; |
Line 1084... | Line 1098... | ||
1084 | 1098 | ||
1085 | return true; |
1099 | return true; |
Line 1086... | Line 1100... | ||
1086 | } |
1100 | } |
1087 | 1101 | ||
1088 | static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config) |
1102 | static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) |
1089 | { |
1103 | { |
Line 1090... | Line 1104... | ||
1090 | unsigned dotclock = pipe_config->port_clock; |
1104 | unsigned dotclock = pipe_config->port_clock; |
Line 1110... | Line 1124... | ||
1110 | 1124 | ||
1111 | pipe_config->clock_set = true; |
1125 | pipe_config->clock_set = true; |
Line 1112... | Line 1126... | ||
1112 | } |
1126 | } |
1113 | 1127 | ||
1114 | static bool intel_sdvo_compute_config(struct intel_encoder *encoder, |
1128 | static bool intel_sdvo_compute_config(struct intel_encoder *encoder, |
1115 | struct intel_crtc_config *pipe_config) |
1129 | struct intel_crtc_state *pipe_config) |
1116 | { |
1130 | { |
1117 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1131 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
Line 1118... | Line 1132... | ||
1118 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; |
1132 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
1119 | struct drm_display_mode *mode = &pipe_config->requested_mode; |
1133 | struct drm_display_mode *mode = &pipe_config->base.mode; |
Line 1120... | Line 1134... | ||
1120 | 1134 | ||
Line 1170... | Line 1184... | ||
1170 | 1184 | ||
1171 | /* Clock computation needs to happen after pixel multiplier. */ |
1185 | /* Clock computation needs to happen after pixel multiplier. */ |
1172 | if (intel_sdvo->is_tv) |
1186 | if (intel_sdvo->is_tv) |
Line -... | Line 1187... | ||
- | 1187 | i9xx_adjust_sdvo_tv_clock(pipe_config); |
|
- | 1188 | ||
- | 1189 | /* Set user selected PAR to incoming mode's member */ |
|
- | 1190 | if (intel_sdvo->is_hdmi) |
|
1173 | i9xx_adjust_sdvo_tv_clock(pipe_config); |
1191 | adjusted_mode->picture_aspect_ratio = intel_sdvo->aspect_ratio; |
1174 | 1192 | ||
Line 1175... | Line 1193... | ||
1175 | return true; |
1193 | return true; |
1176 | } |
1194 | } |
1177 | 1195 | ||
1178 | static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder) |
1196 | static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder) |
1179 | { |
1197 | { |
1180 | struct drm_device *dev = intel_encoder->base.dev; |
1198 | struct drm_device *dev = intel_encoder->base.dev; |
1181 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
1182 | struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc); |
1199 | struct drm_i915_private *dev_priv = dev->dev_private; |
1183 | struct drm_display_mode *adjusted_mode = |
1200 | struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc); |
1184 | &crtc->config.adjusted_mode; |
1201 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
1185 | struct drm_display_mode *mode = &crtc->config.requested_mode; |
1202 | struct drm_display_mode *mode = &crtc->config->base.mode; |
1186 | struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); |
1203 | struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); |
1187 | u32 sdvox; |
1204 | u32 sdvox; |
Line 1222... | Line 1239... | ||
1222 | 1239 | ||
1223 | /* Set the input timing to the screen. Assume always input 0. */ |
1240 | /* Set the input timing to the screen. Assume always input 0. */ |
1224 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
1241 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
Line 1225... | Line 1242... | ||
1225 | return; |
1242 | return; |
1226 | 1243 | ||
1227 | if (crtc->config.has_hdmi_sink) { |
1244 | if (crtc->config->has_hdmi_sink) { |
1228 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1245 | intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1229 | intel_sdvo_set_colorimetry(intel_sdvo, |
1246 | intel_sdvo_set_colorimetry(intel_sdvo, |
1230 | SDVO_COLORIMETRY_RGB256); |
1247 | SDVO_COLORIMETRY_RGB256); |
Line 1242... | Line 1259... | ||
1242 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1259 | input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; |
1243 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1260 | if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) |
1244 | DRM_INFO("Setting input timings on %s failed\n", |
1261 | DRM_INFO("Setting input timings on %s failed\n", |
1245 | SDVO_NAME(intel_sdvo)); |
1262 | SDVO_NAME(intel_sdvo)); |
Line 1246... | Line 1263... | ||
1246 | 1263 | ||
1247 | switch (crtc->config.pixel_multiplier) { |
1264 | switch (crtc->config->pixel_multiplier) { |
1248 | default: |
1265 | default: |
1249 | WARN(1, "unknown pixel mutlipler specified\n"); |
1266 | WARN(1, "unknown pixel multiplier specified\n"); |
1250 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1267 | case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; |
1251 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1268 | case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; |
1252 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1269 | case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; |
1253 | } |
1270 | } |
Line 1257... | Line 1274... | ||
1257 | /* Set the SDVO control regs. */ |
1274 | /* Set the SDVO control regs. */ |
1258 | if (INTEL_INFO(dev)->gen >= 4) { |
1275 | if (INTEL_INFO(dev)->gen >= 4) { |
1259 | /* The real mode polarity is set by the SDVO commands, using |
1276 | /* The real mode polarity is set by the SDVO commands, using |
1260 | * struct intel_sdvo_dtd. */ |
1277 | * struct intel_sdvo_dtd. */ |
1261 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1278 | sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; |
1262 | if (!HAS_PCH_SPLIT(dev) && crtc->config.limited_color_range) |
1279 | if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range) |
1263 | sdvox |= HDMI_COLOR_RANGE_16_235; |
1280 | sdvox |= HDMI_COLOR_RANGE_16_235; |
1264 | if (INTEL_INFO(dev)->gen < 5) |
1281 | if (INTEL_INFO(dev)->gen < 5) |
1265 | sdvox |= SDVO_BORDER_ENABLE; |
1282 | sdvox |= SDVO_BORDER_ENABLE; |
1266 | } else { |
1283 | } else { |
1267 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
1284 | sdvox = I915_READ(intel_sdvo->sdvo_reg); |
Line 1287... | Line 1304... | ||
1287 | if (INTEL_INFO(dev)->gen >= 4) { |
1304 | if (INTEL_INFO(dev)->gen >= 4) { |
1288 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1305 | /* done in crtc_mode_set as the dpll_md reg must be written early */ |
1289 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1306 | } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { |
1290 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1307 | /* done in crtc_mode_set as it lives inside the dpll register */ |
1291 | } else { |
1308 | } else { |
1292 | sdvox |= (crtc->config.pixel_multiplier - 1) |
1309 | sdvox |= (crtc->config->pixel_multiplier - 1) |
1293 | << SDVO_PORT_MULTIPLY_SHIFT; |
1310 | << SDVO_PORT_MULTIPLY_SHIFT; |
1294 | } |
1311 | } |
Line 1295... | Line 1312... | ||
1295 | 1312 | ||
1296 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
1313 | if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && |
Line 1336... | Line 1353... | ||
1336 | 1353 | ||
1337 | return true; |
1354 | return true; |
Line 1338... | Line 1355... | ||
1338 | } |
1355 | } |
1339 | 1356 | ||
1340 | static void intel_sdvo_get_config(struct intel_encoder *encoder, |
1357 | static void intel_sdvo_get_config(struct intel_encoder *encoder, |
1341 | struct intel_crtc_config *pipe_config) |
1358 | struct intel_crtc_state *pipe_config) |
1342 | { |
1359 | { |
1343 | struct drm_device *dev = encoder->base.dev; |
1360 | struct drm_device *dev = encoder->base.dev; |
1344 | struct drm_i915_private *dev_priv = dev->dev_private; |
1361 | struct drm_i915_private *dev_priv = dev->dev_private; |
Line 1368... | Line 1385... | ||
1368 | flags |= DRM_MODE_FLAG_PVSYNC; |
1385 | flags |= DRM_MODE_FLAG_PVSYNC; |
1369 | else |
1386 | else |
1370 | flags |= DRM_MODE_FLAG_NVSYNC; |
1387 | flags |= DRM_MODE_FLAG_NVSYNC; |
1371 | } |
1388 | } |
Line 1372... | Line 1389... | ||
1372 | 1389 | ||
Line 1373... | Line 1390... | ||
1373 | pipe_config->adjusted_mode.flags |= flags; |
1390 | pipe_config->base.adjusted_mode.flags |= flags; |
1374 | 1391 | ||
1375 | /* |
1392 | /* |
1376 | * pixel multiplier readout is tricky: Only on i915g/gm it is stored in |
1393 | * pixel multiplier readout is tricky: Only on i915g/gm it is stored in |
Line 1390... | Line 1407... | ||
1390 | dotclock /= pipe_config->pixel_multiplier; |
1407 | dotclock /= pipe_config->pixel_multiplier; |
Line 1391... | Line 1408... | ||
1391 | 1408 | ||
1392 | if (HAS_PCH_SPLIT(dev)) |
1409 | if (HAS_PCH_SPLIT(dev)) |
Line 1393... | Line 1410... | ||
1393 | ironlake_check_encoder_dotclock(pipe_config, dotclock); |
1410 | ironlake_check_encoder_dotclock(pipe_config, dotclock); |
Line 1394... | Line 1411... | ||
1394 | 1411 | ||
1395 | pipe_config->adjusted_mode.crtc_clock = dotclock; |
1412 | pipe_config->base.adjusted_mode.crtc_clock = dotclock; |
1396 | 1413 | ||
1397 | /* Cross check the port pixel multiplier with the sdvo encoder state. */ |
1414 | /* Cross check the port pixel multiplier with the sdvo encoder state. */ |
Line 1426... | Line 1443... | ||
1426 | 1443 | ||
1427 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1444 | static void intel_disable_sdvo(struct intel_encoder *encoder) |
1428 | { |
1445 | { |
1429 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
1446 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
- | 1447 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
|
1430 | struct intel_sdvo *intel_sdvo = to_sdvo(encoder); |
1448 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
Line 1431... | Line 1449... | ||
1431 | u32 temp; |
1449 | u32 temp; |
1432 | 1450 | ||
1433 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1451 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
1434 | if (0) |
1452 | if (0) |
Line 1435... | Line 1453... | ||
1435 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1453 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1436 | DRM_MODE_DPMS_OFF); |
- | |
1437 | - | ||
1438 | temp = I915_READ(intel_sdvo->sdvo_reg); |
- | |
1439 | if ((temp & SDVO_ENABLE) != 0) { |
- | |
1440 | /* HW workaround for IBX, we need to move the port to |
- | |
1441 | * transcoder A before disabling it. */ |
- | |
Line 1442... | Line -... | ||
1442 | if (HAS_PCH_IBX(encoder->base.dev)) { |
- | |
1443 | struct drm_crtc *crtc = encoder->base.crtc; |
1454 | DRM_MODE_DPMS_OFF); |
1444 | int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; |
1455 | |
1445 | - | ||
Line -... | Line 1456... | ||
- | 1456 | temp = I915_READ(intel_sdvo->sdvo_reg); |
|
1446 | if (temp & SDVO_PIPE_B_SELECT) { |
1457 | |
- | 1458 | temp &= ~SDVO_ENABLE; |
|
- | 1459 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
|
- | 1460 | ||
1447 | temp &= ~SDVO_PIPE_B_SELECT; |
1461 | /* |
- | 1462 | * HW workaround for IBX, we need to move the port |
|
- | 1463 | * to transcoder A after disabling it to allow the |
|
1448 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
1464 | * matching DP port to be enabled on transcoder A. |
Line 1449... | Line -... | ||
1449 | POSTING_READ(intel_sdvo->sdvo_reg); |
- | |
1450 | 1465 | */ |
|
1451 | /* Again we need to write this twice. */ |
- | |
1452 | I915_WRITE(intel_sdvo->sdvo_reg, temp); |
1466 | if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { |
1453 | POSTING_READ(intel_sdvo->sdvo_reg); |
- | |
1454 | - | ||
1455 | /* Transcoder selection bits only update |
1467 | temp &= ~SDVO_PIPE_B_SELECT; |
1456 | * effectively on vblank. */ |
1468 | temp |= SDVO_ENABLE; |
Line 1457... | Line 1469... | ||
1457 | if (crtc) |
1469 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
- | 1470 | ||
1458 | intel_wait_for_vblank(encoder->base.dev, pipe); |
1471 | temp &= ~SDVO_ENABLE; |
- | 1472 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
|
- | 1473 | } |
|
- | 1474 | } |
|
- | 1475 | ||
1459 | else |
1476 | static void pch_disable_sdvo(struct intel_encoder *encoder) |
Line 1460... | Line 1477... | ||
1460 | msleep(50); |
1477 | { |
1461 | } |
1478 | } |
1462 | } |
1479 | |
Line 1475... | Line 1492... | ||
1475 | bool input1, input2; |
1492 | bool input1, input2; |
1476 | int i; |
1493 | int i; |
1477 | bool success; |
1494 | bool success; |
Line 1478... | Line 1495... | ||
1478 | 1495 | ||
1479 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1496 | temp = I915_READ(intel_sdvo->sdvo_reg); |
1480 | if ((temp & SDVO_ENABLE) == 0) { |
- | |
1481 | /* HW workaround for IBX, we need to move the port |
- | |
1482 | * to transcoder A before disabling it, so restore it here. */ |
- | |
1483 | if (HAS_PCH_IBX(dev)) |
1497 | temp |= SDVO_ENABLE; |
Line 1484... | Line -... | ||
1484 | temp |= SDVO_PIPE_SEL(intel_crtc->pipe); |
- | |
1485 | - | ||
1486 | intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); |
1498 | intel_sdvo_write_sdvox(intel_sdvo, temp); |
1487 | } |
1499 | |
Line 1488... | Line 1500... | ||
1488 | for (i = 0; i < 2; i++) |
1500 | for (i = 0; i < 2; i++) |
1489 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
1501 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
Line 1502... | Line 1514... | ||
1502 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1514 | intel_sdvo_set_encoder_power_state(intel_sdvo, |
1503 | DRM_MODE_DPMS_ON); |
1515 | DRM_MODE_DPMS_ON); |
1504 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1516 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
1505 | } |
1517 | } |
Line 1506... | Line -... | ||
1506 | - | ||
1507 | /* Special dpms function to support cloning between dvo/sdvo/crt. */ |
- | |
1508 | static void intel_sdvo_dpms(struct drm_connector *connector, int mode) |
- | |
1509 | { |
- | |
1510 | struct drm_crtc *crtc; |
- | |
1511 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); |
- | |
1512 | - | ||
1513 | /* dvo supports only 2 dpms states. */ |
- | |
1514 | if (mode != DRM_MODE_DPMS_ON) |
- | |
1515 | mode = DRM_MODE_DPMS_OFF; |
- | |
1516 | - | ||
1517 | if (mode == connector->dpms) |
- | |
1518 | return; |
- | |
1519 | - | ||
1520 | connector->dpms = mode; |
- | |
1521 | - | ||
1522 | /* Only need to change hw state when actually enabled */ |
- | |
1523 | crtc = intel_sdvo->base.base.crtc; |
- | |
1524 | if (!crtc) { |
- | |
1525 | intel_sdvo->base.connectors_active = false; |
- | |
1526 | return; |
- | |
1527 | } |
- | |
1528 | - | ||
1529 | /* We set active outputs manually below in case pipe dpms doesn't change |
- | |
1530 | * due to cloning. */ |
- | |
1531 | if (mode != DRM_MODE_DPMS_ON) { |
- | |
1532 | intel_sdvo_set_active_outputs(intel_sdvo, 0); |
- | |
1533 | if (0) |
- | |
1534 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
- | |
1535 | - | ||
1536 | intel_sdvo->base.connectors_active = false; |
- | |
1537 | - | ||
1538 | intel_crtc_update_dpms(crtc); |
- | |
1539 | } else { |
- | |
1540 | intel_sdvo->base.connectors_active = true; |
- | |
1541 | - | ||
1542 | intel_crtc_update_dpms(crtc); |
- | |
1543 | - | ||
1544 | if (0) |
- | |
1545 | intel_sdvo_set_encoder_power_state(intel_sdvo, mode); |
- | |
1546 | intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); |
- | |
1547 | } |
- | |
1548 | - | ||
1549 | intel_modeset_check_state(connector->dev); |
- | |
1550 | } |
- | |
1551 | 1518 | ||
1552 | static enum drm_mode_status |
1519 | static enum drm_mode_status |
1553 | intel_sdvo_mode_valid(struct drm_connector *connector, |
1520 | intel_sdvo_mode_valid(struct drm_connector *connector, |
1554 | struct drm_display_mode *mode) |
1521 | struct drm_display_mode *mode) |
1555 | { |
1522 | { |
Line 1615... | Line 1582... | ||
1615 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1582 | static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) |
1616 | { |
1583 | { |
1617 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1584 | struct drm_device *dev = intel_sdvo->base.base.dev; |
1618 | uint16_t hotplug; |
1585 | uint16_t hotplug; |
Line -... | Line 1586... | ||
- | 1586 | ||
- | 1587 | if (!I915_HAS_HOTPLUG(dev)) |
|
- | 1588 | return 0; |
|
1619 | 1589 | ||
1620 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1590 | /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise |
1621 | * on the line. */ |
1591 | * on the line. */ |
1622 | if (IS_I945G(dev) || IS_I945GM(dev)) |
1592 | if (IS_I945G(dev) || IS_I945GM(dev)) |
Line 2080... | Line 2050... | ||
2080 | return 0; |
2050 | return 0; |
Line 2081... | Line 2051... | ||
2081 | 2051 | ||
2082 | goto done; |
2052 | goto done; |
Line -... | Line 2053... | ||
- | 2053 | } |
|
- | 2054 | ||
- | 2055 | if (property == connector->dev->mode_config.aspect_ratio_property) { |
|
- | 2056 | switch (val) { |
|
- | 2057 | case DRM_MODE_PICTURE_ASPECT_NONE: |
|
- | 2058 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE; |
|
- | 2059 | break; |
|
- | 2060 | case DRM_MODE_PICTURE_ASPECT_4_3: |
|
- | 2061 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_4_3; |
|
- | 2062 | break; |
|
- | 2063 | case DRM_MODE_PICTURE_ASPECT_16_9: |
|
- | 2064 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_16_9; |
|
- | 2065 | break; |
|
- | 2066 | default: |
|
- | 2067 | return -EINVAL; |
|
- | 2068 | } |
|
- | 2069 | goto done; |
|
2083 | } |
2070 | } |
2084 | 2071 | ||
2085 | #define CHECK_PROPERTY(name, NAME) \ |
2072 | #define CHECK_PROPERTY(name, NAME) \ |
2086 | if (intel_sdvo_connector->name == property) { \ |
2073 | if (intel_sdvo_connector->name == property) { \ |
2087 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
2074 | if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ |
Line 2181... | Line 2168... | ||
2181 | return 0; |
2168 | return 0; |
2182 | #undef CHECK_PROPERTY |
2169 | #undef CHECK_PROPERTY |
2183 | } |
2170 | } |
Line 2184... | Line 2171... | ||
2184 | 2171 | ||
2185 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
2172 | static const struct drm_connector_funcs intel_sdvo_connector_funcs = { |
2186 | .dpms = intel_sdvo_dpms, |
2173 | .dpms = drm_atomic_helper_connector_dpms, |
2187 | .detect = intel_sdvo_detect, |
2174 | .detect = intel_sdvo_detect, |
2188 | .fill_modes = drm_helper_probe_single_connector_modes, |
2175 | .fill_modes = drm_helper_probe_single_connector_modes, |
- | 2176 | .set_property = intel_sdvo_set_property, |
|
2189 | .set_property = intel_sdvo_set_property, |
2177 | .atomic_get_property = intel_connector_atomic_get_property, |
- | 2178 | .destroy = intel_sdvo_destroy, |
|
- | 2179 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
|
2190 | .destroy = intel_sdvo_destroy, |
2180 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
Line 2191... | Line 2181... | ||
2191 | }; |
2181 | }; |
2192 | 2182 | ||
2193 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
2183 | static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { |
Line 2255... | Line 2245... | ||
2255 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2245 | * DDC bus number assignment is in a priority order of RGB outputs, then TMDS |
2256 | * outputs, then LVDS outputs. |
2246 | * outputs, then LVDS outputs. |
2257 | */ |
2247 | */ |
2258 | static void |
2248 | static void |
2259 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2249 | intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, |
2260 | struct intel_sdvo *sdvo, u32 reg) |
2250 | struct intel_sdvo *sdvo) |
2261 | { |
2251 | { |
2262 | struct sdvo_device_mapping *mapping; |
2252 | struct sdvo_device_mapping *mapping; |
Line 2263... | Line 2253... | ||
2263 | 2253 | ||
2264 | if (sdvo->is_sdvob) |
2254 | if (sdvo->is_sdvob) |
Line 2272... | Line 2262... | ||
2272 | intel_sdvo_guess_ddc_bus(sdvo); |
2262 | intel_sdvo_guess_ddc_bus(sdvo); |
2273 | } |
2263 | } |
Line 2274... | Line 2264... | ||
2274 | 2264 | ||
2275 | static void |
2265 | static void |
2276 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2266 | intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, |
2277 | struct intel_sdvo *sdvo, u32 reg) |
2267 | struct intel_sdvo *sdvo) |
2278 | { |
2268 | { |
2279 | struct sdvo_device_mapping *mapping; |
2269 | struct sdvo_device_mapping *mapping; |
Line 2280... | Line 2270... | ||
2280 | u8 pin; |
2270 | u8 pin; |
2281 | 2271 | ||
2282 | if (sdvo->is_sdvob) |
2272 | if (sdvo->is_sdvob) |
2283 | mapping = &dev_priv->sdvo_mappings[0]; |
2273 | mapping = &dev_priv->sdvo_mappings[0]; |
Line -... | Line 2274... | ||
- | 2274 | else |
|
2284 | else |
2275 | mapping = &dev_priv->sdvo_mappings[1]; |
2285 | mapping = &dev_priv->sdvo_mappings[1]; |
2276 | |
2286 | 2277 | if (mapping->initialized && |
|
2287 | if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) |
2278 | intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) |
Line 2288... | Line 2279... | ||
2288 | pin = mapping->i2c_pin; |
2279 | pin = mapping->i2c_pin; |
Line 2289... | Line 2280... | ||
2289 | else |
2280 | else |
2290 | pin = GMBUS_PORT_DPB; |
2281 | pin = GMBUS_PIN_DPB; |
Line 2407... | Line 2398... | ||
2407 | intel_attach_force_audio_property(&connector->base.base); |
2398 | intel_attach_force_audio_property(&connector->base.base); |
2408 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { |
2399 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { |
2409 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2400 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2410 | intel_sdvo->color_range_auto = true; |
2401 | intel_sdvo->color_range_auto = true; |
2411 | } |
2402 | } |
- | 2403 | intel_attach_aspect_ratio_property(&connector->base.base); |
|
- | 2404 | intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE; |
|
- | 2405 | } |
|
- | 2406 | ||
- | 2407 | static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void) |
|
- | 2408 | { |
|
- | 2409 | struct intel_sdvo_connector *sdvo_connector; |
|
- | 2410 | ||
- | 2411 | sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL); |
|
- | 2412 | if (!sdvo_connector) |
|
- | 2413 | return NULL; |
|
- | 2414 | ||
- | 2415 | if (intel_connector_init(&sdvo_connector->base) < 0) { |
|
- | 2416 | kfree(sdvo_connector); |
|
- | 2417 | return NULL; |
|
- | 2418 | } |
|
- | 2419 | ||
- | 2420 | return sdvo_connector; |
|
2412 | } |
2421 | } |
Line 2413... | Line 2422... | ||
2413 | 2422 | ||
2414 | static bool |
2423 | static bool |
2415 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
2424 | intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) |
Line 2420... | Line 2429... | ||
2420 | struct intel_connector *intel_connector; |
2429 | struct intel_connector *intel_connector; |
2421 | struct intel_sdvo_connector *intel_sdvo_connector; |
2430 | struct intel_sdvo_connector *intel_sdvo_connector; |
Line 2422... | Line 2431... | ||
2422 | 2431 | ||
Line 2423... | Line 2432... | ||
2423 | DRM_DEBUG_KMS("initialising DVI device %d\n", device); |
2432 | DRM_DEBUG_KMS("initialising DVI device %d\n", device); |
2424 | 2433 | ||
2425 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2434 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
Line 2426... | Line 2435... | ||
2426 | if (!intel_sdvo_connector) |
2435 | if (!intel_sdvo_connector) |
2427 | return false; |
2436 | return false; |
Line 2474... | Line 2483... | ||
2474 | struct intel_connector *intel_connector; |
2483 | struct intel_connector *intel_connector; |
2475 | struct intel_sdvo_connector *intel_sdvo_connector; |
2484 | struct intel_sdvo_connector *intel_sdvo_connector; |
Line 2476... | Line 2485... | ||
2476 | 2485 | ||
Line 2477... | Line 2486... | ||
2477 | DRM_DEBUG_KMS("initialising TV type %d\n", type); |
2486 | DRM_DEBUG_KMS("initialising TV type %d\n", type); |
2478 | 2487 | ||
2479 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2488 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
Line 2480... | Line 2489... | ||
2480 | if (!intel_sdvo_connector) |
2489 | if (!intel_sdvo_connector) |
2481 | return false; |
2490 | return false; |
Line 2517... | Line 2526... | ||
2517 | struct intel_connector *intel_connector; |
2526 | struct intel_connector *intel_connector; |
2518 | struct intel_sdvo_connector *intel_sdvo_connector; |
2527 | struct intel_sdvo_connector *intel_sdvo_connector; |
Line 2519... | Line 2528... | ||
2519 | 2528 | ||
Line 2520... | Line 2529... | ||
2520 | DRM_DEBUG_KMS("initialising analog device %d\n", device); |
2529 | DRM_DEBUG_KMS("initialising analog device %d\n", device); |
2521 | 2530 | ||
2522 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2531 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
Line 2523... | Line 2532... | ||
2523 | if (!intel_sdvo_connector) |
2532 | if (!intel_sdvo_connector) |
2524 | return false; |
2533 | return false; |
Line 2553... | Line 2562... | ||
2553 | struct intel_connector *intel_connector; |
2562 | struct intel_connector *intel_connector; |
2554 | struct intel_sdvo_connector *intel_sdvo_connector; |
2563 | struct intel_sdvo_connector *intel_sdvo_connector; |
Line 2555... | Line 2564... | ||
2555 | 2564 | ||
Line 2556... | Line 2565... | ||
2556 | DRM_DEBUG_KMS("initialising LVDS device %d\n", device); |
2565 | DRM_DEBUG_KMS("initialising LVDS device %d\n", device); |
2557 | 2566 | ||
2558 | intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); |
2567 | intel_sdvo_connector = intel_sdvo_connector_alloc(); |
Line 2559... | Line 2568... | ||
2559 | if (!intel_sdvo_connector) |
2568 | if (!intel_sdvo_connector) |
2560 | return false; |
2569 | return false; |
Line 2933... | Line 2942... | ||
2933 | return false; |
2942 | return false; |
Line 2934... | Line 2943... | ||
2934 | 2943 | ||
2935 | intel_sdvo->sdvo_reg = sdvo_reg; |
2944 | intel_sdvo->sdvo_reg = sdvo_reg; |
2936 | intel_sdvo->is_sdvob = is_sdvob; |
2945 | intel_sdvo->is_sdvob = is_sdvob; |
2937 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2946 | intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; |
2938 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); |
2947 | intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo); |
2939 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) |
2948 | if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) |
Line 2940... | Line 2949... | ||
2940 | goto err_i2c_bus; |
2949 | goto err_i2c_bus; |
2941 | 2950 | ||
Line 2954... | Line 2963... | ||
2954 | goto err; |
2963 | goto err; |
2955 | } |
2964 | } |
2956 | } |
2965 | } |
Line 2957... | Line 2966... | ||
2957 | 2966 | ||
- | 2967 | intel_encoder->compute_config = intel_sdvo_compute_config; |
|
- | 2968 | if (HAS_PCH_SPLIT(dev)) { |
|
- | 2969 | intel_encoder->disable = pch_disable_sdvo; |
|
- | 2970 | intel_encoder->post_disable = pch_post_disable_sdvo; |
|
2958 | intel_encoder->compute_config = intel_sdvo_compute_config; |
2971 | } else { |
- | 2972 | intel_encoder->disable = intel_disable_sdvo; |
|
2959 | intel_encoder->disable = intel_disable_sdvo; |
2973 | } |
2960 | intel_encoder->pre_enable = intel_sdvo_pre_enable; |
2974 | intel_encoder->pre_enable = intel_sdvo_pre_enable; |
2961 | intel_encoder->enable = intel_enable_sdvo; |
2975 | intel_encoder->enable = intel_enable_sdvo; |
2962 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
2976 | intel_encoder->get_hw_state = intel_sdvo_get_hw_state; |
Line 2990... | Line 3004... | ||
2990 | * simplistic anyway to express such constraints, so just give up on |
3004 | * simplistic anyway to express such constraints, so just give up on |
2991 | * cloning for SDVO encoders. |
3005 | * cloning for SDVO encoders. |
2992 | */ |
3006 | */ |
2993 | intel_sdvo->base.cloneable = 0; |
3007 | intel_sdvo->base.cloneable = 0; |
Line 2994... | Line 3008... | ||
2994 | 3008 | ||
Line 2995... | Line 3009... | ||
2995 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
3009 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo); |
2996 | 3010 | ||
2997 | /* Set the input timing to the screen. Assume always input 0. */ |
3011 | /* Set the input timing to the screen. Assume always input 0. */ |