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#ifndef _INTEL_RINGBUFFER_H_
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#ifndef _INTEL_RINGBUFFER_H_
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#define _INTEL_RINGBUFFER_H_
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#define _INTEL_RINGBUFFER_H_
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/*
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 * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use"
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 * Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use"
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 * Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring Buffer Use"
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 *
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 * "If the Ring Buffer Head Pointer and the Tail Pointer are on the same
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 * cacheline, the Head Pointer must not be greater than the Tail
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 * Pointer."
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 */
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#define I915_RING_FREE_SPACE 64
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struct  intel_hw_status_page {
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struct  intel_hw_status_page {
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	u32		*page_addr;
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	u32		*page_addr;
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	unsigned int	gfx_addr;
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	unsigned int	gfx_addr;
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	struct		drm_i915_gem_object *obj;
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	struct		drm_i915_gem_object *obj;
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	void		(*write_tail)(struct intel_ring_buffer *ring,
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	void		(*write_tail)(struct intel_ring_buffer *ring,
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				      u32 value);
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				      u32 value);
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	int __must_check (*flush)(struct intel_ring_buffer *ring,
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	int __must_check (*flush)(struct intel_ring_buffer *ring,
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				  u32	invalidate_domains,
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				  u32	invalidate_domains,
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				  u32	flush_domains);
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				  u32	flush_domains);
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	int		(*add_request)(struct intel_ring_buffer *ring,
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	int		(*add_request)(struct intel_ring_buffer *ring);
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				       u32 *seqno);
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	/* Some chipsets are not quite as coherent as advertised and need
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	/* Some chipsets are not quite as coherent as advertised and need
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	 * an expensive kick to force a true read of the up-to-date seqno.
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	 * an expensive kick to force a true read of the up-to-date seqno.
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	 * However, the up-to-date seqno is not always required and the last
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	 * However, the up-to-date seqno is not always required and the last
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	 * seen value is good enough. Note that the seqno will always be
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	 * seen value is good enough. Note that the seqno will always be
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	 * monotonic, even if not coherent.
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	 * monotonic, even if not coherent.
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	 */
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	 */
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	u32		(*get_seqno)(struct intel_ring_buffer *ring,
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	u32		(*get_seqno)(struct intel_ring_buffer *ring,
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				     bool lazy_coherency);
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				     bool lazy_coherency);
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	int		(*dispatch_execbuffer)(struct intel_ring_buffer *ring,
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	int		(*dispatch_execbuffer)(struct intel_ring_buffer *ring,
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					       u32 offset, u32 length);
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					       u32 offset, u32 length,
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					       unsigned flags);
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#define I915_DISPATCH_SECURE 0x1
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#define I915_DISPATCH_PINNED 0x2
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	void		(*cleanup)(struct intel_ring_buffer *ring);
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	void		(*cleanup)(struct intel_ring_buffer *ring);
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	int		(*sync_to)(struct intel_ring_buffer *ring,
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	int		(*sync_to)(struct intel_ring_buffer *ring,
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				   struct intel_ring_buffer *to,
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				   struct intel_ring_buffer *to,
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				   u32 seqno);
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				   u32 seqno);
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 * 0x1f: Last written status offset. (GM45)
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 * 0x1f: Last written status offset. (GM45)
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 *
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 *
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 * The area from dword 0x20 to 0x3ff is available for driver usage.
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 * The area from dword 0x20 to 0x3ff is available for driver usage.
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 */
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 */
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#define I915_GEM_HWS_INDEX		0x20
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#define I915_GEM_HWS_INDEX		0x20
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#define I915_GEM_HWS_SCRATCH_INDEX	0x30
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#define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << MI_STORE_DWORD_INDEX_SHIFT)
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void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);
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int __must_check intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n);
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static inline int intel_wait_ring_idle(struct intel_ring_buffer *ring)
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{
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	return intel_wait_ring_buffer(ring, ring->size - 8);
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}
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void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);
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int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n);
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int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n);
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static inline void intel_ring_emit(struct intel_ring_buffer *ring,
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static inline void intel_ring_emit(struct intel_ring_buffer *ring,
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				   u32 data)
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				   u32 data)
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{
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{
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	iowrite32(data, ring->virtual_start + ring->tail);
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	iowrite32(data, ring->virtual_start + ring->tail);
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	ring->tail += 4;
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}
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	ring->tail += 4;
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}
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void intel_ring_advance(struct intel_ring_buffer *ring);
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void intel_ring_advance(struct intel_ring_buffer *ring);
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int __must_check intel_ring_idle(struct intel_ring_buffer *ring);
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u32 intel_ring_get_seqno(struct intel_ring_buffer *ring);
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int intel_ring_flush_all_caches(struct intel_ring_buffer *ring);
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int intel_ring_flush_all_caches(struct intel_ring_buffer *ring);
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static inline u32 intel_ring_get_tail(struct intel_ring_buffer *ring)
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static inline u32 intel_ring_get_tail(struct intel_ring_buffer *ring)
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{
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{
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	return ring->tail;
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	return ring->tail;
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}
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}
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static inline u32 intel_ring_get_seqno(struct intel_ring_buffer *ring)
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{
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	BUG_ON(ring->outstanding_lazy_request == 0);
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	return ring->outstanding_lazy_request;
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}
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static inline void i915_trace_irq_get(struct intel_ring_buffer *ring, u32 seqno)
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static inline void i915_trace_irq_get(struct intel_ring_buffer *ring, u32 seqno)
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{
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{
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	if (ring->trace_irq_seqno == 0 && ring->irq_get(ring))
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	if (ring->trace_irq_seqno == 0 && ring->irq_get(ring))
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		ring->trace_irq_seqno = seqno;
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		ring->trace_irq_seqno = seqno;