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Line 346... | Line 346... | ||
346 | DRM_ERROR("Failed to allocate seqno page\n"); |
346 | DRM_ERROR("Failed to allocate seqno page\n"); |
347 | ret = -ENOMEM; |
347 | ret = -ENOMEM; |
348 | goto err; |
348 | goto err; |
349 | } |
349 | } |
Line 350... | Line 350... | ||
350 | 350 | ||
Line 351... | Line 351... | ||
351 | // i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); |
351 | i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); |
352 | 352 | ||
353 | ret = i915_gem_object_pin(obj, 4096, true); |
353 | ret = i915_gem_object_pin(obj, 4096, true); |
Line 354... | Line 354... | ||
354 | if (ret) |
354 | if (ret) |
355 | goto err_unref; |
355 | goto err_unref; |
356 | 356 | ||
357 | pc->gtt_offset = obj->gtt_offset; |
357 | pc->gtt_offset = obj->gtt_offset; |
Line 358... | Line 358... | ||
358 | pc->cpu_page = (void*)MapIoMem(obj->pages[0], 4096, PG_SW); |
358 | pc->cpu_page = (void*)MapIoMem((addr_t)obj->pages[0], 4096, PG_SW); |
359 | if (pc->cpu_page == NULL) |
359 | if (pc->cpu_page == NULL) |
Line 514... | Line 514... | ||
514 | int |
514 | int |
515 | render_ring_sync_to(struct intel_ring_buffer *waiter, |
515 | render_ring_sync_to(struct intel_ring_buffer *waiter, |
516 | struct intel_ring_buffer *signaller, |
516 | struct intel_ring_buffer *signaller, |
517 | u32 seqno) |
517 | u32 seqno) |
518 | { |
518 | { |
519 | // WARN_ON(signaller->semaphore_register[RCS] == MI_SEMAPHORE_SYNC_INVALID); |
519 | WARN_ON(signaller->semaphore_register[RCS] == MI_SEMAPHORE_SYNC_INVALID); |
520 | return intel_ring_sync(waiter, |
520 | return intel_ring_sync(waiter, |
521 | signaller, |
521 | signaller, |
522 | RCS, |
522 | RCS, |
523 | seqno); |
523 | seqno); |
524 | } |
524 | } |
Line 527... | Line 527... | ||
527 | int |
527 | int |
528 | gen6_bsd_ring_sync_to(struct intel_ring_buffer *waiter, |
528 | gen6_bsd_ring_sync_to(struct intel_ring_buffer *waiter, |
529 | struct intel_ring_buffer *signaller, |
529 | struct intel_ring_buffer *signaller, |
530 | u32 seqno) |
530 | u32 seqno) |
531 | { |
531 | { |
532 | // WARN_ON(signaller->semaphore_register[VCS] == MI_SEMAPHORE_SYNC_INVALID); |
532 | WARN_ON(signaller->semaphore_register[VCS] == MI_SEMAPHORE_SYNC_INVALID); |
533 | return intel_ring_sync(waiter, |
533 | return intel_ring_sync(waiter, |
534 | signaller, |
534 | signaller, |
535 | VCS, |
535 | VCS, |
536 | seqno); |
536 | seqno); |
537 | } |
537 | } |
Line 540... | Line 540... | ||
540 | int |
540 | int |
541 | gen6_blt_ring_sync_to(struct intel_ring_buffer *waiter, |
541 | gen6_blt_ring_sync_to(struct intel_ring_buffer *waiter, |
542 | struct intel_ring_buffer *signaller, |
542 | struct intel_ring_buffer *signaller, |
543 | u32 seqno) |
543 | u32 seqno) |
544 | { |
544 | { |
545 | // WARN_ON(signaller->semaphore_register[BCS] == MI_SEMAPHORE_SYNC_INVALID); |
545 | WARN_ON(signaller->semaphore_register[BCS] == MI_SEMAPHORE_SYNC_INVALID); |
546 | return intel_ring_sync(waiter, |
546 | return intel_ring_sync(waiter, |
547 | signaller, |
547 | signaller, |
548 | BCS, |
548 | BCS, |
549 | seqno); |
549 | seqno); |
550 | } |
550 | } |
Line 967... | Line 967... | ||
967 | DRM_ERROR("Failed to allocate status page\n"); |
967 | DRM_ERROR("Failed to allocate status page\n"); |
968 | ret = -ENOMEM; |
968 | ret = -ENOMEM; |
969 | goto err; |
969 | goto err; |
970 | } |
970 | } |
Line 971... | Line 971... | ||
971 | 971 | ||
Line 972... | Line 972... | ||
972 | // i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); |
972 | i915_gem_object_set_cache_level(obj, I915_CACHE_LLC); |
973 | 973 | ||
974 | ret = i915_gem_object_pin(obj, 4096, true); |
974 | ret = i915_gem_object_pin(obj, 4096, true); |
975 | if (ret != 0) { |
975 | if (ret != 0) { |
Line 976... | Line 976... | ||
976 | goto err_unref; |
976 | goto err_unref; |
977 | } |
977 | } |
978 | 978 | ||
979 | ring->status_page.gfx_addr = obj->gtt_offset; |
979 | ring->status_page.gfx_addr = obj->gtt_offset; |
980 | ring->status_page.page_addr = MapIoMem(obj->pages[0], 4096, PG_SW); |
980 | ring->status_page.page_addr = (void*)MapIoMem((addr_t)obj->pages[0], 4096, PG_SW); |
981 | if (ring->status_page.page_addr == NULL) { |
981 | if (ring->status_page.page_addr == NULL) { |
982 | memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map)); |
982 | memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map)); |
Line 1008... | Line 1008... | ||
1008 | ring->dev = dev; |
1008 | ring->dev = dev; |
1009 | INIT_LIST_HEAD(&ring->active_list); |
1009 | INIT_LIST_HEAD(&ring->active_list); |
1010 | INIT_LIST_HEAD(&ring->request_list); |
1010 | INIT_LIST_HEAD(&ring->request_list); |
1011 | INIT_LIST_HEAD(&ring->gpu_write_list); |
1011 | INIT_LIST_HEAD(&ring->gpu_write_list); |
Line 1012... | Line 1012... | ||
1012 | 1012 | ||
1013 | // init_waitqueue_head(&ring->irq_queue); |
1013 | init_waitqueue_head(&ring->irq_queue); |
1014 | spin_lock_init(&ring->irq_lock); |
1014 | spin_lock_init(&ring->irq_lock); |
Line 1015... | Line 1015... | ||
1015 | ring->irq_mask = ~0; |
1015 | ring->irq_mask = ~0; |
1016 | 1016 | ||
Line 1173... | Line 1173... | ||
1173 | { |
1173 | { |
1174 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
1174 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
1175 | int n = 4*num_dwords; |
1175 | int n = 4*num_dwords; |
1176 | int ret; |
1176 | int ret; |
Line 1177... | Line 1177... | ||
1177 | 1177 | ||
1178 | // if (unlikely(atomic_read(&dev_priv->mm.wedged))) |
1178 | if (unlikely(atomic_read(&dev_priv->mm.wedged))) |
Line 1179... | Line 1179... | ||
1179 | // return -EIO; |
1179 | return -EIO; |
1180 | 1180 | ||
1181 | if (unlikely(ring->tail + n > ring->effective_size)) { |
1181 | if (unlikely(ring->tail + n > ring->effective_size)) { |
1182 | ret = intel_wrap_ring_buffer(ring); |
1182 | ret = intel_wrap_ring_buffer(ring); |
Line 1401... | Line 1401... | ||
1401 | if (ret) { |
1401 | if (ret) { |
1402 | drm_gem_object_unreference(&obj->base); |
1402 | drm_gem_object_unreference(&obj->base); |
1403 | return ret; |
1403 | return ret; |
1404 | } |
1404 | } |
Line 1405... | Line 1405... | ||
1405 | 1405 | ||
1406 | ptr = MapIoMem(obj->pages[0], 4096, PG_SW); |
1406 | ptr = (void*)MapIoMem((addr_t)obj->pages[0], 4096, PG_SW); |
Line 1407... | Line 1407... | ||
1407 | obj->mapped = ptr; |
1407 | obj->mapped = ptr; |
1408 | 1408 |