WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/intel_dvo.c


/*
 * Copyright 2006 Dave Airlie 
 * Copyright © 2006-2007 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt 
 */
#include 
#include 
#include 
#include 
#include 
#include "intel_drv.h"
#include 
#include "i915_drv.h"
#include "dvo.h"
 
#define SIL164_ADDR	0x38
#define CH7xxx_ADDR	0x76
#define TFP410_ADDR	0x38
#define NS2501_ADDR     0x38
 
static const struct intel_dvo_device intel_dvo_devices[] = {
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "sil164",
		.dvo_reg = DVOC,
		.dvo_srcdim_reg = DVOC_SRCDIM,
		.slave_addr = SIL164_ADDR,
		.dev_ops = &sil164_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "ch7xxx",
		.dvo_reg = DVOC,
		.dvo_srcdim_reg = DVOC_SRCDIM,
		.slave_addr = CH7xxx_ADDR,
		.dev_ops = &ch7xxx_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "ch7xxx",
		.dvo_reg = DVOC,
		.dvo_srcdim_reg = DVOC_SRCDIM,
		.slave_addr = 0x75, /* For some ch7010 */
		.dev_ops = &ch7xxx_ops,
	},
	{
		.type = INTEL_DVO_CHIP_LVDS,
		.name = "ivch",
		.dvo_reg = DVOA,
		.dvo_srcdim_reg = DVOA_SRCDIM,
		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
		.dev_ops = &ivch_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "tfp410",
		.dvo_reg = DVOC,
		.dvo_srcdim_reg = DVOC_SRCDIM,
		.slave_addr = TFP410_ADDR,
		.dev_ops = &tfp410_ops,
	},
	{
		.type = INTEL_DVO_CHIP_LVDS,
		.name = "ch7017",
		.dvo_reg = DVOC,
		.dvo_srcdim_reg = DVOC_SRCDIM,
		.slave_addr = 0x75,
		.gpio = GMBUS_PIN_DPB,
		.dev_ops = &ch7017_ops,
	},
	{
	        .type = INTEL_DVO_CHIP_TMDS,
		.name = "ns2501",
		.dvo_reg = DVOB,
		.dvo_srcdim_reg = DVOB_SRCDIM,
		.slave_addr = NS2501_ADDR,
		.dev_ops = &ns2501_ops,
       }
};
 
struct intel_dvo {
	struct intel_encoder base;
 
	struct intel_dvo_device dev;
 
	struct intel_connector *attached_connector;
 
	bool panel_wants_dither;
};
 
static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
{
	return container_of(encoder, struct intel_dvo, base);
}
 
static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
{
	return enc_to_dvo(intel_attached_encoder(connector));
}
 
static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
{
	struct drm_device *dev = connector->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
	u32 tmp;
 
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
 
	if (!(tmp & DVO_ENABLE))
		return false;
 
	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
}
 
static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
				   enum pipe *pipe)
{
	struct drm_device *dev = encoder->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
	u32 tmp;
 
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
 
	if (!(tmp & DVO_ENABLE))
		return false;
 
	*pipe = PORT_TO_PIPE(tmp);
 
	return true;
}
 
static void intel_dvo_get_config(struct intel_encoder *encoder,
				 struct intel_crtc_state *pipe_config)
{
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
	u32 tmp, flags = 0;
 
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
		flags |= DRM_MODE_FLAG_PHSYNC;
	else
		flags |= DRM_MODE_FLAG_NHSYNC;
	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
		flags |= DRM_MODE_FLAG_PVSYNC;
	else
		flags |= DRM_MODE_FLAG_NVSYNC;
 
	pipe_config->base.adjusted_mode.flags |= flags;
 
	pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
}
 
static void intel_disable_dvo(struct intel_encoder *encoder)
{
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
	i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
	u32 temp = I915_READ(dvo_reg);
 
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
	I915_READ(dvo_reg);
}
 
static void intel_enable_dvo(struct intel_encoder *encoder)
{
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
	i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
	u32 temp = I915_READ(dvo_reg);
 
	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
					 &crtc->config->base.mode,
					 &crtc->config->base.adjusted_mode);
 
	I915_WRITE(dvo_reg, temp | DVO_ENABLE);
	I915_READ(dvo_reg);
 
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
}
 
static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector *connector,
		     struct drm_display_mode *mode)
{
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
	const struct drm_display_mode *fixed_mode =
		to_intel_connector(connector)->panel.fixed_mode;
	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
	int target_clock = mode->clock;
 
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;
 
	/* XXX: Validate clock range */
 
	if (fixed_mode) {
		if (mode->hdisplay > fixed_mode->hdisplay)
			return MODE_PANEL;
		if (mode->vdisplay > fixed_mode->vdisplay)
			return MODE_PANEL;
 
		target_clock = fixed_mode->clock;
	}
 
	if (target_clock > max_dotclk)
		return MODE_CLOCK_HIGH;
 
	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
}
 
static bool intel_dvo_compute_config(struct intel_encoder *encoder,
				     struct intel_crtc_state *pipe_config)
{
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
	const struct drm_display_mode *fixed_mode =
		intel_dvo->attached_connector->panel.fixed_mode;
	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 
	/* If we have timings from the BIOS for the panel, put them in
	 * to the adjusted mode.  The CRTC will be set up for this mode,
	 * with the panel scaling set up to source from the H/VDisplay
	 * of the original mode.
	 */
	if (fixed_mode)
		intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 
	return true;
}
 
static void intel_dvo_pre_enable(struct intel_encoder *encoder)
{
	struct drm_device *dev = encoder->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
	const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
	int pipe = crtc->pipe;
	u32 dvo_val;
	i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 
 
 
 
 
 
 
 
 
 
	i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 
 
 
	/* Save the data order, since I don't know what it should be set to. */
	dvo_val = I915_READ(dvo_reg) &
		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
		   DVO_BLANK_ACTIVE_HIGH;
 
	if (pipe == 1)
		dvo_val |= DVO_PIPE_B_SELECT;
	dvo_val |= DVO_PIPE_STALL;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 
	/*I915_WRITE(DVOB_SRCDIM,
	  (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
	  (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
	I915_WRITE(dvo_srcdim_reg,
		   (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
		   (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
	/*I915_WRITE(DVOB, dvo_val);*/
	I915_WRITE(dvo_reg, dvo_val);
}
 
/**
 * Detect the output connection on our DVO device.
 *
 * Unimplemented.
 */
static enum drm_connector_status
intel_dvo_detect(struct drm_connector *connector, bool force)
{
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
		      connector->base.id, connector->name);
	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
}
 
static int intel_dvo_get_modes(struct drm_connector *connector)
{
	struct drm_i915_private *dev_priv = connector->dev->dev_private;
	const struct drm_display_mode *fixed_mode =
		to_intel_connector(connector)->panel.fixed_mode;
 
	/* We should probably have an i2c driver get_modes function for those
	 * devices which will have a fixed set of modes determined by the chip
	 * (TV-out, for example), but for now with just TMDS and LVDS,
	 * that's not the case.
	 */
	intel_ddc_get_modes(connector,
			    intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
	if (!list_empty(&connector->probed_modes))
		return 1;
 
	if (fixed_mode) {
		struct drm_display_mode *mode;
		mode = drm_mode_duplicate(connector->dev, fixed_mode);
		if (mode) {
			drm_mode_probed_add(connector, mode);
			return 1;
		}
	}
 
	return 0;
}
 
static void intel_dvo_destroy(struct drm_connector *connector)
{
	drm_connector_cleanup(connector);
	intel_panel_fini(&to_intel_connector(connector)->panel);
	kfree(connector);
}
 
static const struct drm_connector_funcs intel_dvo_connector_funcs = {
	.dpms = drm_atomic_helper_connector_dpms,
	.detect = intel_dvo_detect,
	.destroy = intel_dvo_destroy,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.atomic_get_property = intel_connector_atomic_get_property,
	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
};
 
static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
	.mode_valid = intel_dvo_mode_valid,
	.get_modes = intel_dvo_get_modes,
	.best_encoder = intel_best_encoder,
};
 
static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
{
	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 
	if (intel_dvo->dev.dev_ops->destroy)
		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 
	intel_encoder_destroy(encoder);
}
 
static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
	.destroy = intel_dvo_enc_destroy,
};
 
/**
 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 *
 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 * chip being on DVOB/C and having multiple pipes.
 */
static struct drm_display_mode *
intel_dvo_get_current_mode(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
	struct drm_display_mode *mode = NULL;
 
	/* If the DVO port is active, that'll be the LVDS, so we can pull out
	 * its timings to get how the BIOS set up the panel.
	 */
	if (dvo_val & DVO_ENABLE) {
		struct drm_crtc *crtc;
		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
 
		crtc = intel_get_crtc_for_pipe(dev, pipe);
		if (crtc) {
			mode = intel_crtc_mode_get(dev, crtc);
			if (mode) {
				mode->type |= DRM_MODE_TYPE_PREFERRED;
				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
					mode->flags |= DRM_MODE_FLAG_PHSYNC;
				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
					mode->flags |= DRM_MODE_FLAG_PVSYNC;
			}
		}
	}
 
	return mode;
}
 
void intel_dvo_init(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_encoder *intel_encoder;
	struct intel_dvo *intel_dvo;
	struct intel_connector *intel_connector;
	int i;
	int encoder_type = DRM_MODE_ENCODER_NONE;
 
	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
	if (!intel_dvo)
		return;
 
	intel_connector = intel_connector_alloc();
	if (!intel_connector) {
		kfree(intel_dvo);
		return;
	}
 
	intel_dvo->attached_connector = intel_connector;
 
	intel_encoder = &intel_dvo->base;
	drm_encoder_init(dev, &intel_encoder->base,
			 &intel_dvo_enc_funcs, encoder_type, NULL);
 
	intel_encoder->disable = intel_disable_dvo;
	intel_encoder->enable = intel_enable_dvo;
	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
	intel_encoder->get_config = intel_dvo_get_config;
	intel_encoder->compute_config = intel_dvo_compute_config;
	intel_encoder->pre_enable = intel_dvo_pre_enable;
	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
	intel_connector->unregister = intel_connector_unregister;
 
	/* Now, try to find a controller */
	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
		struct drm_connector *connector = &intel_connector->base;
		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
		struct i2c_adapter *i2c;
		int gpio;
		bool dvoinit;
		enum pipe pipe;
		uint32_t dpll[I915_MAX_PIPES];
 
		/* Allow the I2C driver info to specify the GPIO to be used in
		 * special cases, but otherwise default to what's defined
		 * in the spec.
		 */
		if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
			gpio = dvo->gpio;
		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
			gpio = GMBUS_PIN_SSC;
		else
			gpio = GMBUS_PIN_DPB;
 
		/* Set up the I2C bus necessary for the chip we're probing.
		 * It appears that everything is on GPIOE except for panels
		 * on i830 laptops, which are on GPIOB (DVOA).
		 */
		i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 
		intel_dvo->dev = *dvo;
 
		/* GMBUS NAK handling seems to be unstable, hence let the
		 * transmitter detection run in bit banging mode for now.
		 */
		intel_gmbus_force_bit(i2c, true);
 
		/* ns2501 requires the DVO 2x clock before it will
		 * respond to i2c accesses, so make sure we have
		 * have the clock enabled before we attempt to
		 * initialize the device.
		 */
		for_each_pipe(dev_priv, pipe) {
			dpll[pipe] = I915_READ(DPLL(pipe));
			I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
		}
 
		dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 
		/* restore the DVO 2x clock state to original */
		for_each_pipe(dev_priv, pipe) {
			I915_WRITE(DPLL(pipe), dpll[pipe]);
		}
 
		intel_gmbus_force_bit(i2c, false);
 
		if (!dvoinit)
			continue;
 
		intel_encoder->type = INTEL_OUTPUT_DVO;
		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
		switch (dvo->type) {
		case INTEL_DVO_CHIP_TMDS:
			intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
				(1 << INTEL_OUTPUT_DVO);
			drm_connector_init(dev, connector,
					   &intel_dvo_connector_funcs,
					   DRM_MODE_CONNECTOR_DVII);
			encoder_type = DRM_MODE_ENCODER_TMDS;
			break;
		case INTEL_DVO_CHIP_LVDS:
			intel_encoder->cloneable = 0;
			drm_connector_init(dev, connector,
					   &intel_dvo_connector_funcs,
					   DRM_MODE_CONNECTOR_LVDS);
			encoder_type = DRM_MODE_ENCODER_LVDS;
			break;
		}
 
		drm_connector_helper_add(connector,
					 &intel_dvo_connector_helper_funcs);
		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
		connector->interlace_allowed = false;
		connector->doublescan_allowed = false;
 
		intel_connector_attach_encoder(intel_connector, intel_encoder);
		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
			/* For our LVDS chipsets, we should hopefully be able
			 * to dig the fixed panel mode out of the BIOS data.
			 * However, it's in a different format from the BIOS
			 * data on chipsets with integrated LVDS (stored in AIM
			 * headers, likely), so for now, just get the current
			 * mode being output through DVO.
			 */
			intel_panel_init(&intel_connector->panel,
					 intel_dvo_get_current_mode(connector),
					 NULL);
			intel_dvo->panel_wants_dither = true;
		}
 
		drm_connector_register(connector);
		return;
	}
 
	drm_encoder_cleanup(&intel_encoder->base);
	kfree(intel_dvo);
	kfree(intel_connector);
}

Rev 6084	Rev 6937
1	/*	1	/*
2	* Copyright 2006 Dave Airlie	2	* Copyright 2006 Dave Airlie
3	* Copyright © 2006-2007 Intel Corporation	3	* Copyright © 2006-2007 Intel Corporation
4	*	4	*
5	* Permission is hereby granted, free of charge, to any person obtaining a	5	* Permission is hereby granted, free of charge, to any person obtaining a
6	* copy of this software and associated documentation files (the "Software"),	6	* copy of this software and associated documentation files (the "Software"),
7	* to deal in the Software without restriction, including without limitation	7	* to deal in the Software without restriction, including without limitation
8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
9	* and/or sell copies of the Software, and to permit persons to whom the	9	* and/or sell copies of the Software, and to permit persons to whom the
10	* Software is furnished to do so, subject to the following conditions:	10	* Software is furnished to do so, subject to the following conditions:
11	*	11	*
12	* The above copyright notice and this permission notice (including the next	12	* The above copyright notice and this permission notice (including the next
13	* paragraph) shall be included in all copies or substantial portions of the	13	* paragraph) shall be included in all copies or substantial portions of the
14	* Software.	14	* Software.
15	*	15	*
16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22	* DEALINGS IN THE SOFTWARE.	22	* DEALINGS IN THE SOFTWARE.
23	*	23	*
24	* Authors:	24	* Authors:
25	* Eric Anholt	25	* Eric Anholt
26	*/	26	*/
27	#include	27	#include
28	#include	28	#include
29	#include	29	#include
30	#include	30	#include
31	#include	31	#include
32	#include "intel_drv.h"	32	#include "intel_drv.h"
33	#include	33	#include
34	#include "i915_drv.h"	34	#include "i915_drv.h"
35	#include "dvo.h"	35	#include "dvo.h"
36		36
37	#define SIL164_ADDR 0x38	37	#define SIL164_ADDR 0x38
38	#define CH7xxx_ADDR 0x76	38	#define CH7xxx_ADDR 0x76
39	#define TFP410_ADDR 0x38	39	#define TFP410_ADDR 0x38
40	#define NS2501_ADDR 0x38	40	#define NS2501_ADDR 0x38
41		41
42	static const struct intel_dvo_device intel_dvo_devices[] = {	42	static const struct intel_dvo_device intel_dvo_devices[] = {
43	{	43	{
44	.type = INTEL_DVO_CHIP_TMDS,	44	.type = INTEL_DVO_CHIP_TMDS,
45	.name = "sil164",	45	.name = "sil164",
46	.dvo_reg = DVOC,	46	.dvo_reg = DVOC,
-		47	.dvo_srcdim_reg = DVOC_SRCDIM,
47	.slave_addr = SIL164_ADDR,	48	.slave_addr = SIL164_ADDR,
48	.dev_ops = &sil164_ops,	49	.dev_ops = &sil164_ops,
49	},	50	},
50	{	51	{
51	.type = INTEL_DVO_CHIP_TMDS,	52	.type = INTEL_DVO_CHIP_TMDS,
52	.name = "ch7xxx",	53	.name = "ch7xxx",
53	.dvo_reg = DVOC,	54	.dvo_reg = DVOC,
-		55	.dvo_srcdim_reg = DVOC_SRCDIM,
54	.slave_addr = CH7xxx_ADDR,	56	.slave_addr = CH7xxx_ADDR,
55	.dev_ops = &ch7xxx_ops,	57	.dev_ops = &ch7xxx_ops,
56	},	58	},
57	{	59	{
58	.type = INTEL_DVO_CHIP_TMDS,	60	.type = INTEL_DVO_CHIP_TMDS,
59	.name = "ch7xxx",	61	.name = "ch7xxx",
60	.dvo_reg = DVOC,	62	.dvo_reg = DVOC,
-		63	.dvo_srcdim_reg = DVOC_SRCDIM,
61	.slave_addr = 0x75, /* For some ch7010 */	64	.slave_addr = 0x75, /* For some ch7010 */
62	.dev_ops = &ch7xxx_ops,	65	.dev_ops = &ch7xxx_ops,
63	},	66	},
64	{	67	{
65	.type = INTEL_DVO_CHIP_LVDS,	68	.type = INTEL_DVO_CHIP_LVDS,
66	.name = "ivch",	69	.name = "ivch",
67	.dvo_reg = DVOA,	70	.dvo_reg = DVOA,
-		71	.dvo_srcdim_reg = DVOA_SRCDIM,
68	.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */	72	.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
69	.dev_ops = &ivch_ops,	73	.dev_ops = &ivch_ops,
70	},	74	},
71	{	75	{
72	.type = INTEL_DVO_CHIP_TMDS,	76	.type = INTEL_DVO_CHIP_TMDS,
73	.name = "tfp410",	77	.name = "tfp410",
74	.dvo_reg = DVOC,	78	.dvo_reg = DVOC,
-		79	.dvo_srcdim_reg = DVOC_SRCDIM,
75	.slave_addr = TFP410_ADDR,	80	.slave_addr = TFP410_ADDR,
76	.dev_ops = &tfp410_ops,	81	.dev_ops = &tfp410_ops,
77	},	82	},
78	{	83	{
79	.type = INTEL_DVO_CHIP_LVDS,	84	.type = INTEL_DVO_CHIP_LVDS,
80	.name = "ch7017",	85	.name = "ch7017",
81	.dvo_reg = DVOC,	86	.dvo_reg = DVOC,
-		87	.dvo_srcdim_reg = DVOC_SRCDIM,
82	.slave_addr = 0x75,	88	.slave_addr = 0x75,
83	.gpio = GMBUS_PIN_DPB,	89	.gpio = GMBUS_PIN_DPB,
84	.dev_ops = &ch7017_ops,	90	.dev_ops = &ch7017_ops,
85	},	91	},
86	{	92	{
87	.type = INTEL_DVO_CHIP_TMDS,	93	.type = INTEL_DVO_CHIP_TMDS,
88	.name = "ns2501",	94	.name = "ns2501",
89	.dvo_reg = DVOB,	95	.dvo_reg = DVOB,
-		96	.dvo_srcdim_reg = DVOB_SRCDIM,
90	.slave_addr = NS2501_ADDR,	97	.slave_addr = NS2501_ADDR,
91	.dev_ops = &ns2501_ops,	98	.dev_ops = &ns2501_ops,
92	}	99	}
93	};	100	};
94		101
95	struct intel_dvo {	102	struct intel_dvo {
96	struct intel_encoder base;	103	struct intel_encoder base;
97		104
98	struct intel_dvo_device dev;	105	struct intel_dvo_device dev;
99		106
100	struct intel_connector *attached_connector;	107	struct intel_connector *attached_connector;
101		108
102	bool panel_wants_dither;	109	bool panel_wants_dither;
103	};	110	};
104		111
105	static struct intel_dvo enc_to_dvo(struct intel_encoder encoder)	112	static struct intel_dvo enc_to_dvo(struct intel_encoder encoder)
106	{	113	{
107	return container_of(encoder, struct intel_dvo, base);	114	return container_of(encoder, struct intel_dvo, base);
108	}	115	}
109		116
110	static struct intel_dvo intel_attached_dvo(struct drm_connector connector)	117	static struct intel_dvo intel_attached_dvo(struct drm_connector connector)
111	{	118	{
112	return enc_to_dvo(intel_attached_encoder(connector));	119	return enc_to_dvo(intel_attached_encoder(connector));
113	}	120	}
114		121
115	static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)	122	static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
116	{	123	{
117	struct drm_device *dev = connector->base.dev;	124	struct drm_device *dev = connector->base.dev;
118	struct drm_i915_private *dev_priv = dev->dev_private;	125	struct drm_i915_private *dev_priv = dev->dev_private;
119	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);	126	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
120	u32 tmp;	127	u32 tmp;
121		128
122	tmp = I915_READ(intel_dvo->dev.dvo_reg);	129	tmp = I915_READ(intel_dvo->dev.dvo_reg);
123		130
124	if (!(tmp & DVO_ENABLE))	131	if (!(tmp & DVO_ENABLE))
125	return false;	132	return false;
126		133
127	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);	134	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
128	}	135	}
129		136
130	static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,	137	static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
131	enum pipe *pipe)	138	enum pipe *pipe)
132	{	139	{
133	struct drm_device *dev = encoder->base.dev;	140	struct drm_device *dev = encoder->base.dev;
134	struct drm_i915_private *dev_priv = dev->dev_private;	141	struct drm_i915_private *dev_priv = dev->dev_private;
135	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);	142	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
136	u32 tmp;	143	u32 tmp;
137		144
138	tmp = I915_READ(intel_dvo->dev.dvo_reg);	145	tmp = I915_READ(intel_dvo->dev.dvo_reg);
139		146
140	if (!(tmp & DVO_ENABLE))	147	if (!(tmp & DVO_ENABLE))
141	return false;	148	return false;
142		149
143	*pipe = PORT_TO_PIPE(tmp);	150	*pipe = PORT_TO_PIPE(tmp);
144		151
145	return true;	152	return true;
146	}	153	}
147		154
148	static void intel_dvo_get_config(struct intel_encoder *encoder,	155	static void intel_dvo_get_config(struct intel_encoder *encoder,
149	struct intel_crtc_state *pipe_config)	156	struct intel_crtc_state *pipe_config)
150	{	157	{
151	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;	158	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
152	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);	159	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
153	u32 tmp, flags = 0;	160	u32 tmp, flags = 0;
154		161
155	tmp = I915_READ(intel_dvo->dev.dvo_reg);	162	tmp = I915_READ(intel_dvo->dev.dvo_reg);
156	if (tmp & DVO_HSYNC_ACTIVE_HIGH)	163	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
157	flags \|= DRM_MODE_FLAG_PHSYNC;	164	flags \|= DRM_MODE_FLAG_PHSYNC;
158	else	165	else
159	flags \|= DRM_MODE_FLAG_NHSYNC;	166	flags \|= DRM_MODE_FLAG_NHSYNC;
160	if (tmp & DVO_VSYNC_ACTIVE_HIGH)	167	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
161	flags \|= DRM_MODE_FLAG_PVSYNC;	168	flags \|= DRM_MODE_FLAG_PVSYNC;
162	else	169	else
163	flags \|= DRM_MODE_FLAG_NVSYNC;	170	flags \|= DRM_MODE_FLAG_NVSYNC;
164		171
165	pipe_config->base.adjusted_mode.flags \|= flags;	172	pipe_config->base.adjusted_mode.flags \|= flags;
166		173
167	pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;	174	pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
168	}	175	}
169		176
170	static void intel_disable_dvo(struct intel_encoder *encoder)	177	static void intel_disable_dvo(struct intel_encoder *encoder)
171	{	178	{
172	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;	179	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
173	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);	180	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
174	u32 dvo_reg = intel_dvo->dev.dvo_reg;	181	i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
175	u32 temp = I915_READ(dvo_reg);	182	u32 temp = I915_READ(dvo_reg);
176		183
177	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);	184	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
178	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);	185	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
179	I915_READ(dvo_reg);	186	I915_READ(dvo_reg);
180	}	187	}
181		188
182	static void intel_enable_dvo(struct intel_encoder *encoder)	189	static void intel_enable_dvo(struct intel_encoder *encoder)
183	{	190	{
184	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;	191	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
185	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);	192	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
186	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);	193	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
187	u32 dvo_reg = intel_dvo->dev.dvo_reg;	194	i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
188	u32 temp = I915_READ(dvo_reg);	195	u32 temp = I915_READ(dvo_reg);
189		196
190	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,	197	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
191	&crtc->config->base.mode,	198	&crtc->config->base.mode,
192	&crtc->config->base.adjusted_mode);	199	&crtc->config->base.adjusted_mode);
193		200
194	I915_WRITE(dvo_reg, temp \| DVO_ENABLE);	201	I915_WRITE(dvo_reg, temp \| DVO_ENABLE);
195	I915_READ(dvo_reg);	202	I915_READ(dvo_reg);
196		203
197	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);	204	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
198	}	205	}
199		206
200	static enum drm_mode_status	207	static enum drm_mode_status
201	intel_dvo_mode_valid(struct drm_connector *connector,	208	intel_dvo_mode_valid(struct drm_connector *connector,
202	struct drm_display_mode *mode)	209	struct drm_display_mode *mode)
203	{	210	{
204	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);	211	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
205	const struct drm_display_mode *fixed_mode =	212	const struct drm_display_mode *fixed_mode =
206	to_intel_connector(connector)->panel.fixed_mode;	213	to_intel_connector(connector)->panel.fixed_mode;
207	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;	214	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
208	int target_clock = mode->clock;	215	int target_clock = mode->clock;
209		216
210	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)	217	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
211	return MODE_NO_DBLESCAN;	218	return MODE_NO_DBLESCAN;
212		219
213	/* XXX: Validate clock range */	220	/* XXX: Validate clock range */
214		221
215	if (fixed_mode) {	222	if (fixed_mode) {
216	if (mode->hdisplay > fixed_mode->hdisplay)	223	if (mode->hdisplay > fixed_mode->hdisplay)
217	return MODE_PANEL;	224	return MODE_PANEL;
218	if (mode->vdisplay > fixed_mode->vdisplay)	225	if (mode->vdisplay > fixed_mode->vdisplay)
219	return MODE_PANEL;	226	return MODE_PANEL;
220		227
221	target_clock = fixed_mode->clock;	228	target_clock = fixed_mode->clock;
222	}	229	}
223		230
224	if (target_clock > max_dotclk)	231	if (target_clock > max_dotclk)
225	return MODE_CLOCK_HIGH;	232	return MODE_CLOCK_HIGH;
226		233
227	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);	234	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
228	}	235	}
229		236
230	static bool intel_dvo_compute_config(struct intel_encoder *encoder,	237	static bool intel_dvo_compute_config(struct intel_encoder *encoder,
231	struct intel_crtc_state *pipe_config)	238	struct intel_crtc_state *pipe_config)
232	{	239	{
233	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);	240	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
234	const struct drm_display_mode *fixed_mode =	241	const struct drm_display_mode *fixed_mode =
235	intel_dvo->attached_connector->panel.fixed_mode;	242	intel_dvo->attached_connector->panel.fixed_mode;
236	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;	243	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
237		244
238	/* If we have timings from the BIOS for the panel, put them in	245	/* If we have timings from the BIOS for the panel, put them in
239	* to the adjusted mode. The CRTC will be set up for this mode,	246	* to the adjusted mode. The CRTC will be set up for this mode,
240	* with the panel scaling set up to source from the H/VDisplay	247	* with the panel scaling set up to source from the H/VDisplay
241	* of the original mode.	248	* of the original mode.
242	*/	249	*/
243	if (fixed_mode)	250	if (fixed_mode)
244	intel_fixed_panel_mode(fixed_mode, adjusted_mode);	251	intel_fixed_panel_mode(fixed_mode, adjusted_mode);
245		252
246	return true;	253	return true;
247	}	254	}
248		255
249	static void intel_dvo_pre_enable(struct intel_encoder *encoder)	256	static void intel_dvo_pre_enable(struct intel_encoder *encoder)
250	{	257	{
251	struct drm_device *dev = encoder->base.dev;	258	struct drm_device *dev = encoder->base.dev;
252	struct drm_i915_private *dev_priv = dev->dev_private;	259	struct drm_i915_private *dev_priv = dev->dev_private;
253	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);	260	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
254	const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;	261	const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
255	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);	262	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
256	int pipe = crtc->pipe;	263	int pipe = crtc->pipe;
257	u32 dvo_val;	264	u32 dvo_val;
258	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;	265	i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
259		-
260	switch (dvo_reg) {	-
261	case DVOA:	-
262	default:	-
263	dvo_srcdim_reg = DVOA_SRCDIM;	-
264	break;	-
265	case DVOB:	-
266	dvo_srcdim_reg = DVOB_SRCDIM;	-
267	break;	-
268	case DVOC:	-
269	dvo_srcdim_reg = DVOC_SRCDIM;	266	i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
270	break;	-
271	}	-
272		267
273	/* Save the data order, since I don't know what it should be set to. */	268	/* Save the data order, since I don't know what it should be set to. */
274	dvo_val = I915_READ(dvo_reg) &	269	dvo_val = I915_READ(dvo_reg) &
275	(DVO_PRESERVE_MASK \| DVO_DATA_ORDER_GBRG);	270	(DVO_PRESERVE_MASK \| DVO_DATA_ORDER_GBRG);
276	dvo_val \|= DVO_DATA_ORDER_FP \| DVO_BORDER_ENABLE \|	271	dvo_val \|= DVO_DATA_ORDER_FP \| DVO_BORDER_ENABLE \|
277	DVO_BLANK_ACTIVE_HIGH;	272	DVO_BLANK_ACTIVE_HIGH;
278		273
279	if (pipe == 1)	274	if (pipe == 1)
280	dvo_val \|= DVO_PIPE_B_SELECT;	275	dvo_val \|= DVO_PIPE_B_SELECT;
281	dvo_val \|= DVO_PIPE_STALL;	276	dvo_val \|= DVO_PIPE_STALL;
282	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)	277	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
283	dvo_val \|= DVO_HSYNC_ACTIVE_HIGH;	278	dvo_val \|= DVO_HSYNC_ACTIVE_HIGH;
284	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)	279	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
285	dvo_val \|= DVO_VSYNC_ACTIVE_HIGH;	280	dvo_val \|= DVO_VSYNC_ACTIVE_HIGH;
286		281
287	/*I915_WRITE(DVOB_SRCDIM,	282	/*I915_WRITE(DVOB_SRCDIM,
288	(adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|	283	(adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|
289	(adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/	284	(adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
290	I915_WRITE(dvo_srcdim_reg,	285	I915_WRITE(dvo_srcdim_reg,
291	(adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|	286	(adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|
292	(adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));	287	(adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
293	/I915_WRITE(DVOB, dvo_val);/	288	/I915_WRITE(DVOB, dvo_val);/
294	I915_WRITE(dvo_reg, dvo_val);	289	I915_WRITE(dvo_reg, dvo_val);
295	}	290	}
296		291
297	/**	292	/**
298	* Detect the output connection on our DVO device.	293	* Detect the output connection on our DVO device.
299	*	294	*
300	* Unimplemented.	295	* Unimplemented.
301	*/	296	*/
302	static enum drm_connector_status	297	static enum drm_connector_status
303	intel_dvo_detect(struct drm_connector *connector, bool force)	298	intel_dvo_detect(struct drm_connector *connector, bool force)
304	{	299	{
305	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);	300	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
306	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",	301	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
307	connector->base.id, connector->name);	302	connector->base.id, connector->name);
308	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);	303	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
309	}	304	}
310		305
311	static int intel_dvo_get_modes(struct drm_connector *connector)	306	static int intel_dvo_get_modes(struct drm_connector *connector)
312	{	307	{
313	struct drm_i915_private *dev_priv = connector->dev->dev_private;	308	struct drm_i915_private *dev_priv = connector->dev->dev_private;
314	const struct drm_display_mode *fixed_mode =	309	const struct drm_display_mode *fixed_mode =
315	to_intel_connector(connector)->panel.fixed_mode;	310	to_intel_connector(connector)->panel.fixed_mode;
316		311
317	/* We should probably have an i2c driver get_modes function for those	312	/* We should probably have an i2c driver get_modes function for those
318	* devices which will have a fixed set of modes determined by the chip	313	* devices which will have a fixed set of modes determined by the chip
319	* (TV-out, for example), but for now with just TMDS and LVDS,	314	* (TV-out, for example), but for now with just TMDS and LVDS,
320	* that's not the case.	315	* that's not the case.
321	*/	316	*/
322	intel_ddc_get_modes(connector,	317	intel_ddc_get_modes(connector,
323	intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));	318	intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
324	if (!list_empty(&connector->probed_modes))	319	if (!list_empty(&connector->probed_modes))
325	return 1;	320	return 1;
326		321
327	if (fixed_mode) {	322	if (fixed_mode) {
328	struct drm_display_mode *mode;	323	struct drm_display_mode *mode;
329	mode = drm_mode_duplicate(connector->dev, fixed_mode);	324	mode = drm_mode_duplicate(connector->dev, fixed_mode);
330	if (mode) {	325	if (mode) {
331	drm_mode_probed_add(connector, mode);	326	drm_mode_probed_add(connector, mode);
332	return 1;	327	return 1;
333	}	328	}
334	}	329	}
335		330
336	return 0;	331	return 0;
337	}	332	}
338		333
339	static void intel_dvo_destroy(struct drm_connector *connector)	334	static void intel_dvo_destroy(struct drm_connector *connector)
340	{	335	{
341	drm_connector_cleanup(connector);	336	drm_connector_cleanup(connector);
342	intel_panel_fini(&to_intel_connector(connector)->panel);	337	intel_panel_fini(&to_intel_connector(connector)->panel);
343	kfree(connector);	338	kfree(connector);
344	}	339	}
345		340
346	static const struct drm_connector_funcs intel_dvo_connector_funcs = {	341	static const struct drm_connector_funcs intel_dvo_connector_funcs = {
347	.dpms = drm_atomic_helper_connector_dpms,	342	.dpms = drm_atomic_helper_connector_dpms,
348	.detect = intel_dvo_detect,	343	.detect = intel_dvo_detect,
349	.destroy = intel_dvo_destroy,	344	.destroy = intel_dvo_destroy,
350	.fill_modes = drm_helper_probe_single_connector_modes,	345	.fill_modes = drm_helper_probe_single_connector_modes,
351	.atomic_get_property = intel_connector_atomic_get_property,	346	.atomic_get_property = intel_connector_atomic_get_property,
352	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,	347	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
353	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,	348	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
354	};	349	};
355		350
356	static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {	351	static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
357	.mode_valid = intel_dvo_mode_valid,	352	.mode_valid = intel_dvo_mode_valid,
358	.get_modes = intel_dvo_get_modes,	353	.get_modes = intel_dvo_get_modes,
359	.best_encoder = intel_best_encoder,	354	.best_encoder = intel_best_encoder,
360	};	355	};
361		356
362	static void intel_dvo_enc_destroy(struct drm_encoder *encoder)	357	static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
363	{	358	{
364	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));	359	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
365		360
366	if (intel_dvo->dev.dev_ops->destroy)	361	if (intel_dvo->dev.dev_ops->destroy)
367	intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);	362	intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
368		363
369	intel_encoder_destroy(encoder);	364	intel_encoder_destroy(encoder);
370	}	365	}
371		366
372	static const struct drm_encoder_funcs intel_dvo_enc_funcs = {	367	static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
373	.destroy = intel_dvo_enc_destroy,	368	.destroy = intel_dvo_enc_destroy,
374	};	369	};
375		370
376	/**	371	/**
377	* Attempts to get a fixed panel timing for LVDS (currently only the i830).	372	* Attempts to get a fixed panel timing for LVDS (currently only the i830).
378	*	373	*
379	* Other chips with DVO LVDS will need to extend this to deal with the LVDS	374	* Other chips with DVO LVDS will need to extend this to deal with the LVDS
380	* chip being on DVOB/C and having multiple pipes.	375	* chip being on DVOB/C and having multiple pipes.
381	*/	376	*/
382	static struct drm_display_mode *	377	static struct drm_display_mode *
383	intel_dvo_get_current_mode(struct drm_connector *connector)	378	intel_dvo_get_current_mode(struct drm_connector *connector)
384	{	379	{
385	struct drm_device *dev = connector->dev;	380	struct drm_device *dev = connector->dev;
386	struct drm_i915_private *dev_priv = dev->dev_private;	381	struct drm_i915_private *dev_priv = dev->dev_private;
387	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);	382	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
388	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);	383	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
389	struct drm_display_mode *mode = NULL;	384	struct drm_display_mode *mode = NULL;
390		385
391	/* If the DVO port is active, that'll be the LVDS, so we can pull out	386	/* If the DVO port is active, that'll be the LVDS, so we can pull out
392	* its timings to get how the BIOS set up the panel.	387	* its timings to get how the BIOS set up the panel.
393	*/	388	*/
394	if (dvo_val & DVO_ENABLE) {	389	if (dvo_val & DVO_ENABLE) {
395	struct drm_crtc *crtc;	390	struct drm_crtc *crtc;
396	int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;	391	int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
397		392
398	crtc = intel_get_crtc_for_pipe(dev, pipe);	393	crtc = intel_get_crtc_for_pipe(dev, pipe);
399	if (crtc) {	394	if (crtc) {
400	mode = intel_crtc_mode_get(dev, crtc);	395	mode = intel_crtc_mode_get(dev, crtc);
401	if (mode) {	396	if (mode) {
402	mode->type \|= DRM_MODE_TYPE_PREFERRED;	397	mode->type \|= DRM_MODE_TYPE_PREFERRED;
403	if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)	398	if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
404	mode->flags \|= DRM_MODE_FLAG_PHSYNC;	399	mode->flags \|= DRM_MODE_FLAG_PHSYNC;
405	if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)	400	if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
406	mode->flags \|= DRM_MODE_FLAG_PVSYNC;	401	mode->flags \|= DRM_MODE_FLAG_PVSYNC;
407	}	402	}
408	}	403	}
409	}	404	}
410		405
411	return mode;	406	return mode;
412	}	407	}
413		408
414	void intel_dvo_init(struct drm_device *dev)	409	void intel_dvo_init(struct drm_device *dev)
415	{	410	{
416	struct drm_i915_private *dev_priv = dev->dev_private;	411	struct drm_i915_private *dev_priv = dev->dev_private;
417	struct intel_encoder *intel_encoder;	412	struct intel_encoder *intel_encoder;
418	struct intel_dvo *intel_dvo;	413	struct intel_dvo *intel_dvo;
419	struct intel_connector *intel_connector;	414	struct intel_connector *intel_connector;
420	int i;	415	int i;
421	int encoder_type = DRM_MODE_ENCODER_NONE;	416	int encoder_type = DRM_MODE_ENCODER_NONE;
422		417
423	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);	418	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
424	if (!intel_dvo)	419	if (!intel_dvo)
425	return;	420	return;
426		421
427	intel_connector = intel_connector_alloc();	422	intel_connector = intel_connector_alloc();
428	if (!intel_connector) {	423	if (!intel_connector) {
429	kfree(intel_dvo);	424	kfree(intel_dvo);
430	return;	425	return;
431	}	426	}
432		427
433	intel_dvo->attached_connector = intel_connector;	428	intel_dvo->attached_connector = intel_connector;
434		429
435	intel_encoder = &intel_dvo->base;	430	intel_encoder = &intel_dvo->base;
436	drm_encoder_init(dev, &intel_encoder->base,	431	drm_encoder_init(dev, &intel_encoder->base,
437	&intel_dvo_enc_funcs, encoder_type);	432	&intel_dvo_enc_funcs, encoder_type, NULL);
438		433
439	intel_encoder->disable = intel_disable_dvo;	434	intel_encoder->disable = intel_disable_dvo;
440	intel_encoder->enable = intel_enable_dvo;	435	intel_encoder->enable = intel_enable_dvo;
441	intel_encoder->get_hw_state = intel_dvo_get_hw_state;	436	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
442	intel_encoder->get_config = intel_dvo_get_config;	437	intel_encoder->get_config = intel_dvo_get_config;
443	intel_encoder->compute_config = intel_dvo_compute_config;	438	intel_encoder->compute_config = intel_dvo_compute_config;
444	intel_encoder->pre_enable = intel_dvo_pre_enable;	439	intel_encoder->pre_enable = intel_dvo_pre_enable;
445	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;	440	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
446	intel_connector->unregister = intel_connector_unregister;	441	intel_connector->unregister = intel_connector_unregister;
447		442
448	/* Now, try to find a controller */	443	/* Now, try to find a controller */
449	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {	444	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
450	struct drm_connector *connector = &intel_connector->base;	445	struct drm_connector *connector = &intel_connector->base;
451	const struct intel_dvo_device *dvo = &intel_dvo_devices[i];	446	const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
452	struct i2c_adapter *i2c;	447	struct i2c_adapter *i2c;
453	int gpio;	448	int gpio;
454	bool dvoinit;	449	bool dvoinit;
455	enum pipe pipe;	450	enum pipe pipe;
456	uint32_t dpll[I915_MAX_PIPES];	451	uint32_t dpll[I915_MAX_PIPES];
457		452
458	/* Allow the I2C driver info to specify the GPIO to be used in	453	/* Allow the I2C driver info to specify the GPIO to be used in
459	* special cases, but otherwise default to what's defined	454	* special cases, but otherwise default to what's defined
460	* in the spec.	455	* in the spec.
461	*/	456	*/
462	if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))	457	if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
463	gpio = dvo->gpio;	458	gpio = dvo->gpio;
464	else if (dvo->type == INTEL_DVO_CHIP_LVDS)	459	else if (dvo->type == INTEL_DVO_CHIP_LVDS)
465	gpio = GMBUS_PIN_SSC;	460	gpio = GMBUS_PIN_SSC;
466	else	461	else
467	gpio = GMBUS_PIN_DPB;	462	gpio = GMBUS_PIN_DPB;
468		463
469	/* Set up the I2C bus necessary for the chip we're probing.	464	/* Set up the I2C bus necessary for the chip we're probing.
470	* It appears that everything is on GPIOE except for panels	465	* It appears that everything is on GPIOE except for panels
471	* on i830 laptops, which are on GPIOB (DVOA).	466	* on i830 laptops, which are on GPIOB (DVOA).
472	*/	467	*/
473	i2c = intel_gmbus_get_adapter(dev_priv, gpio);	468	i2c = intel_gmbus_get_adapter(dev_priv, gpio);
474		469
475	intel_dvo->dev = *dvo;	470	intel_dvo->dev = *dvo;
476		471
477	/* GMBUS NAK handling seems to be unstable, hence let the	472	/* GMBUS NAK handling seems to be unstable, hence let the
478	* transmitter detection run in bit banging mode for now.	473	* transmitter detection run in bit banging mode for now.
479	*/	474	*/
480	intel_gmbus_force_bit(i2c, true);	475	intel_gmbus_force_bit(i2c, true);
481		476
482	/* ns2501 requires the DVO 2x clock before it will	477	/* ns2501 requires the DVO 2x clock before it will
483	* respond to i2c accesses, so make sure we have	478	* respond to i2c accesses, so make sure we have
484	* have the clock enabled before we attempt to	479	* have the clock enabled before we attempt to
485	* initialize the device.	480	* initialize the device.
486	*/	481	*/
487	for_each_pipe(dev_priv, pipe) {	482	for_each_pipe(dev_priv, pipe) {
488	dpll[pipe] = I915_READ(DPLL(pipe));	483	dpll[pipe] = I915_READ(DPLL(pipe));
489	I915_WRITE(DPLL(pipe), dpll[pipe] \| DPLL_DVO_2X_MODE);	484	I915_WRITE(DPLL(pipe), dpll[pipe] \| DPLL_DVO_2X_MODE);
490	}	485	}
491		486
492	dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);	487	dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
493		488

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/intel_dvo.c – Rev 6084 → 6937