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| Rev 5354 | Rev 6084 | ||
|---|---|---|---|
| Line 26... | Line 26... | ||
| 26 | 26 | ||
| 27 | #include |
27 | #include |
| 28 | #include |
28 | #include |
| 29 | #include |
29 | #include |
| - | 30 | #include |
|
| 30 | #include |
31 | #include |
| 31 | #include |
32 | #include |
| 32 | #include |
33 | #include |
| 33 | //#include |
34 | #include |
| 34 | #include |
35 | #include |
| 35 | #include "i915_drv.h" |
36 | #include "i915_drv.h" |
| 36 | #include "intel_drv.h" |
37 | #include "intel_drv.h" |
| - | 38 | #include "intel_dsi.h" |
|
| - | 39 | ||
| - | 40 | struct vbt_panel { |
|
| 37 | #include "intel_dsi.h" |
41 | struct drm_panel panel; |
| - | 42 | struct intel_dsi *intel_dsi; |
|
| - | 43 | }; |
|
| - | 44 | ||
| - | 45 | static inline struct vbt_panel *to_vbt_panel(struct drm_panel *panel) |
|
| - | 46 | { |
|
| - | 47 | return container_of(panel, struct vbt_panel, panel); |
|
| Line 38... | Line 48... | ||
| 38 | #include "intel_dsi_cmd.h" |
48 | } |
| 39 | 49 | ||
| 40 | #define MIPI_TRANSFER_MODE_SHIFT 0 |
50 | #define MIPI_TRANSFER_MODE_SHIFT 0 |
| Line 92... | Line 102... | ||
| 92 | { GPIO_NC_9_PCONF0, GPIO_NC_9_PAD, 0 }, |
102 | { GPIO_NC_9_PCONF0, GPIO_NC_9_PAD, 0 }, |
| 93 | { GPIO_NC_10_PCONF0, GPIO_NC_10_PAD, 0}, |
103 | { GPIO_NC_10_PCONF0, GPIO_NC_10_PAD, 0}, |
| 94 | { GPIO_NC_11_PCONF0, GPIO_NC_11_PAD, 0} |
104 | { GPIO_NC_11_PCONF0, GPIO_NC_11_PAD, 0} |
| 95 | }; |
105 | }; |
| Line 96... | Line 106... | ||
| 96 | 106 | ||
| 97 | static u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, u8 *data) |
107 | static inline enum port intel_dsi_seq_port_to_port(u8 port) |
| 98 | { |
108 | { |
| 99 | u8 type, byte, mode, vc, port; |
- | |
| 100 | u16 len; |
109 | return port ? PORT_C : PORT_A; |
| 101 | - | ||
| 102 | byte = *data++; |
- | |
| 103 | mode = (byte >> MIPI_TRANSFER_MODE_SHIFT) & 0x1; |
- | |
| 104 | vc = (byte >> MIPI_VIRTUAL_CHANNEL_SHIFT) & 0x3; |
- | |
| Line -... | Line 110... | ||
| - | 110 | } |
|
| 105 | port = (byte >> MIPI_PORT_SHIFT) & 0x3; |
111 | |
| - | 112 | static const u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, |
|
| - | 113 | const u8 *data) |
|
| 106 | 114 | { |
|
| - | 115 | struct mipi_dsi_device *dsi_device; |
|
| - | 116 | u8 type, flags, seq_port; |
|
| Line 107... | Line 117... | ||
| 107 | /* LP or HS mode */ |
117 | u16 len; |
| 108 | intel_dsi->hs = mode; |
118 | enum port port; |
| Line 109... | Line 119... | ||
| 109 | 119 | ||
| 110 | /* get packet type and increment the pointer */ |
120 | flags = *data++; |
| Line -... | Line 121... | ||
| - | 121 | type = *data++; |
|
| - | 122 | ||
| - | 123 | len = *((u16 *) data); |
|
| - | 124 | data += 2; |
|
| - | 125 | ||
| - | 126 | seq_port = (flags >> MIPI_PORT_SHIFT) & 3; |
|
| - | 127 | ||
| - | 128 | /* For DSI single link on Port A & C, the seq_port value which is |
|
| - | 129 | * parsed from Sequence Block#53 of VBT has been set to 0 |
|
| - | 130 | * Now, read/write of packets for the DSI single link on Port A and |
|
| - | 131 | * Port C will based on the DVO port from VBT block 2. |
|
| - | 132 | */ |
|
| - | 133 | if (intel_dsi->ports == (1 << PORT_C)) |
|
| - | 134 | port = PORT_C; |
|
| - | 135 | else |
|
| - | 136 | port = intel_dsi_seq_port_to_port(seq_port); |
|
| - | 137 | ||
| - | 138 | dsi_device = intel_dsi->dsi_hosts[port]->device; |
|
| - | 139 | if (!dsi_device) { |
|
| - | 140 | DRM_DEBUG_KMS("no dsi device for port %c\n", port_name(port)); |
|
| - | 141 | goto out; |
|
| - | 142 | } |
|
| - | 143 | ||
| - | 144 | if ((flags >> MIPI_TRANSFER_MODE_SHIFT) & 1) |
|
| - | 145 | dsi_device->mode_flags &= ~MIPI_DSI_MODE_LPM; |
|
| 111 | type = *data++; |
146 | else |
| 112 | 147 | dsi_device->mode_flags |= MIPI_DSI_MODE_LPM; |
|
| 113 | len = *((u16 *) data); |
148 | |
| 114 | data += 2; |
149 | dsi_device->channel = (flags >> MIPI_VIRTUAL_CHANNEL_SHIFT) & 3; |
| 115 | 150 | ||
| 116 | switch (type) { |
151 | switch (type) { |
| 117 | case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: |
152 | case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: |
| 118 | dsi_vc_generic_write_0(intel_dsi, vc); |
153 | mipi_dsi_generic_write(dsi_device, NULL, 0); |
| 119 | break; |
154 | break; |
| 120 | case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM: |
155 | case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM: |
| 121 | dsi_vc_generic_write_1(intel_dsi, vc, *data); |
156 | mipi_dsi_generic_write(dsi_device, data, 1); |
| 122 | break; |
157 | break; |
| 123 | case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM: |
158 | case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM: |
| 124 | dsi_vc_generic_write_2(intel_dsi, vc, *data, *(data + 1)); |
159 | mipi_dsi_generic_write(dsi_device, data, 2); |
| 125 | break; |
160 | break; |
| 126 | case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM: |
161 | case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM: |
| 127 | case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM: |
162 | case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM: |
| 128 | case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM: |
163 | case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM: |
| 129 | DRM_DEBUG_DRIVER("Generic Read not yet implemented or used\n"); |
164 | DRM_DEBUG_DRIVER("Generic Read not yet implemented or used\n"); |
| 130 | break; |
165 | break; |
| 131 | case MIPI_DSI_GENERIC_LONG_WRITE: |
166 | case MIPI_DSI_GENERIC_LONG_WRITE: |
| 132 | dsi_vc_generic_write(intel_dsi, vc, data, len); |
167 | mipi_dsi_generic_write(dsi_device, data, len); |
| 133 | break; |
168 | break; |
| 134 | case MIPI_DSI_DCS_SHORT_WRITE: |
169 | case MIPI_DSI_DCS_SHORT_WRITE: |
| 135 | dsi_vc_dcs_write_0(intel_dsi, vc, *data); |
170 | mipi_dsi_dcs_write_buffer(dsi_device, data, 1); |
| 136 | break; |
171 | break; |
| 137 | case MIPI_DSI_DCS_SHORT_WRITE_PARAM: |
172 | case MIPI_DSI_DCS_SHORT_WRITE_PARAM: |
| 138 | dsi_vc_dcs_write_1(intel_dsi, vc, *data, *(data + 1)); |
173 | mipi_dsi_dcs_write_buffer(dsi_device, data, 2); |
| 139 | break; |
174 | break; |
| 140 | case MIPI_DSI_DCS_READ: |
175 | case MIPI_DSI_DCS_READ: |
| 141 | DRM_DEBUG_DRIVER("DCS Read not yet implemented or used\n"); |
176 | DRM_DEBUG_DRIVER("DCS Read not yet implemented or used\n"); |
| Line -... | Line 177... | ||
| - | 177 | break; |
|
| 142 | break; |
178 | case MIPI_DSI_DCS_LONG_WRITE: |
| Line 143... | Line 179... | ||
| 143 | case MIPI_DSI_DCS_LONG_WRITE: |
179 | mipi_dsi_dcs_write_buffer(dsi_device, data, len); |
| 144 | dsi_vc_dcs_write(intel_dsi, vc, data, len); |
180 | break; |
| Line 145... | Line 181... | ||
| 145 | break; |
181 | } |
| 146 | } |
182 | |
| 147 | 183 | out: |
|
| Line 148... | Line 184... | ||
| 148 | data += len; |
184 | data += len; |
| 149 | 185 | ||
| Line 150... | Line 186... | ||
| 150 | return data; |
186 | return data; |
| 151 | } |
187 | } |
| Line 152... | Line 188... | ||
| 152 | 188 | ||
| 153 | static u8 *mipi_exec_delay(struct intel_dsi *intel_dsi, u8 *data) |
189 | static const u8 *mipi_exec_delay(struct intel_dsi *intel_dsi, const u8 *data) |
| 154 | { |
190 | { |
| 155 | u32 delay = *((u32 *) data); |
191 | u32 delay = *((const u32 *) data); |
| 156 | 192 | ||
| 157 | usleep_range(delay, delay + 10); |
193 | usleep_range(delay, delay + 10); |
| Line 174... | Line 210... | ||
| 174 | action = *data++; |
210 | action = *data++; |
| Line 175... | Line 211... | ||
| 175 | 211 | ||
| 176 | function = gtable[gpio].function_reg; |
212 | function = gtable[gpio].function_reg; |
| Line 177... | Line 213... | ||
| 177 | pad = gtable[gpio].pad_reg; |
213 | pad = gtable[gpio].pad_reg; |
| 178 | 214 | ||
| 179 | mutex_lock(&dev_priv->dpio_lock); |
215 | mutex_lock(&dev_priv->sb_lock); |
| 180 | if (!gtable[gpio].init) { |
216 | if (!gtable[gpio].init) { |
| 181 | /* program the function */ |
217 | /* program the function */ |
| 182 | /* FIXME: remove constant below */ |
218 | /* FIXME: remove constant below */ |
| Line 186... | Line 222... | ||
| 186 | 222 | ||
| Line 187... | Line 223... | ||
| 187 | val = 0x4 | action; |
223 | val = 0x4 | action; |
| 188 | 224 | ||
| 189 | /* pull up/down */ |
225 | /* pull up/down */ |
| Line 190... | Line 226... | ||
| 190 | vlv_gpio_nc_write(dev_priv, pad, val); |
226 | vlv_gpio_nc_write(dev_priv, pad, val); |
| 191 | mutex_unlock(&dev_priv->dpio_lock); |
227 | mutex_unlock(&dev_priv->sb_lock); |
| Line 192... | Line 228... | ||
| 192 | 228 | ||
| - | 229 | return data; |
|
| 193 | return data; |
230 | } |
| 194 | } |
231 | |
| 195 | 232 | typedef const u8 * (*fn_mipi_elem_exec)(struct intel_dsi *intel_dsi, |
|
| 196 | typedef u8 * (*fn_mipi_elem_exec)(struct intel_dsi *intel_dsi, u8 *data); |
233 | const u8 *data); |
| 197 | static const fn_mipi_elem_exec exec_elem[] = { |
234 | static const fn_mipi_elem_exec exec_elem[] = { |
| Line 215... | Line 252... | ||
| 215 | "MIPI_SEQ_DISPLAY_ON", |
252 | "MIPI_SEQ_DISPLAY_ON", |
| 216 | "MIPI_SEQ_DISPLAY_OFF", |
253 | "MIPI_SEQ_DISPLAY_OFF", |
| 217 | "MIPI_SEQ_DEASSERT_RESET" |
254 | "MIPI_SEQ_DEASSERT_RESET" |
| 218 | }; |
255 | }; |
| Line 219... | Line 256... | ||
| 219 | 256 | ||
| 220 | static void generic_exec_sequence(struct intel_dsi *intel_dsi, char *sequence) |
257 | static void generic_exec_sequence(struct intel_dsi *intel_dsi, const u8 *data) |
| 221 | { |
- | |
| 222 | u8 *data = sequence; |
258 | { |
| 223 | fn_mipi_elem_exec mipi_elem_exec; |
259 | fn_mipi_elem_exec mipi_elem_exec; |
| Line 224... | Line 260... | ||
| 224 | int index; |
260 | int index; |
| 225 | 261 | ||
| Line 226... | Line 262... | ||
| 226 | if (!sequence) |
262 | if (!data) |
| Line 227... | Line 263... | ||
| 227 | return; |
263 | return; |
| Line 254... | Line 290... | ||
| 254 | if (*data == 0x00) |
290 | if (*data == 0x00) |
| 255 | break; |
291 | break; |
| 256 | } |
292 | } |
| 257 | } |
293 | } |
| Line -... | Line 294... | ||
| - | 294 | ||
| - | 295 | static int vbt_panel_prepare(struct drm_panel *panel) |
|
| - | 296 | { |
|
| - | 297 | struct vbt_panel *vbt_panel = to_vbt_panel(panel); |
|
| - | 298 | struct intel_dsi *intel_dsi = vbt_panel->intel_dsi; |
|
| - | 299 | struct drm_device *dev = intel_dsi->base.base.dev; |
|
| - | 300 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
| - | 301 | const u8 *sequence; |
|
| - | 302 | ||
| - | 303 | sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET]; |
|
| - | 304 | generic_exec_sequence(intel_dsi, sequence); |
|
| - | 305 | ||
| - | 306 | sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; |
|
| - | 307 | generic_exec_sequence(intel_dsi, sequence); |
|
| - | 308 | ||
| - | 309 | return 0; |
|
| - | 310 | } |
|
| - | 311 | ||
| - | 312 | static int vbt_panel_unprepare(struct drm_panel *panel) |
|
| - | 313 | { |
|
| - | 314 | struct vbt_panel *vbt_panel = to_vbt_panel(panel); |
|
| - | 315 | struct intel_dsi *intel_dsi = vbt_panel->intel_dsi; |
|
| - | 316 | struct drm_device *dev = intel_dsi->base.base.dev; |
|
| - | 317 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
| - | 318 | const u8 *sequence; |
|
| - | 319 | ||
| - | 320 | sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]; |
|
| - | 321 | generic_exec_sequence(intel_dsi, sequence); |
|
| - | 322 | ||
| - | 323 | return 0; |
|
| - | 324 | } |
|
| - | 325 | ||
| - | 326 | static int vbt_panel_enable(struct drm_panel *panel) |
|
| - | 327 | { |
|
| - | 328 | struct vbt_panel *vbt_panel = to_vbt_panel(panel); |
|
| - | 329 | struct intel_dsi *intel_dsi = vbt_panel->intel_dsi; |
|
| - | 330 | struct drm_device *dev = intel_dsi->base.base.dev; |
|
| - | 331 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
| - | 332 | const u8 *sequence; |
|
| - | 333 | ||
| - | 334 | sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]; |
|
| - | 335 | generic_exec_sequence(intel_dsi, sequence); |
|
| - | 336 | ||
| - | 337 | return 0; |
|
| - | 338 | } |
|
| - | 339 | ||
| - | 340 | static int vbt_panel_disable(struct drm_panel *panel) |
|
| - | 341 | { |
|
| - | 342 | struct vbt_panel *vbt_panel = to_vbt_panel(panel); |
|
| - | 343 | struct intel_dsi *intel_dsi = vbt_panel->intel_dsi; |
|
| - | 344 | struct drm_device *dev = intel_dsi->base.base.dev; |
|
| - | 345 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
| - | 346 | const u8 *sequence; |
|
| - | 347 | ||
| - | 348 | sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_OFF]; |
|
| - | 349 | generic_exec_sequence(intel_dsi, sequence); |
|
| - | 350 | ||
| - | 351 | return 0; |
|
| - | 352 | } |
|
| - | 353 | ||
| - | 354 | static int vbt_panel_get_modes(struct drm_panel *panel) |
|
| - | 355 | { |
|
| - | 356 | struct vbt_panel *vbt_panel = to_vbt_panel(panel); |
|
| - | 357 | struct intel_dsi *intel_dsi = vbt_panel->intel_dsi; |
|
| - | 358 | struct drm_device *dev = intel_dsi->base.base.dev; |
|
| - | 359 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
| - | 360 | struct drm_display_mode *mode; |
|
| - | 361 | ||
| - | 362 | if (!panel->connector) |
|
| - | 363 | return 0; |
|
| - | 364 | ||
| - | 365 | mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode); |
|
| - | 366 | if (!mode) |
|
| - | 367 | return 0; |
|
| - | 368 | ||
| - | 369 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
|
| - | 370 | ||
| - | 371 | drm_mode_probed_add(panel->connector, mode); |
|
| - | 372 | ||
| - | 373 | return 1; |
|
| - | 374 | } |
|
| - | 375 | ||
| - | 376 | static const struct drm_panel_funcs vbt_panel_funcs = { |
|
| - | 377 | .disable = vbt_panel_disable, |
|
| - | 378 | .unprepare = vbt_panel_unprepare, |
|
| - | 379 | .prepare = vbt_panel_prepare, |
|
| - | 380 | .enable = vbt_panel_enable, |
|
| - | 381 | .get_modes = vbt_panel_get_modes, |
|
| - | 382 | }; |
|
| 258 | 383 | ||
| 259 | static bool generic_init(struct intel_dsi_device *dsi) |
384 | struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id) |
| 260 | { |
- | |
| 261 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
385 | { |
| 262 | struct drm_device *dev = intel_dsi->base.base.dev; |
386 | struct drm_device *dev = intel_dsi->base.base.dev; |
| 263 | struct drm_i915_private *dev_priv = dev->dev_private; |
387 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 264 | struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; |
388 | struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; |
| 265 | struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps; |
389 | struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps; |
| - | 390 | struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode; |
|
| 266 | struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode; |
391 | struct vbt_panel *vbt_panel; |
| 267 | u32 bits_per_pixel = 24; |
392 | u32 bits_per_pixel = 24; |
| 268 | u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui; |
393 | u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui; |
| 269 | u32 ui_num, ui_den; |
394 | u32 ui_num, ui_den; |
| 270 | u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt; |
395 | u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt; |
| 271 | u32 ths_prepare_ns, tclk_trail_ns; |
396 | u32 ths_prepare_ns, tclk_trail_ns; |
| 272 | u32 tclk_prepare_clkzero, ths_prepare_hszero; |
397 | u32 tclk_prepare_clkzero, ths_prepare_hszero; |
| 273 | u32 lp_to_hs_switch, hs_to_lp_switch; |
398 | u32 lp_to_hs_switch, hs_to_lp_switch; |
| 274 | u32 pclk, computed_ddr; |
399 | u32 pclk, computed_ddr; |
| - | 400 | u16 burst_mode_ratio; |
|
| Line 275... | Line 401... | ||
| 275 | u16 burst_mode_ratio; |
401 | enum port port; |
| Line 276... | Line 402... | ||
| 276 | 402 | ||
| 277 | DRM_DEBUG_KMS("\n"); |
403 | DRM_DEBUG_KMS("\n"); |
| 278 | 404 | ||
| 279 | intel_dsi->eotp_pkt = mipi_config->eot_pkt_disabled ? 0 : 1; |
405 | intel_dsi->eotp_pkt = mipi_config->eot_pkt_disabled ? 0 : 1; |
| - | 406 | intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0; |
|
| - | 407 | intel_dsi->lane_count = mipi_config->lane_cnt + 1; |
|
| Line 280... | Line 408... | ||
| 280 | intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0; |
408 | intel_dsi->pixel_format = mipi_config->videomode_color_format << 7; |
| 281 | intel_dsi->lane_count = mipi_config->lane_cnt + 1; |
409 | intel_dsi->dual_link = mipi_config->dual_link; |
| 282 | intel_dsi->pixel_format = mipi_config->videomode_color_format << 7; |
410 | intel_dsi->pixel_overlap = mipi_config->pixel_overlap; |
| 283 | 411 | ||
| Line 297... | Line 425... | ||
| 297 | intel_dsi->video_frmt_cfg_bits = |
425 | intel_dsi->video_frmt_cfg_bits = |
| 298 | mipi_config->bta_enabled ? DISABLE_VIDEO_BTA : 0; |
426 | mipi_config->bta_enabled ? DISABLE_VIDEO_BTA : 0; |
| Line 299... | Line 427... | ||
| 299 | 427 | ||
| Line -... | Line 428... | ||
| - | 428 | pclk = mode->clock; |
|
| - | 429 | ||
| - | 430 | /* In dual link mode each port needs half of pixel clock */ |
|
| - | 431 | if (intel_dsi->dual_link) { |
|
| - | 432 | pclk = pclk / 2; |
|
| - | 433 | ||
| - | 434 | /* we can enable pixel_overlap if needed by panel. In this |
|
| - | 435 | * case we need to increase the pixelclock for extra pixels |
|
| - | 436 | */ |
|
| - | 437 | if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) { |
|
| - | 438 | pclk += DIV_ROUND_UP(mode->vtotal * |
|
| - | 439 | intel_dsi->pixel_overlap * |
|
| - | 440 | 60, 1000); |
|
| - | 441 | } |
|
| 300 | pclk = mode->clock; |
442 | } |
| 301 | 443 | ||
| 302 | /* Burst Mode Ratio |
444 | /* Burst Mode Ratio |
| 303 | * Target ddr frequency from VBT / non burst ddr freq |
445 | * Target ddr frequency from VBT / non burst ddr freq |
| 304 | * multiply by 100 to preserve remainder |
446 | * multiply by 100 to preserve remainder |
| Line 309... | Line 451... | ||
| 309 | (pclk * bits_per_pixel) / intel_dsi->lane_count; |
451 | (pclk * bits_per_pixel) / intel_dsi->lane_count; |
| Line 310... | Line 452... | ||
| 310 | 452 | ||
| 311 | if (mipi_config->target_burst_mode_freq < |
453 | if (mipi_config->target_burst_mode_freq < |
| 312 | computed_ddr) { |
454 | computed_ddr) { |
| 313 | DRM_ERROR("Burst mode freq is less than computed\n"); |
455 | DRM_ERROR("Burst mode freq is less than computed\n"); |
| 314 | return false; |
456 | return NULL; |
| Line 315... | Line 457... | ||
| 315 | } |
457 | } |
| 316 | 458 | ||
| 317 | burst_mode_ratio = DIV_ROUND_UP( |
459 | burst_mode_ratio = DIV_ROUND_UP( |
| Line 318... | Line 460... | ||
| 318 | mipi_config->target_burst_mode_freq * 100, |
460 | mipi_config->target_burst_mode_freq * 100, |
| 319 | computed_ddr); |
461 | computed_ddr); |
| 320 | 462 | ||
| 321 | pclk = DIV_ROUND_UP(pclk * burst_mode_ratio, 100); |
463 | pclk = DIV_ROUND_UP(pclk * burst_mode_ratio, 100); |
| 322 | } else { |
464 | } else { |
| 323 | DRM_ERROR("Burst mode target is not set\n"); |
465 | DRM_ERROR("Burst mode target is not set\n"); |
| 324 | return false; |
466 | return NULL; |
| Line 325... | Line 467... | ||
| 325 | } |
467 | } |
| Line 491... | Line 633... | ||
| 491 | 633 | ||
| 492 | DRM_DEBUG_KMS("Eot %s\n", intel_dsi->eotp_pkt ? "enabled" : "disabled"); |
634 | DRM_DEBUG_KMS("Eot %s\n", intel_dsi->eotp_pkt ? "enabled" : "disabled"); |
| 493 | DRM_DEBUG_KMS("Clockstop %s\n", intel_dsi->clock_stop ? |
635 | DRM_DEBUG_KMS("Clockstop %s\n", intel_dsi->clock_stop ? |
| 494 | "disabled" : "enabled"); |
636 | "disabled" : "enabled"); |
| - | 637 | DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video"); |
|
| - | 638 | if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) |
|
| - | 639 | DRM_DEBUG_KMS("Dual link: DSI_DUAL_LINK_FRONT_BACK\n"); |
|
| - | 640 | else if (intel_dsi->dual_link == DSI_DUAL_LINK_PIXEL_ALT) |
|
| - | 641 | DRM_DEBUG_KMS("Dual link: DSI_DUAL_LINK_PIXEL_ALT\n"); |
|
| - | 642 | else |
|
| 495 | DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video"); |
643 | DRM_DEBUG_KMS("Dual link: NONE\n"); |
| 496 | DRM_DEBUG_KMS("Pixel Format %d\n", intel_dsi->pixel_format); |
644 | DRM_DEBUG_KMS("Pixel Format %d\n", intel_dsi->pixel_format); |
| 497 | DRM_DEBUG_KMS("TLPX %d\n", intel_dsi->escape_clk_div); |
645 | DRM_DEBUG_KMS("TLPX %d\n", intel_dsi->escape_clk_div); |
| 498 | DRM_DEBUG_KMS("LP RX Timeout 0x%x\n", intel_dsi->lp_rx_timeout); |
646 | DRM_DEBUG_KMS("LP RX Timeout 0x%x\n", intel_dsi->lp_rx_timeout); |
| 499 | DRM_DEBUG_KMS("Turnaround Timeout 0x%x\n", intel_dsi->turn_arnd_val); |
647 | DRM_DEBUG_KMS("Turnaround Timeout 0x%x\n", intel_dsi->turn_arnd_val); |
| Line 514... | Line 662... | ||
| 514 | intel_dsi->backlight_on_delay = pps->bl_enable_delay / 10; |
662 | intel_dsi->backlight_on_delay = pps->bl_enable_delay / 10; |
| 515 | intel_dsi->panel_on_delay = pps->panel_on_delay / 10; |
663 | intel_dsi->panel_on_delay = pps->panel_on_delay / 10; |
| 516 | intel_dsi->panel_off_delay = pps->panel_off_delay / 10; |
664 | intel_dsi->panel_off_delay = pps->panel_off_delay / 10; |
| 517 | intel_dsi->panel_pwr_cycle_delay = pps->panel_power_cycle_delay / 10; |
665 | intel_dsi->panel_pwr_cycle_delay = pps->panel_power_cycle_delay / 10; |
| Line 518... | Line -... | ||
| 518 | - | ||
| 519 | return true; |
- | |
| 520 | } |
- | |
| 521 | - | ||
| 522 | static int generic_mode_valid(struct intel_dsi_device *dsi, |
- | |
| 523 | struct drm_display_mode *mode) |
- | |
| 524 | { |
- | |
| 525 | return MODE_OK; |
- | |
| 526 | } |
- | |
| 527 | - | ||
| 528 | static bool generic_mode_fixup(struct intel_dsi_device *dsi, |
- | |
| 529 | const struct drm_display_mode *mode, |
- | |
| 530 | struct drm_display_mode *adjusted_mode) { |
- | |
| 531 | return true; |
- | |
| 532 | } |
- | |
| 533 | - | ||
| 534 | static void generic_panel_reset(struct intel_dsi_device *dsi) |
- | |
| 535 | { |
- | |
| 536 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
- | |
| 537 | struct drm_device *dev = intel_dsi->base.base.dev; |
- | |
| 538 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
| 539 | - | ||
| 540 | char *sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET]; |
- | |
| 541 | - | ||
| 542 | generic_exec_sequence(intel_dsi, sequence); |
- | |
| 543 | } |
- | |
| 544 | - | ||
| 545 | static void generic_disable_panel_power(struct intel_dsi_device *dsi) |
- | |
| 546 | { |
- | |
| 547 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
- | |
| 548 | struct drm_device *dev = intel_dsi->base.base.dev; |
- | |
| 549 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
| 550 | - | ||
| 551 | char *sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]; |
- | |
| 552 | - | ||
| 553 | generic_exec_sequence(intel_dsi, sequence); |
- | |
| 554 | } |
- | |
| 555 | - | ||
| 556 | static void generic_send_otp_cmds(struct intel_dsi_device *dsi) |
- | |
| 557 | { |
- | |
| 558 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
- | |
| 559 | struct drm_device *dev = intel_dsi->base.base.dev; |
- | |
| 560 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
| 561 | - | ||
| 562 | char *sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; |
- | |
| 563 | 666 | ||
| 564 | generic_exec_sequence(intel_dsi, sequence); |
- | |
| 565 | } |
- | |
| 566 | 667 | /* This is cheating a bit with the cleanup. */ |
|
| 567 | static void generic_enable(struct intel_dsi_device *dsi) |
- | |
| 568 | { |
- | |
| 569 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
- | |
| 570 | struct drm_device *dev = intel_dsi->base.base.dev; |
- | |
| 571 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
| 572 | - | ||
| 573 | char *sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]; |
- | |
| 574 | - | ||
| 575 | generic_exec_sequence(intel_dsi, sequence); |
- | |
| 576 | } |
- | |
| 577 | - | ||
| 578 | static void generic_disable(struct intel_dsi_device *dsi) |
- | |
| 579 | { |
- | |
| 580 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
- | |
| 581 | struct drm_device *dev = intel_dsi->base.base.dev; |
- | |
| 582 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
| 583 | - | ||
| Line 584... | Line 668... | ||
| 584 | char *sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_OFF]; |
668 | vbt_panel = kzalloc(sizeof(*vbt_panel), GFP_KERNEL); |
| 585 | - | ||
| - | 669 | ||
| - | 670 | vbt_panel->intel_dsi = intel_dsi; |
|
| - | 671 | drm_panel_init(&vbt_panel->panel); |
|
| Line 586... | Line 672... | ||
| 586 | generic_exec_sequence(intel_dsi, sequence); |
672 | vbt_panel->panel.funcs = &vbt_panel_funcs; |
| 587 | } |
- | |
| 588 | 673 | drm_panel_add(&vbt_panel->panel); |
|
| - | 674 | ||
| 589 | static enum drm_connector_status generic_detect(struct intel_dsi_device *dsi) |
675 | /* a regular driver would get the device in probe */ |
| Line 590... | Line -... | ||
| 590 | { |
- | |
| 591 | return connector_status_connected; |
- | |
| 592 | } |
676 | for_each_dsi_port(port, intel_dsi->ports) { |
| 593 | 677 | mipi_dsi_attach(intel_dsi->dsi_hosts[port]->device); |
|
| 594 | static bool generic_get_hw_state(struct intel_dsi_device *dev) |
- | |
| 595 | { |
- | |
| 596 | return true; |
- | |
| 597 | } |
- | |
| 598 | - | ||
| 599 | static struct drm_display_mode *generic_get_modes(struct intel_dsi_device *dsi) |
- | |
| 600 | { |
- | |
| 601 | struct intel_dsi *intel_dsi = container_of(dsi, struct intel_dsi, dev); |
- | |
| 602 | struct drm_device *dev = intel_dsi->base.base.dev; |
- | |
| 603 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
| 604 | - | ||
| 605 | dev_priv->vbt.lfp_lvds_vbt_mode->type |= DRM_MODE_TYPE_PREFERRED; |
- | |
| 606 | return dev_priv->vbt.lfp_lvds_vbt_mode; |
- | |
| 607 | } |
- | |
| 608 | - | ||
| 609 | static void generic_destroy(struct intel_dsi_device *dsi) { } |
- | |
| 610 | - | ||
| 611 | /* Callbacks. We might not need them all. */ |
- | |
| 612 | struct intel_dsi_dev_ops vbt_generic_dsi_display_ops = { |
- | |
| 613 | .init = generic_init, |
- | |
| 614 | .mode_valid = generic_mode_valid, |
- | |
| 615 | .mode_fixup = generic_mode_fixup, |
- | |
| 616 | .panel_reset = generic_panel_reset, |
- | |
| 617 | .disable_panel_power = generic_disable_panel_power, |
- | |
| 618 | .send_otp_cmds = generic_send_otp_cmds, |
- | |
| 619 | .enable = generic_enable, |
- | |
| 620 | .disable = generic_disable, |
- | |
| 621 | .detect = generic_detect, |
- | |