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Rev 5060 | Rev 5354 | ||
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Line 269... | Line 269... | ||
269 | u32 ui_num, ui_den; |
269 | u32 ui_num, ui_den; |
270 | u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt; |
270 | u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt; |
271 | u32 ths_prepare_ns, tclk_trail_ns; |
271 | u32 ths_prepare_ns, tclk_trail_ns; |
272 | u32 tclk_prepare_clkzero, ths_prepare_hszero; |
272 | u32 tclk_prepare_clkzero, ths_prepare_hszero; |
273 | u32 lp_to_hs_switch, hs_to_lp_switch; |
273 | u32 lp_to_hs_switch, hs_to_lp_switch; |
- | 274 | u32 pclk, computed_ddr; |
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- | 275 | u16 burst_mode_ratio; |
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Line 274... | Line 276... | ||
274 | 276 | ||
Line 275... | Line 277... | ||
275 | DRM_DEBUG_KMS("\n"); |
277 | DRM_DEBUG_KMS("\n"); |
276 | 278 | ||
Line 282... | Line 284... | ||
282 | if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666) |
284 | if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666) |
283 | bits_per_pixel = 18; |
285 | bits_per_pixel = 18; |
284 | else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565) |
286 | else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565) |
285 | bits_per_pixel = 16; |
287 | bits_per_pixel = 16; |
Line 286... | Line -... | ||
286 | - | ||
287 | bitrate = (mode->clock * bits_per_pixel) / intel_dsi->lane_count; |
- | |
288 | 288 | ||
289 | intel_dsi->operation_mode = mipi_config->is_cmd_mode; |
289 | intel_dsi->operation_mode = mipi_config->is_cmd_mode; |
290 | intel_dsi->video_mode_format = mipi_config->video_transfer_mode; |
290 | intel_dsi->video_mode_format = mipi_config->video_transfer_mode; |
291 | intel_dsi->escape_clk_div = mipi_config->byte_clk_sel; |
291 | intel_dsi->escape_clk_div = mipi_config->byte_clk_sel; |
292 | intel_dsi->lp_rx_timeout = mipi_config->lp_rx_timeout; |
292 | intel_dsi->lp_rx_timeout = mipi_config->lp_rx_timeout; |
Line 295... | Line 295... | ||
295 | intel_dsi->init_count = mipi_config->master_init_timer; |
295 | intel_dsi->init_count = mipi_config->master_init_timer; |
296 | intel_dsi->bw_timer = mipi_config->dbi_bw_timer; |
296 | intel_dsi->bw_timer = mipi_config->dbi_bw_timer; |
297 | intel_dsi->video_frmt_cfg_bits = |
297 | intel_dsi->video_frmt_cfg_bits = |
298 | mipi_config->bta_enabled ? DISABLE_VIDEO_BTA : 0; |
298 | mipi_config->bta_enabled ? DISABLE_VIDEO_BTA : 0; |
Line -... | Line 299... | ||
- | 299 | ||
- | 300 | pclk = mode->clock; |
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- | 301 | ||
- | 302 | /* Burst Mode Ratio |
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- | 303 | * Target ddr frequency from VBT / non burst ddr freq |
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- | 304 | * multiply by 100 to preserve remainder |
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- | 305 | */ |
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- | 306 | if (intel_dsi->video_mode_format == VIDEO_MODE_BURST) { |
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- | 307 | if (mipi_config->target_burst_mode_freq) { |
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- | 308 | computed_ddr = |
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- | 309 | (pclk * bits_per_pixel) / intel_dsi->lane_count; |
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- | 310 | ||
- | 311 | if (mipi_config->target_burst_mode_freq < |
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- | 312 | computed_ddr) { |
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- | 313 | DRM_ERROR("Burst mode freq is less than computed\n"); |
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- | 314 | return false; |
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- | 315 | } |
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- | 316 | ||
- | 317 | burst_mode_ratio = DIV_ROUND_UP( |
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- | 318 | mipi_config->target_burst_mode_freq * 100, |
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- | 319 | computed_ddr); |
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- | 320 | ||
- | 321 | pclk = DIV_ROUND_UP(pclk * burst_mode_ratio, 100); |
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- | 322 | } else { |
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- | 323 | DRM_ERROR("Burst mode target is not set\n"); |
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- | 324 | return false; |
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- | 325 | } |
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- | 326 | } else |
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- | 327 | burst_mode_ratio = 100; |
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- | 328 | ||
- | 329 | intel_dsi->burst_mode_ratio = burst_mode_ratio; |
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- | 330 | intel_dsi->pclk = pclk; |
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- | 331 | ||
- | 332 | bitrate = (pclk * bits_per_pixel) / intel_dsi->lane_count; |
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299 | 333 | ||
300 | switch (intel_dsi->escape_clk_div) { |
334 | switch (intel_dsi->escape_clk_div) { |
301 | case 0: |
335 | case 0: |
302 | tlpx_ns = 50; |
336 | tlpx_ns = 50; |
303 | break; |
337 | break; |