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29 | #include "intel_drv.h" |
29 | #include "intel_drv.h" |
Line 30... | Line 30... | ||
30 | 30 | ||
31 | struct intel_dsi_device { |
31 | struct intel_dsi_device { |
32 | unsigned int panel_id; |
32 | unsigned int panel_id; |
33 | const char *name; |
- | |
34 | int type; |
33 | const char *name; |
35 | const struct intel_dsi_dev_ops *dev_ops; |
34 | const struct intel_dsi_dev_ops *dev_ops; |
36 | void *dev_priv; |
35 | void *dev_priv; |
Line 37... | Line 36... | ||
37 | }; |
36 | }; |
Line 83... | Line 82... | ||
83 | bool hs; |
82 | bool hs; |
Line 84... | Line 83... | ||
84 | 83 | ||
85 | /* virtual channel */ |
84 | /* virtual channel */ |
Line -... | Line 85... | ||
- | 85 | int channel; |
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- | 86 | ||
- | 87 | /* Video mode or command mode */ |
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86 | int channel; |
88 | u16 operation_mode; |
87 | 89 | ||
Line 88... | Line 90... | ||
88 | /* number of DSI lanes */ |
90 | /* number of DSI lanes */ |
89 | unsigned int lane_count; |
91 | unsigned int lane_count; |
Line 90... | Line 92... | ||
90 | 92 | ||
91 | /* video mode pixel format for MIPI_DSI_FUNC_PRG register */ |
93 | /* video mode pixel format for MIPI_DSI_FUNC_PRG register */ |
Line 92... | Line 94... | ||
92 | u32 pixel_format; |
94 | u32 pixel_format; |
93 | 95 | ||
- | 96 | /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ |
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Line -... | Line 97... | ||
- | 97 | u32 video_mode_format; |
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94 | /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ |
98 | |
95 | u32 video_mode_format; |
99 | /* eot for MIPI_EOT_DISABLE register */ |
96 | 100 | u8 eotp_pkt; |
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97 | /* eot for MIPI_EOT_DISABLE register */ |
101 | u8 clock_stop; |
98 | u32 eot_disable; |
102 | |
Line 108... | Line 112... | ||
108 | u16 turn_arnd_val; |
112 | u16 turn_arnd_val; |
109 | u16 rst_timer_val; |
113 | u16 rst_timer_val; |
110 | u16 hs_to_lp_count; |
114 | u16 hs_to_lp_count; |
111 | u16 clk_lp_to_hs_count; |
115 | u16 clk_lp_to_hs_count; |
112 | u16 clk_hs_to_lp_count; |
116 | u16 clk_hs_to_lp_count; |
- | 117 | ||
- | 118 | u16 init_count; |
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- | 119 | ||
- | 120 | /* all delays in ms */ |
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- | 121 | u16 backlight_off_delay; |
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- | 122 | u16 backlight_on_delay; |
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- | 123 | u16 panel_on_delay; |
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- | 124 | u16 panel_off_delay; |
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- | 125 | u16 panel_pwr_cycle_delay; |
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113 | }; |
126 | }; |
Line 114... | Line 127... | ||
114 | 127 | ||
115 | static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) |
128 | static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) |
116 | { |
129 | { |
117 | return container_of(encoder, struct intel_dsi, base.base); |
130 | return container_of(encoder, struct intel_dsi, base.base); |
Line 118... | Line 131... | ||
118 | } |
131 | } |
119 | 132 | ||
- | 133 | extern void vlv_enable_dsi_pll(struct intel_encoder *encoder); |
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- | 134 | extern void vlv_disable_dsi_pll(struct intel_encoder *encoder); |
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- | 135 | extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp); |
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Line 120... | Line 136... | ||
120 | extern void vlv_enable_dsi_pll(struct intel_encoder *encoder); |
136 |