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Line 31... Line 31...
31
#include 
31
#include 
32
#include "i915_drv.h"
32
#include "i915_drv.h"
33
#include 
33
#include 
34
#include 
34
#include 
35
#include 
35
#include 
-
 
36
#include 
36
#include 
37
#include 
37
#include 
38
#include 
38
#include 
39
#include 
Line 39... Line 40...
39
 
40
 
Line 245... Line 246...
245
 
246
 
246
struct intel_atomic_state {
247
struct intel_atomic_state {
Line 247... Line 248...
247
	struct drm_atomic_state base;
248
	struct drm_atomic_state base;
-
 
249
 
-
 
250
	unsigned int cdclk;
-
 
251
 
-
 
252
	/*
-
 
253
	 * Calculated device cdclk, can be different from cdclk
-
 
254
	 * only when all crtc's are DPMS off.
-
 
255
	 */
248
 
256
	unsigned int dev_cdclk;
-
 
257
 
-
 
258
	bool dpll_set, modeset;
-
 
259
 
-
 
260
	unsigned int active_crtcs;
249
	unsigned int cdclk;
261
	unsigned int min_pixclk[I915_MAX_PIPES];
250
	bool dpll_set;
262
 
251
	struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
263
	struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
Line 252... Line 264...
252
	struct intel_wm_config wm_config;
264
	struct intel_wm_config wm_config;
Line 367... Line 379...
367
	unsigned long quirks;
379
	unsigned long quirks;
Line 368... Line 380...
368
 
380
 
369
	bool update_pipe; /* can a fast modeset be performed? */
381
	bool update_pipe; /* can a fast modeset be performed? */
370
	bool disable_cxsr;
382
	bool disable_cxsr;
-
 
383
	bool update_wm_pre, update_wm_post; /* watermarks are updated */
Line 371... Line 384...
371
	bool update_wm_pre, update_wm_post; /* watermarks are updated */
384
	bool fb_changed; /* fb on any of the planes is changed */
372
 
385
 
373
	/* Pipe source size (ie. panel fitter input size)
386
	/* Pipe source size (ie. panel fitter input size)
374
	 * All planes will be positioned inside this space,
387
	 * All planes will be positioned inside this space,
Line 480... Line 493...
480
	int fdi_lanes;
493
	int fdi_lanes;
481
	struct intel_link_m_n fdi_m_n;
494
	struct intel_link_m_n fdi_m_n;
Line 482... Line 495...
482
 
495
 
Line -... Line 496...
-
 
496
	bool ips_enabled;
-
 
497
 
483
	bool ips_enabled;
498
	bool enable_fbc;
Line 484... Line 499...
484
 
499
 
485
	bool double_wide;
500
	bool double_wide;
Line 530... Line 545...
530
 * These are generally operations that grab mutexes or might otherwise sleep
545
 * These are generally operations that grab mutexes or might otherwise sleep
531
 * and thus can't be run with interrupts disabled.
546
 * and thus can't be run with interrupts disabled.
532
 */
547
 */
533
struct intel_crtc_atomic_commit {
548
struct intel_crtc_atomic_commit {
534
	/* Sleepable operations to perform before commit */
549
	/* Sleepable operations to perform before commit */
535
	bool disable_fbc;
-
 
536
	bool disable_ips;
-
 
537
	bool pre_disable_primary;
-
 
Line 538... Line 550...
538
 
550
 
539
	/* Sleepable operations to perform after commit */
551
	/* Sleepable operations to perform after commit */
540
	unsigned fb_bits;
-
 
541
	bool wait_vblank;
-
 
542
	bool update_fbc;
552
	unsigned fb_bits;
-
 
553
	bool post_enable_primary;
-
 
554
 
543
	bool post_enable_primary;
555
	/* Sleepable operations to perform before and after commit */
544
	unsigned update_sprite_watermarks;
556
	bool update_fbc;
Line 545... Line 557...
545
};
557
};
546
 
558
 
547
struct intel_crtc {
559
struct intel_crtc {
Line 563... Line 575...
563
	atomic_t unpin_work_count;
575
	atomic_t unpin_work_count;
Line 564... Line 576...
564
 
576
 
565
	/* Display surface base address adjustement for pageflips. Note that on
577
	/* Display surface base address adjustement for pageflips. Note that on
566
	 * gen4+ this only adjusts up to a tile, offsets within a tile are
578
	 * gen4+ this only adjusts up to a tile, offsets within a tile are
567
	 * handled in the hw itself (with the TILEOFF register). */
579
	 * handled in the hw itself (with the TILEOFF register). */
568
	unsigned long dspaddr_offset;
580
	u32 dspaddr_offset;
569
	int adjusted_x;
581
	int adjusted_x;
Line 570... Line 582...
570
	int adjusted_y;
582
	int adjusted_y;
571
 
583
 
Line 646... Line 658...
646
	struct intel_plane_wm_parameters wm;
658
	struct intel_plane_wm_parameters wm;
Line 647... Line 659...
647
 
659
 
648
	/*
660
	/*
649
	 * NOTE: Do not place new plane state fields here (e.g., when adding
661
	 * NOTE: Do not place new plane state fields here (e.g., when adding
650
	 * new plane properties).  New runtime state should now be placed in
662
	 * new plane properties).  New runtime state should now be placed in
651
	 * the intel_plane_state structure and accessed via drm_plane->state.
663
	 * the intel_plane_state structure and accessed via plane_state.
Line 652... Line 664...
652
	 */
664
	 */
653
 
665
 
654
	void (*update_plane)(struct drm_plane *plane,
-
 
655
			     struct drm_crtc *crtc,
-
 
656
			     struct drm_framebuffer *fb,
666
	void (*update_plane)(struct drm_plane *plane,
657
			     int crtc_x, int crtc_y,
-
 
658
			     unsigned int crtc_w, unsigned int crtc_h,
-
 
659
			     uint32_t x, uint32_t y,
667
			     const struct intel_crtc_state *crtc_state,
660
			     uint32_t src_w, uint32_t src_h);
668
			     const struct intel_plane_state *plane_state);
661
	void (*disable_plane)(struct drm_plane *plane,
669
	void (*disable_plane)(struct drm_plane *plane,
662
			      struct drm_crtc *crtc);
670
			      struct drm_crtc *crtc);
663
	int (*check_plane)(struct drm_plane *plane,
671
	int (*check_plane)(struct drm_plane *plane,
664
			   struct intel_crtc_state *crtc_state,
-
 
665
			   struct intel_plane_state *state);
-
 
666
	void (*commit_plane)(struct drm_plane *plane,
672
			   struct intel_crtc_state *crtc_state,
Line 667... Line 673...
667
			     struct intel_plane_state *state);
673
			   struct intel_plane_state *state);
668
};
674
};
669
 
675
 
Line 697... Line 703...
697
#define intel_fb_obj(x) (x ? to_intel_framebuffer(x)->obj : NULL)
703
#define intel_fb_obj(x) (x ? to_intel_framebuffer(x)->obj : NULL)
Line 698... Line 704...
698
 
704
 
699
struct intel_hdmi {
705
struct intel_hdmi {
700
	i915_reg_t hdmi_reg;
706
	i915_reg_t hdmi_reg;
-
 
707
	int ddc_bus;
-
 
708
	struct {
-
 
709
		enum drm_dp_dual_mode_type type;
-
 
710
		int max_tmds_clock;
701
	int ddc_bus;
711
	} dp_dual_mode;
702
	bool limited_color_range;
712
	bool limited_color_range;
703
	bool color_range_auto;
713
	bool color_range_auto;
704
	bool has_hdmi_sink;
714
	bool has_hdmi_sink;
705
	bool has_audio;
715
	bool has_audio;
Line 764... Line 774...
764
	int panel_power_cycle_delay;
774
	int panel_power_cycle_delay;
765
	int backlight_on_delay;
775
	int backlight_on_delay;
766
	int backlight_off_delay;
776
	int backlight_off_delay;
767
	struct delayed_work panel_vdd_work;
777
	struct delayed_work panel_vdd_work;
768
	bool want_panel_vdd;
778
	bool want_panel_vdd;
769
	unsigned long last_power_cycle;
-
 
770
	unsigned long last_power_on;
779
	unsigned long last_power_on;
771
	unsigned long last_backlight_off;
780
	unsigned long last_backlight_off;
-
 
781
	ktime_t panel_power_off_time;
Line 772... Line 782...
772
 
782
 
Line 773... Line 783...
773
	struct notifier_block edp_notifier;
783
	struct notifier_block edp_notifier;
774
 
784
 
Line 800... Line 810...
800
				     uint32_t aux_clock_divider);
810
				     uint32_t aux_clock_divider);
Line 801... Line 811...
801
 
811
 
802
	/* This is called before a link training is starterd */
812
	/* This is called before a link training is starterd */
Line 803... Line -...
803
	void (*prepare_link_retrain)(struct intel_dp *intel_dp);
-
 
804
 
-
 
805
	bool train_set_valid;
813
	void (*prepare_link_retrain)(struct intel_dp *intel_dp);
806
 
814
 
807
	/* Displayport compliance testing */
815
	/* Displayport compliance testing */
808
	unsigned long compliance_test_type;
816
	unsigned long compliance_test_type;
809
	unsigned long compliance_test_data;
817
	unsigned long compliance_test_data;
Line 816... Line 824...
816
	u32 saved_port_bits;
824
	u32 saved_port_bits;
817
	struct intel_dp dp;
825
	struct intel_dp dp;
818
	struct intel_hdmi hdmi;
826
	struct intel_hdmi hdmi;
819
	enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
827
	enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
820
	bool release_cl2_override;
828
	bool release_cl2_override;
-
 
829
	uint8_t max_lanes;
821
	/* for communication with audio component; protected by av_mutex */
830
	/* for communication with audio component; protected by av_mutex */
822
	const struct drm_connector *audio_connector;
831
	const struct drm_connector *audio_connector;
823
};
832
};
Line 824... Line 833...
824
 
833
 
Line 902... Line 911...
902
	u32 flip_ready_vblank;
911
	u32 flip_ready_vblank;
903
	bool enable_stall_check;
912
	bool enable_stall_check;
904
};
913
};
Line 905... Line 914...
905
 
914
 
906
struct intel_load_detect_pipe {
915
struct intel_load_detect_pipe {
907
	struct drm_framebuffer *release_fb;
-
 
908
	bool load_detect_temp;
-
 
909
	int dpms_mode;
916
	struct drm_atomic_state *restore_state;
Line 910... Line 917...
910
};
917
};
911
 
918
 
912
static inline struct intel_encoder *
919
static inline struct intel_encoder *
Line 987... Line 994...
987
}
994
}
Line 988... Line 995...
988
 
995
 
989
int intel_get_crtc_scanline(struct intel_crtc *crtc);
996
int intel_get_crtc_scanline(struct intel_crtc *crtc);
990
void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
997
void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
-
 
998
				     unsigned int pipe_mask);
-
 
999
void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
Line 991... Line 1000...
991
				     unsigned int pipe_mask);
1000
				     unsigned int pipe_mask);
992
 
1001
 
Line 993... Line 1002...
993
/* intel_crt.c */
1002
/* intel_crt.c */
994
void intel_crt_init(struct drm_device *dev);
1003
void intel_crt_init(struct drm_device *dev);
995
 
1004
 
996
 
1005
 
997
/* intel_ddi.c */
1006
/* intel_ddi.c */
998
void intel_ddi_clk_select(struct intel_encoder *encoder,
1007
void intel_ddi_clk_select(struct intel_encoder *encoder,
999
			  const struct intel_crtc_state *pipe_config);
1008
			  const struct intel_crtc_state *pipe_config);
1000
void intel_prepare_ddi(struct drm_device *dev);
1009
void intel_prepare_ddi_buffer(struct intel_encoder *encoder);
1001
void hsw_fdi_link_train(struct drm_crtc *crtc);
1010
void hsw_fdi_link_train(struct drm_crtc *crtc);
Line 1038... Line 1047...
1038
				   unsigned int height,
1047
				   unsigned int height,
1039
				   uint32_t pixel_format,
1048
				   uint32_t pixel_format,
1040
				   uint64_t fb_format_modifier);
1049
				   uint64_t fb_format_modifier);
1041
void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire,
1050
void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire,
1042
			enum fb_op_origin origin);
1051
			enum fb_op_origin origin);
1043
u32 intel_fb_stride_alignment(struct drm_device *dev, uint64_t fb_modifier,
1052
u32 intel_fb_stride_alignment(const struct drm_i915_private *dev_priv,
1044
			      uint32_t pixel_format);
1053
			      uint64_t fb_modifier, uint32_t pixel_format);
Line 1045... Line 1054...
1045
 
1054
 
1046
/* intel_audio.c */
1055
/* intel_audio.c */
1047
void intel_init_audio(struct drm_device *dev);
1056
void intel_init_audio(struct drm_device *dev);
1048
void intel_audio_codec_enable(struct intel_encoder *encoder);
1057
void intel_audio_codec_enable(struct intel_encoder *encoder);
Line 1123... Line 1132...
1123
				    struct drm_property *property,
1132
				    struct drm_property *property,
1124
				    uint64_t val);
1133
				    uint64_t val);
1125
int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
1134
int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
1126
				    struct drm_plane_state *plane_state);
1135
				    struct drm_plane_state *plane_state);
Line 1127... Line -...
1127
 
-
 
1128
unsigned int
1136
 
1129
intel_tile_height(struct drm_device *dev, uint32_t pixel_format,
1137
unsigned int intel_tile_height(const struct drm_i915_private *dev_priv,
Line 1130... Line 1138...
1130
		  uint64_t fb_format_modifier, unsigned int plane);
1138
			       uint64_t fb_modifier, unsigned int cpp);
1131
 
1139
 
1132
static inline bool
1140
static inline bool
1133
intel_rotation_90_or_270(unsigned int rotation)
1141
intel_rotation_90_or_270(unsigned int rotation)
Line 1146... Line 1154...
1146
#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
1154
#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
1147
#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
1155
#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
1148
struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
1156
struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
1149
						struct intel_crtc_state *state);
1157
						struct intel_crtc_state *state);
Line 1150... Line 1158...
1150
 
1158
 
1151
void vlv_force_pll_on(struct drm_device *dev, enum pipe pipe,
1159
int vlv_force_pll_on(struct drm_device *dev, enum pipe pipe,
1152
		      const struct dpll *dpll);
1160
		     const struct dpll *dpll);
Line 1153... Line 1161...
1153
void vlv_force_pll_off(struct drm_device *dev, enum pipe pipe);
1161
void vlv_force_pll_off(struct drm_device *dev, enum pipe pipe);
1154
 
1162
 
Line 1164... Line 1172...
1164
#define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
1172
#define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
1165
#define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
1173
#define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
1166
void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
1174
void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
1167
#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
1175
#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
1168
#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
1176
#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
1169
unsigned long intel_gen4_compute_page_offset(struct drm_i915_private *dev_priv,
1177
u32 intel_compute_tile_offset(struct drm_i915_private *dev_priv,
1170
					     int *x, int *y,
1178
			      int *x, int *y,
1171
					     unsigned int tiling_mode,
1179
			      uint64_t fb_modifier,
1172
					     unsigned int bpp,
1180
			      unsigned int cpp,
1173
					     unsigned int pitch);
1181
			      unsigned int pitch);
1174
void intel_prepare_reset(struct drm_device *dev);
1182
void intel_prepare_reset(struct drm_device *dev);
1175
void intel_finish_reset(struct drm_device *dev);
1183
void intel_finish_reset(struct drm_device *dev);
1176
void hsw_enable_pc8(struct drm_i915_private *dev_priv);
1184
void hsw_enable_pc8(struct drm_i915_private *dev_priv);
1177
void hsw_disable_pc8(struct drm_i915_private *dev_priv);
1185
void hsw_disable_pc8(struct drm_i915_private *dev_priv);
Line 1204... Line 1212...
1204
intel_display_port_power_domain(struct intel_encoder *intel_encoder);
1212
intel_display_port_power_domain(struct intel_encoder *intel_encoder);
1205
enum intel_display_power_domain
1213
enum intel_display_power_domain
1206
intel_display_port_aux_power_domain(struct intel_encoder *intel_encoder);
1214
intel_display_port_aux_power_domain(struct intel_encoder *intel_encoder);
1207
void intel_mode_from_pipe_config(struct drm_display_mode *mode,
1215
void intel_mode_from_pipe_config(struct drm_display_mode *mode,
1208
				 struct intel_crtc_state *pipe_config);
1216
				 struct intel_crtc_state *pipe_config);
1209
void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
-
 
Line 1210... Line 1217...
1210
 
1217
 
1211
int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
1218
int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
Line 1212... Line 1219...
1212
int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
1219
int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
Line 1219... Line 1226...
1219
u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
1226
u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
1220
u32 skl_plane_ctl_rotation(unsigned int rotation);
1227
u32 skl_plane_ctl_rotation(unsigned int rotation);
Line 1221... Line 1228...
1221
 
1228
 
1222
/* intel_csr.c */
1229
/* intel_csr.c */
1223
void intel_csr_ucode_init(struct drm_i915_private *);
1230
void intel_csr_ucode_init(struct drm_i915_private *);
1224
void intel_csr_load_program(struct drm_i915_private *);
1231
bool intel_csr_load_program(struct drm_i915_private *);
Line 1225... Line 1232...
1225
void intel_csr_ucode_fini(struct drm_i915_private *);
1232
void intel_csr_ucode_fini(struct drm_i915_private *);
1226
 
1233
 
1227
/* intel_dp.c */
1234
/* intel_dp.c */
Line 1322... Line 1329...
1322
{
1329
{
1323
}
1330
}
1324
#endif
1331
#endif
Line 1325... Line 1332...
1325
 
1332
 
-
 
1333
/* intel_fbc.c */
-
 
1334
void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
1326
/* intel_fbc.c */
1335
			   struct drm_atomic_state *state);
1327
bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
1336
bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
1328
void intel_fbc_deactivate(struct intel_crtc *crtc);
1337
void intel_fbc_pre_update(struct intel_crtc *crtc);
1329
void intel_fbc_update(struct intel_crtc *crtc);
1338
void intel_fbc_post_update(struct intel_crtc *crtc);
-
 
1339
void intel_fbc_init(struct drm_i915_private *dev_priv);
1330
void intel_fbc_init(struct drm_i915_private *dev_priv);
1340
void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv);
1331
void intel_fbc_enable(struct intel_crtc *crtc);
1341
void intel_fbc_enable(struct intel_crtc *crtc);
1332
void intel_fbc_disable(struct drm_i915_private *dev_priv);
1342
void intel_fbc_disable(struct intel_crtc *crtc);
1333
void intel_fbc_disable_crtc(struct intel_crtc *crtc);
1343
void intel_fbc_global_disable(struct drm_i915_private *dev_priv);
1334
void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
1344
void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
1335
			  unsigned int frontbuffer_bits,
1345
			  unsigned int frontbuffer_bits,
1336
			  enum fb_op_origin origin);
1346
			  enum fb_op_origin origin);
1337
void intel_fbc_flush(struct drm_i915_private *dev_priv,
1347
void intel_fbc_flush(struct drm_i915_private *dev_priv,
Line 1343... Line 1353...
1343
void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
1353
void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
1344
			       struct intel_connector *intel_connector);
1354
			       struct intel_connector *intel_connector);
1345
struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
1355
struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
1346
bool intel_hdmi_compute_config(struct intel_encoder *encoder,
1356
bool intel_hdmi_compute_config(struct intel_encoder *encoder,
1347
			       struct intel_crtc_state *pipe_config);
1357
			       struct intel_crtc_state *pipe_config);
-
 
1358
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
Line 1348... Line 1359...
1348
 
1359
 
1349
 
1360
 
1350
/* intel_lvds.c */
1361
/* intel_lvds.c */
Line 1557... Line 1568...
1557
void ilk_wm_get_hw_state(struct drm_device *dev);
1568
void ilk_wm_get_hw_state(struct drm_device *dev);
1558
void skl_wm_get_hw_state(struct drm_device *dev);
1569
void skl_wm_get_hw_state(struct drm_device *dev);
1559
void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
1570
void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
1560
			  struct skl_ddb_allocation *ddb /* out */);
1571
			  struct skl_ddb_allocation *ddb /* out */);
1561
uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config);
1572
uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config);
-
 
1573
int sanitize_rc6_option(const struct drm_device *dev, int enable_rc6);
Line 1562... Line 1574...
1562
 
1574
 
1563
/* intel_sdvo.c */
1575
/* intel_sdvo.c */
1564
bool intel_sdvo_init(struct drm_device *dev,
1576
bool intel_sdvo_init(struct drm_device *dev,
Line 1615... Line 1627...
1615
int kolibri_framebuffer_init(void *param);
1627
int kolibri_framebuffer_init(void *param);
1616
void shmem_file_delete(struct file *filep);
1628
void shmem_file_delete(struct file *filep);
1617
void intel_fbdev_initial_config(void *data, async_cookie_t cookie);
1629
void intel_fbdev_initial_config(void *data, async_cookie_t cookie);
1618
int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
1630
int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
1619
            struct drm_driver *driver);
1631
            struct drm_driver *driver);
-
 
1632
#define synchronize_irq(x)
Line 1620... Line 1633...
1620
 
1633