Rev 5060 | Rev 6084 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 5060 | Rev 5354 | ||
---|---|---|---|
Line 23... | Line 23... | ||
23 | * IN THE SOFTWARE. |
23 | * IN THE SOFTWARE. |
24 | */ |
24 | */ |
25 | #ifndef __INTEL_DRV_H__ |
25 | #ifndef __INTEL_DRV_H__ |
26 | #define __INTEL_DRV_H__ |
26 | #define __INTEL_DRV_H__ |
Line -... | Line 27... | ||
- | 27 | ||
27 | 28 | #include |
|
28 | #include |
29 | #include |
29 | #include |
30 | #include |
30 | #include |
31 | #include |
31 | #include "i915_drv.h" |
32 | #include "i915_drv.h" |
32 | #include |
33 | #include |
33 | #include |
34 | #include |
34 | #include |
35 | #include |
- | 36 | #include |
|
Line 35... | Line 37... | ||
35 | #include |
37 | #include |
36 | - | ||
37 | #define KBUILD_MODNAME "i915.dll" |
- | |
38 | 38 | ||
Line 39... | Line 39... | ||
39 | 39 | #define DIV_ROUND_CLOSEST_ULL(ll, d) \ |
|
40 | #define cpu_relax() asm volatile("rep; nop") |
40 | ({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; }) |
41 | 41 | ||
42 | /** |
42 | /** |
Line 92... | Line 92... | ||
92 | #define INTEL_I2C_BUS_DVO 1 |
92 | #define INTEL_I2C_BUS_DVO 1 |
93 | #define INTEL_I2C_BUS_SDVO 2 |
93 | #define INTEL_I2C_BUS_SDVO 2 |
Line 94... | Line 94... | ||
94 | 94 | ||
95 | /* these are outputs from the chip - integrated only |
95 | /* these are outputs from the chip - integrated only |
- | 96 | external chips are via DVO or SDVO output */ |
|
96 | external chips are via DVO or SDVO output */ |
97 | enum intel_output_type { |
97 | #define INTEL_OUTPUT_UNUSED 0 |
98 | INTEL_OUTPUT_UNUSED = 0, |
98 | #define INTEL_OUTPUT_ANALOG 1 |
99 | INTEL_OUTPUT_ANALOG = 1, |
99 | #define INTEL_OUTPUT_DVO 2 |
100 | INTEL_OUTPUT_DVO = 2, |
100 | #define INTEL_OUTPUT_SDVO 3 |
101 | INTEL_OUTPUT_SDVO = 3, |
101 | #define INTEL_OUTPUT_LVDS 4 |
102 | INTEL_OUTPUT_LVDS = 4, |
102 | #define INTEL_OUTPUT_TVOUT 5 |
103 | INTEL_OUTPUT_TVOUT = 5, |
103 | #define INTEL_OUTPUT_HDMI 6 |
104 | INTEL_OUTPUT_HDMI = 6, |
104 | #define INTEL_OUTPUT_DISPLAYPORT 7 |
105 | INTEL_OUTPUT_DISPLAYPORT = 7, |
105 | #define INTEL_OUTPUT_EDP 8 |
106 | INTEL_OUTPUT_EDP = 8, |
106 | #define INTEL_OUTPUT_DSI 9 |
107 | INTEL_OUTPUT_DSI = 9, |
107 | #define INTEL_OUTPUT_UNKNOWN 10 |
108 | INTEL_OUTPUT_UNKNOWN = 10, |
- | 109 | INTEL_OUTPUT_DP_MST = 11, |
|
Line 108... | Line 110... | ||
108 | #define INTEL_OUTPUT_DP_MST 11 |
110 | }; |
109 | 111 | ||
110 | #define INTEL_DVO_CHIP_NONE 0 |
112 | #define INTEL_DVO_CHIP_NONE 0 |
111 | #define INTEL_DVO_CHIP_LVDS 1 |
113 | #define INTEL_DVO_CHIP_LVDS 1 |
Line 134... | Line 136... | ||
134 | * The new crtc this encoder will be driven from. Only differs from |
136 | * The new crtc this encoder will be driven from. Only differs from |
135 | * base->crtc while a modeset is in progress. |
137 | * base->crtc while a modeset is in progress. |
136 | */ |
138 | */ |
137 | struct intel_crtc *new_crtc; |
139 | struct intel_crtc *new_crtc; |
Line 138... | Line 140... | ||
138 | 140 | ||
139 | int type; |
141 | enum intel_output_type type; |
140 | unsigned int cloneable; |
142 | unsigned int cloneable; |
141 | bool connectors_active; |
143 | bool connectors_active; |
142 | void (*hot_plug)(struct intel_encoder *); |
144 | void (*hot_plug)(struct intel_encoder *); |
143 | bool (*compute_config)(struct intel_encoder *, |
145 | bool (*compute_config)(struct intel_encoder *, |
Line 182... | Line 184... | ||
182 | bool enabled; |
184 | bool enabled; |
183 | bool combination_mode; /* gen 2/4 only */ |
185 | bool combination_mode; /* gen 2/4 only */ |
184 | bool active_low_pwm; |
186 | bool active_low_pwm; |
185 | struct backlight_device *device; |
187 | struct backlight_device *device; |
186 | } backlight; |
188 | } backlight; |
- | 189 | ||
- | 190 | void (*backlight_power)(struct intel_connector *, bool enable); |
|
187 | }; |
191 | }; |
Line 188... | Line 192... | ||
188 | 192 | ||
189 | struct intel_connector { |
193 | struct intel_connector { |
190 | struct drm_connector base; |
194 | struct drm_connector base; |
Line 214... | Line 218... | ||
214 | /* Panel info for eDP and LVDS */ |
218 | /* Panel info for eDP and LVDS */ |
215 | struct intel_panel panel; |
219 | struct intel_panel panel; |
Line 216... | Line 220... | ||
216 | 220 | ||
217 | /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */ |
221 | /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */ |
- | 222 | struct edid *edid; |
|
Line 218... | Line 223... | ||
218 | struct edid *edid; |
223 | struct edid *detect_edid; |
219 | 224 | ||
220 | /* since POLL and HPD connectors may use the same HPD line keep the native |
225 | /* since POLL and HPD connectors may use the same HPD line keep the native |
Line 236... | Line 241... | ||
236 | int vco; |
241 | int vco; |
237 | int m; |
242 | int m; |
238 | int p; |
243 | int p; |
239 | } intel_clock_t; |
244 | } intel_clock_t; |
Line -... | Line 245... | ||
- | 245 | ||
- | 246 | struct intel_plane_state { |
|
- | 247 | struct drm_crtc *crtc; |
|
- | 248 | struct drm_framebuffer *fb; |
|
- | 249 | struct drm_rect src; |
|
- | 250 | struct drm_rect dst; |
|
- | 251 | struct drm_rect clip; |
|
- | 252 | struct drm_rect orig_src; |
|
- | 253 | struct drm_rect orig_dst; |
|
- | 254 | bool visible; |
|
- | 255 | }; |
|
240 | 256 | ||
241 | struct intel_plane_config { |
257 | struct intel_plane_config { |
242 | bool tiled; |
258 | bool tiled; |
243 | int size; |
259 | int size; |
244 | u32 base; |
260 | u32 base; |
Line 274... | Line 290... | ||
274 | 290 | ||
275 | /* Whether to set up the PCH/FDI. Note that we never allow sharing |
291 | /* Whether to set up the PCH/FDI. Note that we never allow sharing |
276 | * between pch encoders and cpu encoders. */ |
292 | * between pch encoders and cpu encoders. */ |
Line -... | Line 293... | ||
- | 293 | bool has_pch_encoder; |
|
- | 294 | ||
- | 295 | /* Are we sending infoframes on the attached port */ |
|
277 | bool has_pch_encoder; |
296 | bool has_infoframe; |
278 | 297 | ||
279 | /* CPU Transcoder for the pipe. Currently this can only differ from the |
298 | /* CPU Transcoder for the pipe. Currently this can only differ from the |
Line 280... | Line 299... | ||
280 | * pipe on Haswell (where we have a special eDP transcoder). */ |
299 | * pipe on Haswell (where we have a special eDP transcoder). */ |
Line 322... | Line 341... | ||
322 | struct dpll dpll; |
341 | struct dpll dpll; |
Line 323... | Line 342... | ||
323 | 342 | ||
324 | /* Selected dpll when shared or DPLL_ID_PRIVATE. */ |
343 | /* Selected dpll when shared or DPLL_ID_PRIVATE. */ |
Line -... | Line 344... | ||
- | 344 | enum intel_dpll_id shared_dpll; |
|
325 | enum intel_dpll_id shared_dpll; |
345 | |
- | 346 | /* |
|
- | 347 | * - PORT_CLK_SEL for DDI ports on HSW/BDW. |
|
326 | 348 | * - enum skl_dpll on SKL |
|
Line 327... | Line 349... | ||
327 | /* PORT_CLK_SEL for DDI ports. */ |
349 | */ |
328 | uint32_t ddi_pll_sel; |
350 | uint32_t ddi_pll_sel; |
Line 329... | Line 351... | ||
329 | 351 | ||
330 | /* Actual register state of the dpll, for shared dpll cross-checking. */ |
352 | /* Actual register state of the dpll, for shared dpll cross-checking. */ |
Line 331... | Line 353... | ||
331 | struct intel_dpll_hw_state dpll_hw_state; |
353 | struct intel_dpll_hw_state dpll_hw_state; |
332 | 354 | ||
- | 355 | int pipe_bpp; |
|
Line 333... | Line 356... | ||
333 | int pipe_bpp; |
356 | struct intel_link_m_n dp_m_n; |
334 | struct intel_link_m_n dp_m_n; |
357 | |
335 | 358 | /* m2_n2 for eDP downclock */ |
|
336 | /* m2_n2 for eDP downclock */ |
359 | struct intel_link_m_n dp_m2_n2; |
Line 382... | Line 405... | ||
382 | bool sprites_scaled; |
405 | bool sprites_scaled; |
383 | }; |
406 | }; |
Line 384... | Line 407... | ||
384 | 407 | ||
385 | struct intel_mmio_flip { |
408 | struct intel_mmio_flip { |
- | 409 | u32 seqno; |
|
- | 410 | struct intel_engine_cs *ring; |
|
- | 411 | struct work_struct work; |
|
- | 412 | }; |
|
- | 413 | ||
- | 414 | struct skl_pipe_wm { |
|
- | 415 | struct skl_wm_level wm[8]; |
|
386 | u32 seqno; |
416 | struct skl_wm_level trans_wm; |
387 | u32 ring_id; |
417 | uint32_t linetime; |
Line 388... | Line 418... | ||
388 | }; |
418 | }; |
389 | 419 | ||
390 | struct intel_crtc { |
420 | struct intel_crtc { |
Line 413... | Line 443... | ||
413 | 443 | ||
414 | struct drm_i915_gem_object *cursor_bo; |
444 | struct drm_i915_gem_object *cursor_bo; |
415 | uint32_t cursor_addr; |
445 | uint32_t cursor_addr; |
416 | int16_t cursor_width, cursor_height; |
446 | int16_t cursor_width, cursor_height; |
- | 447 | uint32_t cursor_cntl; |
|
417 | uint32_t cursor_cntl; |
448 | uint32_t cursor_size; |
Line 418... | Line 449... | ||
418 | uint32_t cursor_base; |
449 | uint32_t cursor_base; |
419 | 450 | ||
420 | struct intel_plane_config plane_config; |
451 | struct intel_plane_config plane_config; |
Line 431... | Line 462... | ||
431 | 462 | ||
432 | /* per-pipe watermark state */ |
463 | /* per-pipe watermark state */ |
433 | struct { |
464 | struct { |
434 | /* watermarks currently being used */ |
465 | /* watermarks currently being used */ |
- | 466 | struct intel_pipe_wm active; |
|
- | 467 | /* SKL wm values currently in use */ |
|
435 | struct intel_pipe_wm active; |
468 | struct skl_pipe_wm skl_active; |
Line 436... | Line -... | ||
436 | } wm; |
- | |
437 | - | ||
438 | wait_queue_head_t vbl_wait; |
469 | } wm; |
- | 470 | ||
439 | 471 | int scanline_offset; |
|
Line 440... | Line 472... | ||
440 | int scanline_offset; |
472 | struct intel_mmio_flip mmio_flip; |
441 | }; |
473 | }; |
442 | 474 | ||
Line 457... | Line 489... | ||
457 | int max_downscale; |
489 | int max_downscale; |
458 | int crtc_x, crtc_y; |
490 | int crtc_x, crtc_y; |
459 | unsigned int crtc_w, crtc_h; |
491 | unsigned int crtc_w, crtc_h; |
460 | uint32_t src_x, src_y; |
492 | uint32_t src_x, src_y; |
461 | uint32_t src_w, src_h; |
493 | uint32_t src_w, src_h; |
- | 494 | unsigned int rotation; |
|
Line 462... | Line 495... | ||
462 | 495 | ||
463 | /* Since we need to change the watermarks before/after |
496 | /* Since we need to change the watermarks before/after |
464 | * enabling/disabling the planes, we need to store the parameters here |
497 | * enabling/disabling the planes, we need to store the parameters here |
465 | * as the other pieces of the struct may not reflect the values we want |
498 | * as the other pieces of the struct may not reflect the values we want |
Line 523... | Line 556... | ||
523 | enum hdmi_infoframe_type type, |
556 | enum hdmi_infoframe_type type, |
524 | const void *frame, ssize_t len); |
557 | const void *frame, ssize_t len); |
525 | void (*set_infoframes)(struct drm_encoder *encoder, |
558 | void (*set_infoframes)(struct drm_encoder *encoder, |
526 | bool enable, |
559 | bool enable, |
527 | struct drm_display_mode *adjusted_mode); |
560 | struct drm_display_mode *adjusted_mode); |
- | 561 | bool (*infoframe_enabled)(struct drm_encoder *encoder); |
|
528 | }; |
562 | }; |
Line 529... | Line 563... | ||
529 | 563 | ||
530 | struct intel_dp_mst_encoder; |
564 | struct intel_dp_mst_encoder; |
Line 565... | Line 599... | ||
565 | bool want_panel_vdd; |
599 | bool want_panel_vdd; |
566 | unsigned long last_power_cycle; |
600 | unsigned long last_power_cycle; |
567 | unsigned long last_power_on; |
601 | unsigned long last_power_on; |
568 | unsigned long last_backlight_off; |
602 | unsigned long last_backlight_off; |
Line -... | Line 603... | ||
- | 603 | ||
- | 604 | /* |
|
- | 605 | * Pipe whose power sequencer is currently locked into |
|
- | 606 | * this port. Only relevant on VLV/CHV. |
|
- | 607 | */ |
|
- | 608 | enum pipe pps_pipe; |
|
- | 609 | struct edp_power_seq pps_delays; |
|
569 | 610 | ||
570 | bool use_tps3; |
611 | bool use_tps3; |
571 | bool can_mst; /* this port supports mst */ |
612 | bool can_mst; /* this port supports mst */ |
572 | bool is_mst; |
613 | bool is_mst; |
573 | int active_mst_links; |
614 | int active_mst_links; |
Line 663... | Line 704... | ||
663 | #define INTEL_FLIP_INACTIVE 0 |
704 | #define INTEL_FLIP_INACTIVE 0 |
664 | #define INTEL_FLIP_PENDING 1 |
705 | #define INTEL_FLIP_PENDING 1 |
665 | #define INTEL_FLIP_COMPLETE 2 |
706 | #define INTEL_FLIP_COMPLETE 2 |
666 | u32 flip_count; |
707 | u32 flip_count; |
667 | u32 gtt_offset; |
708 | u32 gtt_offset; |
- | 709 | struct intel_engine_cs *flip_queued_ring; |
|
- | 710 | u32 flip_queued_seqno; |
|
- | 711 | int flip_queued_vblank; |
|
- | 712 | int flip_ready_vblank; |
|
668 | bool enable_stall_check; |
713 | bool enable_stall_check; |
669 | }; |
714 | }; |
Line 670... | Line 715... | ||
670 | 715 | ||
671 | struct intel_set_config { |
716 | struct intel_set_config { |
Line 716... | Line 761... | ||
716 | hdmi_to_dig_port(struct intel_hdmi *intel_hdmi) |
761 | hdmi_to_dig_port(struct intel_hdmi *intel_hdmi) |
717 | { |
762 | { |
718 | return container_of(intel_hdmi, struct intel_digital_port, hdmi); |
763 | return container_of(intel_hdmi, struct intel_digital_port, hdmi); |
719 | } |
764 | } |
Line -... | Line 765... | ||
- | 765 | ||
- | 766 | /* |
|
- | 767 | * Returns the number of planes for this pipe, ie the number of sprites + 1 |
|
- | 768 | * (primary plane). This doesn't count the cursor plane then. |
|
- | 769 | */ |
|
- | 770 | static inline unsigned int intel_num_planes(struct intel_crtc *crtc) |
|
- | 771 | { |
|
- | 772 | return INTEL_INFO(crtc->base.dev)->num_sprites[crtc->pipe] + 1; |
|
Line 720... | Line 773... | ||
720 | 773 | } |
|
721 | 774 | ||
722 | /* i915_irq.c */ |
775 | /* intel_fifo_underrun.c */ |
723 | bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev, |
776 | bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, |
724 | enum pipe pipe, bool enable); |
777 | enum pipe pipe, bool enable); |
725 | bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev, |
778 | bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, |
- | 779 | enum transcoder pch_transcoder, |
|
- | 780 | bool enable); |
|
- | 781 | void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, |
|
- | 782 | enum pipe pipe); |
|
- | 783 | void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, |
|
- | 784 | enum transcoder pch_transcoder); |
|
- | 785 | void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv); |
|
726 | enum transcoder pch_transcoder, |
786 | |
727 | bool enable); |
787 | /* i915_irq.c */ |
728 | void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
788 | void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
729 | void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
789 | void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
- | 790 | void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
|
730 | void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
791 | void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
731 | void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
792 | void gen6_reset_rps_interrupts(struct drm_device *dev); |
732 | void gen8_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
793 | void gen6_enable_rps_interrupts(struct drm_device *dev); |
733 | void gen8_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
794 | void gen6_disable_rps_interrupts(struct drm_device *dev); |
734 | void intel_runtime_pm_disable_interrupts(struct drm_device *dev); |
795 | void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv); |
735 | void intel_runtime_pm_restore_interrupts(struct drm_device *dev); |
796 | void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv); |
736 | static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv) |
797 | static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv) |
737 | { |
798 | { |
738 | /* |
799 | /* |
739 | * We only use drm_irq_uninstall() at unload and VT switch, so |
800 | * We only use drm_irq_uninstall() at unload and VT switch, so |
740 | * this is the only thing we need to check. |
801 | * this is the only thing we need to check. |
741 | */ |
802 | */ |
Line 742... | Line 803... | ||
742 | return !dev_priv->pm._irqs_disabled; |
803 | return dev_priv->pm.irqs_enabled; |
743 | } |
- | |
744 | 804 | } |
|
Line 745... | Line 805... | ||
745 | int intel_get_crtc_scanline(struct intel_crtc *crtc); |
805 | |
746 | void i9xx_check_fifo_underruns(struct drm_device *dev); |
806 | int intel_get_crtc_scanline(struct intel_crtc *crtc); |
Line 774... | Line 834... | ||
774 | void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder); |
834 | void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder); |
775 | void intel_ddi_clock_get(struct intel_encoder *encoder, |
835 | void intel_ddi_clock_get(struct intel_encoder *encoder, |
776 | struct intel_crtc_config *pipe_config); |
836 | struct intel_crtc_config *pipe_config); |
777 | void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state); |
837 | void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state); |
Line 778... | Line 838... | ||
778 | 838 | ||
779 | /* intel_display.c */ |
- | |
780 | const char *intel_output_name(int output); |
- | |
781 | bool intel_has_pending_fb_unpin(struct drm_device *dev); |
- | |
782 | int intel_pch_rawclk(struct drm_device *dev); |
- | |
783 | void intel_mark_busy(struct drm_device *dev); |
839 | /* intel_frontbuffer.c */ |
784 | void intel_fb_obj_invalidate(struct drm_i915_gem_object *obj, |
840 | void intel_fb_obj_invalidate(struct drm_i915_gem_object *obj, |
785 | struct intel_engine_cs *ring); |
841 | struct intel_engine_cs *ring); |
786 | void intel_frontbuffer_flip_prepare(struct drm_device *dev, |
842 | void intel_frontbuffer_flip_prepare(struct drm_device *dev, |
787 | unsigned frontbuffer_bits); |
843 | unsigned frontbuffer_bits); |
788 | void intel_frontbuffer_flip_complete(struct drm_device *dev, |
844 | void intel_frontbuffer_flip_complete(struct drm_device *dev, |
789 | unsigned frontbuffer_bits); |
845 | unsigned frontbuffer_bits); |
790 | void intel_frontbuffer_flush(struct drm_device *dev, |
846 | void intel_frontbuffer_flush(struct drm_device *dev, |
791 | unsigned frontbuffer_bits); |
847 | unsigned frontbuffer_bits); |
792 | /** |
848 | /** |
793 | * intel_frontbuffer_flip - prepare frontbuffer flip |
849 | * intel_frontbuffer_flip - synchronous frontbuffer flip |
794 | * @dev: DRM device |
850 | * @dev: DRM device |
795 | * @frontbuffer_bits: frontbuffer plane tracking bits |
851 | * @frontbuffer_bits: frontbuffer plane tracking bits |
796 | * |
852 | * |
797 | * This function gets called after scheduling a flip on @obj. This is for |
853 | * This function gets called after scheduling a flip on @obj. This is for |
Line 806... | Line 862... | ||
806 | { |
862 | { |
807 | intel_frontbuffer_flush(dev, frontbuffer_bits); |
863 | intel_frontbuffer_flush(dev, frontbuffer_bits); |
808 | } |
864 | } |
Line 809... | Line 865... | ||
809 | 865 | ||
- | 866 | void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire); |
|
- | 867 | ||
- | 868 | ||
- | 869 | /* intel_audio.c */ |
|
- | 870 | void intel_init_audio(struct drm_device *dev); |
|
- | 871 | void intel_audio_codec_enable(struct intel_encoder *encoder); |
|
- | 872 | void intel_audio_codec_disable(struct intel_encoder *encoder); |
|
- | 873 | ||
- | 874 | /* intel_display.c */ |
|
- | 875 | const char *intel_output_name(int output); |
|
- | 876 | bool intel_has_pending_fb_unpin(struct drm_device *dev); |
|
- | 877 | int intel_pch_rawclk(struct drm_device *dev); |
|
810 | void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire); |
878 | void intel_mark_busy(struct drm_device *dev); |
811 | void intel_mark_idle(struct drm_device *dev); |
879 | void intel_mark_idle(struct drm_device *dev); |
812 | void intel_crtc_restore_mode(struct drm_crtc *crtc); |
880 | void intel_crtc_restore_mode(struct drm_crtc *crtc); |
813 | void intel_crtc_control(struct drm_crtc *crtc, bool enable); |
881 | void intel_crtc_control(struct drm_crtc *crtc, bool enable); |
814 | void intel_crtc_update_dpms(struct drm_crtc *crtc); |
882 | void intel_crtc_update_dpms(struct drm_crtc *crtc); |
Line 826... | Line 894... | ||
826 | enum pipe intel_get_pipe_from_connector(struct intel_connector *connector); |
894 | enum pipe intel_get_pipe_from_connector(struct intel_connector *connector); |
827 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, |
895 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, |
828 | struct drm_file *file_priv); |
896 | struct drm_file *file_priv); |
829 | enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, |
897 | enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, |
830 | enum pipe pipe); |
898 | enum pipe pipe); |
831 | void intel_wait_for_vblank(struct drm_device *dev, int pipe); |
899 | bool intel_pipe_has_type(struct intel_crtc *crtc, enum intel_output_type type); |
- | 900 | static inline void |
|
832 | void intel_wait_for_pipe_off(struct drm_device *dev, int pipe); |
901 | intel_wait_for_vblank(struct drm_device *dev, int pipe) |
- | 902 | { |
|
- | 903 | drm_wait_one_vblank(dev, pipe); |
|
- | 904 | } |
|
833 | int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp); |
905 | int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp); |
834 | void vlv_wait_port_ready(struct drm_i915_private *dev_priv, |
906 | void vlv_wait_port_ready(struct drm_i915_private *dev_priv, |
835 | struct intel_digital_port *dport); |
907 | struct intel_digital_port *dport); |
836 | bool intel_get_load_detect_pipe(struct drm_connector *connector, |
908 | bool intel_get_load_detect_pipe(struct drm_connector *connector, |
837 | struct drm_display_mode *mode, |
909 | struct drm_display_mode *mode, |
838 | struct intel_load_detect_pipe *old, |
910 | struct intel_load_detect_pipe *old, |
839 | struct drm_modeset_acquire_ctx *ctx); |
911 | struct drm_modeset_acquire_ctx *ctx); |
840 | void intel_release_load_detect_pipe(struct drm_connector *connector, |
912 | void intel_release_load_detect_pipe(struct drm_connector *connector, |
841 | struct intel_load_detect_pipe *old); |
913 | struct intel_load_detect_pipe *old); |
842 | int intel_pin_and_fence_fb_obj(struct drm_device *dev, |
914 | int intel_pin_and_fence_fb_obj(struct drm_plane *plane, |
843 | struct drm_i915_gem_object *obj, |
915 | struct drm_framebuffer *fb, |
844 | struct intel_engine_cs *pipelined); |
916 | struct intel_engine_cs *pipelined); |
845 | void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); |
917 | void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); |
846 | struct drm_framebuffer * |
918 | struct drm_framebuffer * |
847 | __intel_framebuffer_create(struct drm_device *dev, |
919 | __intel_framebuffer_create(struct drm_device *dev, |
848 | struct drm_mode_fb_cmd2 *mode_cmd, |
920 | struct drm_mode_fb_cmd2 *mode_cmd, |
849 | struct drm_i915_gem_object *obj); |
921 | struct drm_i915_gem_object *obj); |
850 | void intel_prepare_page_flip(struct drm_device *dev, int plane); |
922 | void intel_prepare_page_flip(struct drm_device *dev, int plane); |
851 | void intel_finish_page_flip(struct drm_device *dev, int pipe); |
923 | void intel_finish_page_flip(struct drm_device *dev, int pipe); |
852 | void intel_finish_page_flip_plane(struct drm_device *dev, int plane); |
924 | void intel_finish_page_flip_plane(struct drm_device *dev, int plane); |
- | 925 | void intel_check_page_flip(struct drm_device *dev, int pipe); |
|
Line 853... | Line 926... | ||
853 | 926 | ||
854 | /* shared dpll functions */ |
927 | /* shared dpll functions */ |
855 | struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc); |
928 | struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc); |
856 | void assert_shared_dpll(struct drm_i915_private *dev_priv, |
929 | void assert_shared_dpll(struct drm_i915_private *dev_priv, |
Line 859... | Line 932... | ||
859 | #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true) |
932 | #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true) |
860 | #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false) |
933 | #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false) |
861 | struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc); |
934 | struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc); |
862 | void intel_put_shared_dpll(struct intel_crtc *crtc); |
935 | void intel_put_shared_dpll(struct intel_crtc *crtc); |
Line -... | Line 936... | ||
- | 936 | ||
- | 937 | void vlv_force_pll_on(struct drm_device *dev, enum pipe pipe, |
|
- | 938 | const struct dpll *dpll); |
|
- | 939 | void vlv_force_pll_off(struct drm_device *dev, enum pipe pipe); |
|
863 | 940 | ||
- | 941 | /* modesetting asserts */ |
|
- | 942 | void assert_panel_unlocked(struct drm_i915_private *dev_priv, |
|
864 | /* modesetting asserts */ |
943 | enum pipe pipe); |
865 | void assert_pll(struct drm_i915_private *dev_priv, |
944 | void assert_pll(struct drm_i915_private *dev_priv, |
866 | enum pipe pipe, bool state); |
945 | enum pipe pipe, bool state); |
867 | #define assert_pll_enabled(d, p) assert_pll(d, p, true) |
946 | #define assert_pll_enabled(d, p) assert_pll(d, p, true) |
868 | #define assert_pll_disabled(d, p) assert_pll(d, p, false) |
947 | #define assert_pll_disabled(d, p) assert_pll(d, p, false) |
Line 871... | Line 950... | ||
871 | #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true) |
950 | #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true) |
872 | #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false) |
951 | #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false) |
873 | void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); |
952 | void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); |
874 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) |
953 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) |
875 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) |
954 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) |
876 | void intel_write_eld(struct drm_encoder *encoder, |
- | |
877 | struct drm_display_mode *mode); |
- | |
878 | unsigned long intel_gen4_compute_page_offset(int *x, int *y, |
955 | unsigned long intel_gen4_compute_page_offset(int *x, int *y, |
879 | unsigned int tiling_mode, |
956 | unsigned int tiling_mode, |
880 | unsigned int bpp, |
957 | unsigned int bpp, |
881 | unsigned int pitch); |
958 | unsigned int pitch); |
882 | void intel_display_handle_reset(struct drm_device *dev); |
959 | void intel_prepare_reset(struct drm_device *dev); |
- | 960 | void intel_finish_reset(struct drm_device *dev); |
|
883 | void hsw_enable_pc8(struct drm_i915_private *dev_priv); |
961 | void hsw_enable_pc8(struct drm_i915_private *dev_priv); |
884 | void hsw_disable_pc8(struct drm_i915_private *dev_priv); |
962 | void hsw_disable_pc8(struct drm_i915_private *dev_priv); |
885 | void intel_dp_get_m_n(struct intel_crtc *crtc, |
963 | void intel_dp_get_m_n(struct intel_crtc *crtc, |
886 | struct intel_crtc_config *pipe_config); |
964 | struct intel_crtc_config *pipe_config); |
- | 965 | void intel_dp_set_m_n(struct intel_crtc *crtc); |
|
887 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); |
966 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); |
888 | void |
967 | void |
889 | ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config, |
968 | ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config, |
890 | int dotclock); |
969 | int dotclock); |
891 | bool intel_crtc_active(struct drm_crtc *crtc); |
970 | bool intel_crtc_active(struct drm_crtc *crtc); |
892 | void hsw_enable_ips(struct intel_crtc *crtc); |
971 | void hsw_enable_ips(struct intel_crtc *crtc); |
893 | void hsw_disable_ips(struct intel_crtc *crtc); |
972 | void hsw_disable_ips(struct intel_crtc *crtc); |
894 | void intel_display_set_init_power(struct drm_i915_private *dev, bool enable); |
- | |
895 | enum intel_display_power_domain |
973 | enum intel_display_power_domain |
896 | intel_display_port_power_domain(struct intel_encoder *intel_encoder); |
974 | intel_display_port_power_domain(struct intel_encoder *intel_encoder); |
897 | void intel_mode_from_pipe_config(struct drm_display_mode *mode, |
975 | void intel_mode_from_pipe_config(struct drm_display_mode *mode, |
898 | struct intel_crtc_config *pipe_config); |
976 | struct intel_crtc_config *pipe_config); |
899 | int intel_format_to_fourcc(int format); |
977 | int intel_format_to_fourcc(int format); |
900 | void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc); |
978 | void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc); |
901 | - | ||
- | 979 | void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file); |
|
Line 902... | Line 980... | ||
902 | 980 | ||
903 | /* intel_dp.c */ |
981 | /* intel_dp.c */ |
904 | void intel_dp_init(struct drm_device *dev, int output_reg, enum port port); |
982 | void intel_dp_init(struct drm_device *dev, int output_reg, enum port port); |
905 | bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
983 | bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
Line 917... | Line 995... | ||
917 | bool intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, |
995 | bool intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, |
918 | bool long_hpd); |
996 | bool long_hpd); |
919 | void intel_edp_backlight_on(struct intel_dp *intel_dp); |
997 | void intel_edp_backlight_on(struct intel_dp *intel_dp); |
920 | void intel_edp_backlight_off(struct intel_dp *intel_dp); |
998 | void intel_edp_backlight_off(struct intel_dp *intel_dp); |
921 | void intel_edp_panel_vdd_on(struct intel_dp *intel_dp); |
999 | void intel_edp_panel_vdd_on(struct intel_dp *intel_dp); |
922 | void intel_edp_panel_vdd_sanitize(struct intel_encoder *intel_encoder); |
- | |
923 | void intel_edp_panel_on(struct intel_dp *intel_dp); |
1000 | void intel_edp_panel_on(struct intel_dp *intel_dp); |
924 | void intel_edp_panel_off(struct intel_dp *intel_dp); |
1001 | void intel_edp_panel_off(struct intel_dp *intel_dp); |
925 | void intel_edp_psr_enable(struct intel_dp *intel_dp); |
- | |
926 | void intel_edp_psr_disable(struct intel_dp *intel_dp); |
- | |
927 | void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate); |
1002 | void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate); |
928 | void intel_edp_psr_invalidate(struct drm_device *dev, |
- | |
929 | unsigned frontbuffer_bits); |
- | |
930 | void intel_edp_psr_flush(struct drm_device *dev, |
- | |
931 | unsigned frontbuffer_bits); |
- | |
932 | void intel_edp_psr_init(struct drm_device *dev); |
- | |
933 | - | ||
934 | int intel_dp_handle_hpd_irq(struct intel_digital_port *digport, bool long_hpd); |
- | |
935 | void intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector); |
1003 | void intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector); |
936 | void intel_dp_mst_suspend(struct drm_device *dev); |
1004 | void intel_dp_mst_suspend(struct drm_device *dev); |
937 | void intel_dp_mst_resume(struct drm_device *dev); |
1005 | void intel_dp_mst_resume(struct drm_device *dev); |
938 | int intel_dp_max_link_bw(struct intel_dp *intel_dp); |
1006 | int intel_dp_max_link_bw(struct intel_dp *intel_dp); |
939 | void intel_dp_hot_plug(struct intel_encoder *intel_encoder); |
1007 | void intel_dp_hot_plug(struct intel_encoder *intel_encoder); |
- | 1008 | void vlv_power_sequencer_reset(struct drm_i915_private *dev_priv); |
|
- | 1009 | uint32_t intel_dp_pack_aux(const uint8_t *src, int src_bytes); |
|
- | 1010 | void intel_dp_unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes); |
|
- | 1011 | ||
940 | /* intel_dp_mst.c */ |
1012 | /* intel_dp_mst.c */ |
941 | int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); |
1013 | int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); |
942 | void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); |
1014 | void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); |
943 | /* intel_dsi.c */ |
1015 | /* intel_dsi.c */ |
944 | void intel_dsi_init(struct drm_device *dev); |
1016 | void intel_dsi_init(struct drm_device *dev); |
Line 949... | Line 1021... | ||
949 | 1021 | ||
950 | 1022 | ||
951 | /* legacy fbdev emulation in intel_fbdev.c */ |
1023 | /* legacy fbdev emulation in intel_fbdev.c */ |
952 | #ifdef CONFIG_DRM_I915_FBDEV |
1024 | #ifdef CONFIG_DRM_I915_FBDEV |
953 | extern int intel_fbdev_init(struct drm_device *dev); |
1025 | extern int intel_fbdev_init(struct drm_device *dev); |
954 | extern void intel_fbdev_initial_config(struct drm_device *dev); |
1026 | extern void intel_fbdev_initial_config(void *data, async_cookie_t cookie); |
955 | extern void intel_fbdev_fini(struct drm_device *dev); |
1027 | extern void intel_fbdev_fini(struct drm_device *dev); |
956 | extern void intel_fbdev_set_suspend(struct drm_device *dev, int state); |
1028 | extern void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous); |
957 | extern void intel_fbdev_output_poll_changed(struct drm_device *dev); |
1029 | extern void intel_fbdev_output_poll_changed(struct drm_device *dev); |
958 | extern void intel_fbdev_restore_mode(struct drm_device *dev); |
1030 | extern void intel_fbdev_restore_mode(struct drm_device *dev); |
959 | #else |
1031 | #else |
960 | static inline int intel_fbdev_init(struct drm_device *dev) |
1032 | static inline int intel_fbdev_init(struct drm_device *dev) |
961 | { |
1033 | { |
Line 962... | Line 1034... | ||
962 | return 0; |
1034 | return 0; |
963 | } |
1035 | } |
964 | 1036 | ||
Line 965... | Line 1037... | ||
965 | static inline void intel_fbdev_initial_config(struct drm_device *dev) |
1037 | static inline void intel_fbdev_initial_config(void *data, async_cookie_t cookie) |
966 | { |
1038 | { |
967 | } |
1039 | } |
Line 968... | Line 1040... | ||
968 | 1040 | ||
969 | static inline void intel_fbdev_fini(struct drm_device *dev) |
1041 | static inline void intel_fbdev_fini(struct drm_device *dev) |
970 | { |
1042 | { |
Line 971... | Line 1043... | ||
971 | } |
1043 | } |
972 | 1044 | ||
Line 1024... | Line 1096... | ||
1024 | void intel_gmch_panel_fitting(struct intel_crtc *crtc, |
1096 | void intel_gmch_panel_fitting(struct intel_crtc *crtc, |
1025 | struct intel_crtc_config *pipe_config, |
1097 | struct intel_crtc_config *pipe_config, |
1026 | int fitting_mode); |
1098 | int fitting_mode); |
1027 | void intel_panel_set_backlight_acpi(struct intel_connector *connector, |
1099 | void intel_panel_set_backlight_acpi(struct intel_connector *connector, |
1028 | u32 level, u32 max); |
1100 | u32 level, u32 max); |
1029 | int intel_panel_setup_backlight(struct drm_connector *connector); |
1101 | int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe); |
1030 | void intel_panel_enable_backlight(struct intel_connector *connector); |
1102 | void intel_panel_enable_backlight(struct intel_connector *connector); |
1031 | void intel_panel_disable_backlight(struct intel_connector *connector); |
1103 | void intel_panel_disable_backlight(struct intel_connector *connector); |
1032 | void intel_panel_destroy_backlight(struct drm_connector *connector); |
1104 | void intel_panel_destroy_backlight(struct drm_connector *connector); |
1033 | void intel_panel_init_backlight_funcs(struct drm_device *dev); |
1105 | void intel_panel_init_backlight_funcs(struct drm_device *dev); |
1034 | enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
1106 | enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
1035 | extern struct drm_display_mode *intel_find_panel_downclock( |
1107 | extern struct drm_display_mode *intel_find_panel_downclock( |
1036 | struct drm_device *dev, |
1108 | struct drm_device *dev, |
1037 | struct drm_display_mode *fixed_mode, |
1109 | struct drm_display_mode *fixed_mode, |
1038 | struct drm_connector *connector); |
1110 | struct drm_connector *connector); |
- | 1111 | void intel_backlight_register(struct drm_device *dev); |
|
- | 1112 | void intel_backlight_unregister(struct drm_device *dev); |
|
- | 1113 | ||
- | 1114 | ||
- | 1115 | /* intel_psr.c */ |
|
- | 1116 | bool intel_psr_is_enabled(struct drm_device *dev); |
|
- | 1117 | void intel_psr_enable(struct intel_dp *intel_dp); |
|
- | 1118 | void intel_psr_disable(struct intel_dp *intel_dp); |
|
- | 1119 | void intel_psr_invalidate(struct drm_device *dev, |
|
- | 1120 | unsigned frontbuffer_bits); |
|
- | 1121 | void intel_psr_flush(struct drm_device *dev, |
|
- | 1122 | unsigned frontbuffer_bits); |
|
- | 1123 | void intel_psr_init(struct drm_device *dev); |
|
- | 1124 | ||
- | 1125 | /* intel_runtime_pm.c */ |
|
- | 1126 | int intel_power_domains_init(struct drm_i915_private *); |
|
- | 1127 | void intel_power_domains_fini(struct drm_i915_private *); |
|
- | 1128 | void intel_power_domains_init_hw(struct drm_i915_private *dev_priv); |
|
- | 1129 | void intel_runtime_pm_enable(struct drm_i915_private *dev_priv); |
|
- | 1130 | ||
- | 1131 | bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv, |
|
- | 1132 | enum intel_display_power_domain domain); |
|
- | 1133 | bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv, |
|
- | 1134 | enum intel_display_power_domain domain); |
|
- | 1135 | void intel_display_power_get(struct drm_i915_private *dev_priv, |
|
- | 1136 | enum intel_display_power_domain domain); |
|
- | 1137 | void intel_display_power_put(struct drm_i915_private *dev_priv, |
|
- | 1138 | enum intel_display_power_domain domain); |
|
- | 1139 | void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv); |
|
- | 1140 | void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv); |
|
- | 1141 | void intel_runtime_pm_get(struct drm_i915_private *dev_priv); |
|
- | 1142 | void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv); |
|
- | 1143 | void intel_runtime_pm_put(struct drm_i915_private *dev_priv); |
|
- | 1144 | ||
- | 1145 | void intel_display_set_init_power(struct drm_i915_private *dev, bool enable); |
|
Line 1039... | Line 1146... | ||
1039 | 1146 | ||
1040 | /* intel_pm.c */ |
1147 | /* intel_pm.c */ |
1041 | void intel_init_clock_gating(struct drm_device *dev); |
1148 | void intel_init_clock_gating(struct drm_device *dev); |
1042 | void intel_suspend_hw(struct drm_device *dev); |
1149 | void intel_suspend_hw(struct drm_device *dev); |
Line 1052... | Line 1159... | ||
1052 | void intel_pm_setup(struct drm_device *dev); |
1159 | void intel_pm_setup(struct drm_device *dev); |
1053 | bool intel_fbc_enabled(struct drm_device *dev); |
1160 | bool intel_fbc_enabled(struct drm_device *dev); |
1054 | void intel_update_fbc(struct drm_device *dev); |
1161 | void intel_update_fbc(struct drm_device *dev); |
1055 | void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
1162 | void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
1056 | void intel_gpu_ips_teardown(void); |
1163 | void intel_gpu_ips_teardown(void); |
1057 | int intel_power_domains_init(struct drm_i915_private *); |
- | |
1058 | void intel_power_domains_remove(struct drm_i915_private *); |
- | |
1059 | bool intel_display_power_enabled(struct drm_i915_private *dev_priv, |
- | |
1060 | enum intel_display_power_domain domain); |
- | |
1061 | bool intel_display_power_enabled_unlocked(struct drm_i915_private *dev_priv, |
- | |
1062 | enum intel_display_power_domain domain); |
- | |
1063 | void intel_display_power_get(struct drm_i915_private *dev_priv, |
- | |
1064 | enum intel_display_power_domain domain); |
- | |
1065 | void intel_display_power_put(struct drm_i915_private *dev_priv, |
- | |
1066 | enum intel_display_power_domain domain); |
- | |
1067 | void intel_power_domains_init_hw(struct drm_i915_private *dev_priv); |
- | |
1068 | void intel_init_gt_powersave(struct drm_device *dev); |
1164 | void intel_init_gt_powersave(struct drm_device *dev); |
1069 | void intel_cleanup_gt_powersave(struct drm_device *dev); |
1165 | void intel_cleanup_gt_powersave(struct drm_device *dev); |
1070 | void intel_enable_gt_powersave(struct drm_device *dev); |
1166 | void intel_enable_gt_powersave(struct drm_device *dev); |
1071 | void intel_disable_gt_powersave(struct drm_device *dev); |
1167 | void intel_disable_gt_powersave(struct drm_device *dev); |
1072 | void intel_suspend_gt_powersave(struct drm_device *dev); |
1168 | void intel_suspend_gt_powersave(struct drm_device *dev); |
1073 | void intel_reset_gt_powersave(struct drm_device *dev); |
1169 | void intel_reset_gt_powersave(struct drm_device *dev); |
1074 | void ironlake_teardown_rc6(struct drm_device *dev); |
1170 | void ironlake_teardown_rc6(struct drm_device *dev); |
1075 | void gen6_update_ring_freq(struct drm_device *dev); |
1171 | void gen6_update_ring_freq(struct drm_device *dev); |
1076 | void gen6_rps_idle(struct drm_i915_private *dev_priv); |
1172 | void gen6_rps_idle(struct drm_i915_private *dev_priv); |
1077 | void gen6_rps_boost(struct drm_i915_private *dev_priv); |
1173 | void gen6_rps_boost(struct drm_i915_private *dev_priv); |
1078 | void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv); |
- | |
1079 | void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv); |
- | |
1080 | void intel_runtime_pm_get(struct drm_i915_private *dev_priv); |
- | |
1081 | void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv); |
- | |
1082 | void intel_runtime_pm_put(struct drm_i915_private *dev_priv); |
- | |
1083 | void intel_init_runtime_pm(struct drm_i915_private *dev_priv); |
- | |
1084 | void intel_fini_runtime_pm(struct drm_i915_private *dev_priv); |
- | |
1085 | void ilk_wm_get_hw_state(struct drm_device *dev); |
1174 | void ilk_wm_get_hw_state(struct drm_device *dev); |
- | 1175 | void skl_wm_get_hw_state(struct drm_device *dev); |
|
- | 1176 | void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv, |
|
- | 1177 | struct skl_ddb_allocation *ddb /* out */); |
|
Line 1086... | Line 1178... | ||
1086 | 1178 | ||
1087 | 1179 | ||
Line 1088... | Line 1180... | ||
1088 | /* intel_sdvo.c */ |
1180 | /* intel_sdvo.c */ |
1089 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob); |
1181 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob); |
1090 | 1182 | ||
1091 | 1183 | ||
- | 1184 | /* intel_sprite.c */ |
|
- | 1185 | int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane); |
|
- | 1186 | void intel_flush_primary_plane(struct drm_i915_private *dev_priv, |
|
1092 | /* intel_sprite.c */ |
1187 | enum plane plane); |
1093 | int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane); |
1188 | int intel_plane_set_property(struct drm_plane *plane, |
1094 | void intel_flush_primary_plane(struct drm_i915_private *dev_priv, |
1189 | struct drm_property *prop, |
1095 | enum plane plane); |
1190 | uint64_t val); |
1096 | void intel_plane_restore(struct drm_plane *plane); |
1191 | int intel_plane_restore(struct drm_plane *plane); |
1097 | void intel_plane_disable(struct drm_plane *plane); |
1192 | void intel_plane_disable(struct drm_plane *plane); |
1098 | int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
- | |
- | 1193 | int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
|
- | 1194 | struct drm_file *file_priv); |
|
- | 1195 | int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
|
Line 1099... | Line 1196... | ||
1099 | struct drm_file *file_priv); |
1196 | struct drm_file *file_priv); |
1100 | int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
1197 | bool intel_pipe_update_start(struct intel_crtc *crtc, |
Line 1101... | Line 1198... | ||
1101 | struct drm_file *file_priv); |
1198 | uint32_t *start_vbl_count); |