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Rev 4280 | Rev 4560 | ||
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Line 68... | Line 68... | ||
68 | #define wait_for(COND, MS) _wait_for(COND, MS, 1) |
68 | #define wait_for(COND, MS) _wait_for(COND, MS, 1) |
69 | #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0) |
69 | #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0) |
70 | #define wait_for_atomic_us(COND, US) _wait_for((COND), \ |
70 | #define wait_for_atomic_us(COND, US) _wait_for((COND), \ |
71 | DIV_ROUND_UP((US), 1000), 0) |
71 | DIV_ROUND_UP((US), 1000), 0) |
Line 72... | Line 72... | ||
72 | 72 | ||
73 | #define KHz(x) (1000*x) |
73 | #define KHz(x) (1000 * (x)) |
Line 74... | Line 74... | ||
74 | #define MHz(x) KHz(1000*x) |
74 | #define MHz(x) KHz(1000 * (x)) |
75 | 75 | ||
76 | /* |
76 | /* |
Line 77... | Line 77... | ||
77 | * Display related stuff |
77 | * Display related stuff |
78 | */ |
78 | */ |
79 | 79 | ||
80 | /* store information about an Ixxx DVO */ |
80 | /* store information about an Ixxx DVO */ |
81 | /* The i830->i865 use multiple DVOs with multiple i2cs */ |
81 | /* The i830->i865 use multiple DVOs with multiple i2cs */ |
82 | /* the i915, i945 have a single sDVO i2c bus - which is different */ |
- | |
Line 83... | Line 82... | ||
83 | #define MAX_OUTPUTS 6 |
82 | /* the i915, i945 have a single sDVO i2c bus - which is different */ |
84 | /* maximum connectors per crtcs in the mode set */ |
83 | #define MAX_OUTPUTS 6 |
Line 85... | Line 84... | ||
85 | #define INTELFB_CONN_LIMIT 4 |
84 | /* maximum connectors per crtcs in the mode set */ |
Line 96... | Line 95... | ||
96 | #define INTEL_OUTPUT_LVDS 4 |
95 | #define INTEL_OUTPUT_LVDS 4 |
97 | #define INTEL_OUTPUT_TVOUT 5 |
96 | #define INTEL_OUTPUT_TVOUT 5 |
98 | #define INTEL_OUTPUT_HDMI 6 |
97 | #define INTEL_OUTPUT_HDMI 6 |
99 | #define INTEL_OUTPUT_DISPLAYPORT 7 |
98 | #define INTEL_OUTPUT_DISPLAYPORT 7 |
100 | #define INTEL_OUTPUT_EDP 8 |
99 | #define INTEL_OUTPUT_EDP 8 |
- | 100 | #define INTEL_OUTPUT_DSI 9 |
|
101 | #define INTEL_OUTPUT_UNKNOWN 9 |
101 | #define INTEL_OUTPUT_UNKNOWN 10 |
Line 102... | Line 102... | ||
102 | 102 | ||
103 | #define INTEL_DVO_CHIP_NONE 0 |
103 | #define INTEL_DVO_CHIP_NONE 0 |
104 | #define INTEL_DVO_CHIP_LVDS 1 |
104 | #define INTEL_DVO_CHIP_LVDS 1 |
105 | #define INTEL_DVO_CHIP_TMDS 2 |
105 | #define INTEL_DVO_CHIP_TMDS 2 |
Line -... | Line 106... | ||
- | 106 | #define INTEL_DVO_CHIP_TVOUT 4 |
|
- | 107 | ||
- | 108 | #define INTEL_DSI_COMMAND_MODE 0 |
|
106 | #define INTEL_DVO_CHIP_TVOUT 4 |
109 | #define INTEL_DSI_VIDEO_MODE 1 |
107 | 110 | ||
108 | struct intel_framebuffer { |
111 | struct intel_framebuffer { |
109 | struct drm_framebuffer base; |
112 | struct drm_framebuffer base; |
Line 155... | Line 158... | ||
155 | enum hpd_pin hpd_pin; |
158 | enum hpd_pin hpd_pin; |
156 | }; |
159 | }; |
Line 157... | Line 160... | ||
157 | 160 | ||
158 | struct intel_panel { |
161 | struct intel_panel { |
- | 162 | struct drm_display_mode *fixed_mode; |
|
159 | struct drm_display_mode *fixed_mode; |
163 | struct drm_display_mode *downclock_mode; |
- | 164 | int fitting_mode; |
|
- | 165 | ||
- | 166 | /* backlight */ |
|
- | 167 | struct { |
|
- | 168 | bool present; |
|
- | 169 | u32 level; |
|
- | 170 | u32 max; |
|
- | 171 | bool enabled; |
|
- | 172 | bool combination_mode; /* gen 2/4 only */ |
|
- | 173 | bool active_low_pwm; |
|
- | 174 | struct backlight_device *device; |
|
160 | int fitting_mode; |
175 | } backlight; |
Line 161... | Line 176... | ||
161 | }; |
176 | }; |
162 | 177 | ||
163 | struct intel_connector { |
178 | struct intel_connector { |
Line 210... | Line 225... | ||
210 | * accordingly. |
225 | * accordingly. |
211 | */ |
226 | */ |
212 | #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ |
227 | #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ |
213 | unsigned long quirks; |
228 | unsigned long quirks; |
Line -... | Line 229... | ||
- | 229 | ||
- | 230 | /* User requested mode, only valid as a starting point to |
|
- | 231 | * compute adjusted_mode, except in the case of (S)DVO where |
|
- | 232 | * it's also for the output timings of the (S)DVO chip. |
|
- | 233 | * adjusted_mode will then correspond to the S(DVO) chip's |
|
214 | 234 | * preferred input timings. */ |
|
- | 235 | struct drm_display_mode requested_mode; |
|
- | 236 | /* Actual pipe timings ie. what we program into the pipe timing |
|
215 | struct drm_display_mode requested_mode; |
237 | * registers. adjusted_mode.crtc_clock is the pipe pixel clock. */ |
- | 238 | struct drm_display_mode adjusted_mode; |
|
- | 239 | ||
- | 240 | /* Pipe source size (ie. panel fitter input size) |
|
- | 241 | * All planes will be positioned inside this space, |
|
- | 242 | * and get clipped at the edges. */ |
|
- | 243 | int pipe_src_w, pipe_src_h; |
|
216 | struct drm_display_mode adjusted_mode; |
244 | |
217 | /* Whether to set up the PCH/FDI. Note that we never allow sharing |
245 | /* Whether to set up the PCH/FDI. Note that we never allow sharing |
218 | * between pch encoders and cpu encoders. */ |
246 | * between pch encoders and cpu encoders. */ |
Line 219... | Line 247... | ||
219 | bool has_pch_encoder; |
247 | bool has_pch_encoder; |
Line 265... | Line 293... | ||
265 | int pipe_bpp; |
293 | int pipe_bpp; |
266 | struct intel_link_m_n dp_m_n; |
294 | struct intel_link_m_n dp_m_n; |
Line 267... | Line 295... | ||
267 | 295 | ||
268 | /* |
296 | /* |
269 | * Frequence the dpll for the port should run at. Differs from the |
297 | * Frequence the dpll for the port should run at. Differs from the |
- | 298 | * adjusted dotclock e.g. for DP or 12bpc hdmi mode. This is also |
|
270 | * adjusted dotclock e.g. for DP or 12bpc hdmi mode. |
299 | * already multiplied by pixel_multiplier. |
271 | */ |
300 | */ |
Line 272... | Line 301... | ||
272 | int port_clock; |
301 | int port_clock; |
273 | 302 | ||
Line 291... | Line 320... | ||
291 | /* FDI configuration, only valid if has_pch_encoder is set. */ |
320 | /* FDI configuration, only valid if has_pch_encoder is set. */ |
292 | int fdi_lanes; |
321 | int fdi_lanes; |
293 | struct intel_link_m_n fdi_m_n; |
322 | struct intel_link_m_n fdi_m_n; |
Line 294... | Line 323... | ||
294 | 323 | ||
- | 324 | bool ips_enabled; |
|
- | 325 | ||
- | 326 | bool double_wide; |
|
- | 327 | }; |
|
- | 328 | ||
- | 329 | struct intel_pipe_wm { |
|
- | 330 | struct intel_wm_level wm[5]; |
|
- | 331 | uint32_t linetime; |
|
295 | bool ips_enabled; |
332 | bool fbc_wm_enabled; |
Line 296... | Line 333... | ||
296 | }; |
333 | }; |
297 | 334 | ||
298 | struct intel_crtc { |
335 | struct intel_crtc { |
Line 304... | Line 341... | ||
304 | * Whether the crtc and the connected output pipeline is active. Implies |
341 | * Whether the crtc and the connected output pipeline is active. Implies |
305 | * that crtc->enabled is set, i.e. the current mode configuration has |
342 | * that crtc->enabled is set, i.e. the current mode configuration has |
306 | * some outputs connected to this crtc. |
343 | * some outputs connected to this crtc. |
307 | */ |
344 | */ |
308 | bool active; |
345 | bool active; |
- | 346 | unsigned long enabled_power_domains; |
|
309 | bool eld_vld; |
347 | bool eld_vld; |
310 | bool primary_disabled; /* is the crtc obscured by a plane? */ |
348 | bool primary_enabled; /* is the primary plane (partially) visible? */ |
311 | bool lowfreq_avail; |
349 | bool lowfreq_avail; |
312 | struct intel_overlay *overlay; |
350 | struct intel_overlay *overlay; |
313 | struct intel_unpin_work *unpin_work; |
351 | struct intel_unpin_work *unpin_work; |
Line 314... | Line 352... | ||
314 | 352 | ||
Line 333... | Line 371... | ||
333 | unsigned int reset_counter; |
371 | unsigned int reset_counter; |
Line 334... | Line 372... | ||
334 | 372 | ||
335 | /* Access to these should be protected by dev_priv->irq_lock. */ |
373 | /* Access to these should be protected by dev_priv->irq_lock. */ |
336 | bool cpu_fifo_underrun_disabled; |
374 | bool cpu_fifo_underrun_disabled; |
- | 375 | bool pch_fifo_underrun_disabled; |
|
- | 376 | ||
- | 377 | /* per-pipe watermark state */ |
|
- | 378 | struct { |
|
- | 379 | /* watermarks currently being used */ |
|
- | 380 | struct intel_pipe_wm active; |
|
337 | bool pch_fifo_underrun_disabled; |
381 | } wm; |
Line 338... | Line 382... | ||
338 | }; |
382 | }; |
339 | 383 | ||
340 | struct intel_plane_wm_parameters { |
384 | struct intel_plane_wm_parameters { |
Line 414... | Line 458... | ||
414 | bool has_audio; |
458 | bool has_audio; |
415 | enum hdmi_force_audio force_audio; |
459 | enum hdmi_force_audio force_audio; |
416 | bool rgb_quant_range_selectable; |
460 | bool rgb_quant_range_selectable; |
417 | void (*write_infoframe)(struct drm_encoder *encoder, |
461 | void (*write_infoframe)(struct drm_encoder *encoder, |
418 | enum hdmi_infoframe_type type, |
462 | enum hdmi_infoframe_type type, |
419 | const uint8_t *frame, ssize_t len); |
463 | const void *frame, ssize_t len); |
420 | void (*set_infoframes)(struct drm_encoder *encoder, |
464 | void (*set_infoframes)(struct drm_encoder *encoder, |
421 | struct drm_display_mode *adjusted_mode); |
465 | struct drm_display_mode *adjusted_mode); |
422 | }; |
466 | }; |
Line 423... | Line 467... | ||
423 | 467 | ||
424 | #define DP_MAX_DOWNSTREAM_PORTS 0x10 |
- | |
Line 425... | Line 468... | ||
425 | #define DP_LINK_CONFIGURATION_SIZE 9 |
468 | #define DP_MAX_DOWNSTREAM_PORTS 0x10 |
426 | 469 | ||
427 | struct intel_dp { |
470 | struct intel_dp { |
428 | uint32_t output_reg; |
471 | uint32_t output_reg; |
429 | uint32_t aux_ch_ctl_reg; |
- | |
430 | uint32_t DP; |
472 | uint32_t aux_ch_ctl_reg; |
431 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]; |
473 | uint32_t DP; |
432 | bool has_audio; |
474 | bool has_audio; |
433 | enum hdmi_force_audio force_audio; |
475 | enum hdmi_force_audio force_audio; |
434 | uint32_t color_range; |
476 | uint32_t color_range; |
Line 463... | Line 505... | ||
463 | static inline int |
505 | static inline int |
464 | vlv_dport_to_channel(struct intel_digital_port *dport) |
506 | vlv_dport_to_channel(struct intel_digital_port *dport) |
465 | { |
507 | { |
466 | switch (dport->port) { |
508 | switch (dport->port) { |
467 | case PORT_B: |
509 | case PORT_B: |
468 | return 0; |
510 | return DPIO_CH0; |
469 | case PORT_C: |
511 | case PORT_C: |
470 | return 1; |
512 | return DPIO_CH1; |
471 | default: |
513 | default: |
472 | BUG(); |
514 | BUG(); |
473 | } |
515 | } |
474 | } |
516 | } |
Line 498... | Line 540... | ||
498 | #define INTEL_FLIP_PENDING 1 |
540 | #define INTEL_FLIP_PENDING 1 |
499 | #define INTEL_FLIP_COMPLETE 2 |
541 | #define INTEL_FLIP_COMPLETE 2 |
500 | bool enable_stall_check; |
542 | bool enable_stall_check; |
501 | }; |
543 | }; |
Line 502... | Line -... | ||
502 | - | ||
503 | int intel_pch_rawclk(struct drm_device *dev); |
- | |
504 | - | ||
505 | int intel_connector_update_modes(struct drm_connector *connector, |
- | |
506 | struct edid *edid); |
- | |
507 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); |
- | |
508 | - | ||
509 | extern void intel_attach_force_audio_property(struct drm_connector *connector); |
- | |
510 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
- | |
511 | - | ||
512 | extern bool intel_pipe_has_type(struct drm_crtc *crtc, int type); |
- | |
513 | extern void intel_crt_init(struct drm_device *dev); |
- | |
514 | extern void intel_hdmi_init(struct drm_device *dev, |
- | |
515 | int hdmi_reg, enum port port); |
- | |
516 | extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, |
- | |
517 | struct intel_connector *intel_connector); |
- | |
518 | extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); |
- | |
519 | extern bool intel_hdmi_compute_config(struct intel_encoder *encoder, |
- | |
520 | struct intel_crtc_config *pipe_config); |
- | |
521 | extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, |
- | |
522 | bool is_sdvob); |
- | |
523 | extern void intel_dvo_init(struct drm_device *dev); |
- | |
524 | extern void intel_tv_init(struct drm_device *dev); |
- | |
525 | extern void intel_mark_busy(struct drm_device *dev); |
- | |
526 | extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj, |
- | |
527 | struct intel_ring_buffer *ring); |
- | |
528 | extern void intel_mark_idle(struct drm_device *dev); |
- | |
529 | extern void intel_lvds_init(struct drm_device *dev); |
- | |
530 | extern bool intel_is_dual_link_lvds(struct drm_device *dev); |
- | |
531 | extern void intel_dp_init(struct drm_device *dev, int output_reg, |
- | |
532 | enum port port); |
- | |
533 | extern bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
- | |
534 | struct intel_connector *intel_connector); |
- | |
535 | extern void intel_dp_init_link_config(struct intel_dp *intel_dp); |
- | |
536 | extern void intel_dp_start_link_train(struct intel_dp *intel_dp); |
- | |
537 | extern void intel_dp_complete_link_train(struct intel_dp *intel_dp); |
- | |
538 | extern void intel_dp_stop_link_train(struct intel_dp *intel_dp); |
- | |
539 | extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); |
- | |
540 | extern void intel_dp_encoder_destroy(struct drm_encoder *encoder); |
- | |
541 | extern void intel_dp_check_link_status(struct intel_dp *intel_dp); |
- | |
542 | extern bool intel_dp_compute_config(struct intel_encoder *encoder, |
- | |
543 | struct intel_crtc_config *pipe_config); |
- | |
544 | extern bool intel_dpd_is_edp(struct drm_device *dev); |
- | |
545 | extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp); |
- | |
546 | extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp); |
- | |
547 | extern void ironlake_edp_panel_on(struct intel_dp *intel_dp); |
- | |
548 | extern void ironlake_edp_panel_off(struct intel_dp *intel_dp); |
- | |
549 | extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp); |
- | |
550 | extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); |
- | |
551 | extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane); |
- | |
552 | extern void intel_flush_display_plane(struct drm_i915_private *dev_priv, |
- | |
553 | enum plane plane); |
- | |
554 | - | ||
555 | /* intel_panel.c */ |
- | |
556 | extern int intel_panel_init(struct intel_panel *panel, |
- | |
557 | struct drm_display_mode *fixed_mode); |
- | |
558 | extern void intel_panel_fini(struct intel_panel *panel); |
- | |
559 | - | ||
560 | extern void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
- | |
561 | struct drm_display_mode *adjusted_mode); |
- | |
562 | extern void intel_pch_panel_fitting(struct intel_crtc *crtc, |
- | |
563 | struct intel_crtc_config *pipe_config, |
- | |
564 | int fitting_mode); |
- | |
565 | extern void intel_gmch_panel_fitting(struct intel_crtc *crtc, |
- | |
566 | struct intel_crtc_config *pipe_config, |
- | |
567 | int fitting_mode); |
- | |
568 | extern void intel_panel_set_backlight(struct drm_device *dev, |
- | |
569 | u32 level, u32 max); |
- | |
570 | extern int intel_panel_setup_backlight(struct drm_connector *connector); |
- | |
571 | extern void intel_panel_enable_backlight(struct drm_device *dev, |
- | |
572 | enum pipe pipe); |
- | |
573 | extern void intel_panel_disable_backlight(struct drm_device *dev); |
- | |
574 | extern void intel_panel_destroy_backlight(struct drm_device *dev); |
- | |
575 | extern enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
- | |
576 | 544 | ||
577 | struct intel_set_config { |
545 | struct intel_set_config { |
578 | struct drm_encoder **save_connector_encoders; |
546 | struct drm_encoder **save_connector_encoders; |
Line 579... | Line 547... | ||
579 | struct drm_crtc **save_encoder_crtcs; |
547 | struct drm_crtc **save_encoder_crtcs; |
580 | 548 | ||
581 | bool fb_changed; |
549 | bool fb_changed; |
Line 582... | Line -... | ||
582 | bool mode_changed; |
- | |
583 | }; |
550 | bool mode_changed; |
584 | 551 | }; |
|
585 | extern void intel_crtc_restore_mode(struct drm_crtc *crtc); |
- | |
586 | extern void intel_crtc_load_lut(struct drm_crtc *crtc); |
- | |
587 | extern void intel_crtc_update_dpms(struct drm_crtc *crtc); |
- | |
588 | extern void intel_encoder_destroy(struct drm_encoder *encoder); |
- | |
589 | extern void intel_connector_dpms(struct drm_connector *, int mode); |
552 | |
590 | extern bool intel_connector_get_hw_state(struct intel_connector *connector); |
553 | struct intel_load_detect_pipe { |
591 | extern void intel_modeset_check_state(struct drm_device *dev); |
554 | struct drm_framebuffer *release_fb; |
Line -... | Line 555... | ||
- | 555 | bool load_detect_temp; |
|
592 | extern void intel_plane_restore(struct drm_plane *plane); |
556 | int dpms_mode; |
593 | extern void intel_plane_disable(struct drm_plane *plane); |
557 | }; |
594 | 558 | ||
595 | 559 | static inline struct intel_encoder * |
|
Line 596... | Line 560... | ||
596 | static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector) |
560 | intel_attached_encoder(struct drm_connector *connector) |
Line 619... | Line 583... | ||
619 | hdmi_to_dig_port(struct intel_hdmi *intel_hdmi) |
583 | hdmi_to_dig_port(struct intel_hdmi *intel_hdmi) |
620 | { |
584 | { |
621 | return container_of(intel_hdmi, struct intel_digital_port, hdmi); |
585 | return container_of(intel_hdmi, struct intel_digital_port, hdmi); |
622 | } |
586 | } |
Line -... | Line 587... | ||
- | 587 | ||
- | 588 | ||
- | 589 | /* i915_irq.c */ |
|
- | 590 | bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev, |
|
- | 591 | enum pipe pipe, bool enable); |
|
- | 592 | bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev, |
|
- | 593 | enum transcoder pch_transcoder, |
|
- | 594 | bool enable); |
|
- | 595 | void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
|
- | 596 | void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
|
- | 597 | void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
|
- | 598 | void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
|
- | 599 | void hsw_pc8_disable_interrupts(struct drm_device *dev); |
|
- | 600 | void hsw_pc8_restore_interrupts(struct drm_device *dev); |
|
- | 601 | ||
- | 602 | ||
- | 603 | /* intel_crt.c */ |
|
- | 604 | void intel_crt_init(struct drm_device *dev); |
|
- | 605 | ||
- | 606 | ||
- | 607 | /* intel_ddi.c */ |
|
- | 608 | void intel_prepare_ddi(struct drm_device *dev); |
|
- | 609 | void hsw_fdi_link_train(struct drm_crtc *crtc); |
|
- | 610 | void intel_ddi_init(struct drm_device *dev, enum port port); |
|
- | 611 | enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder); |
|
- | 612 | bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); |
|
- | 613 | int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv); |
|
- | 614 | void intel_ddi_pll_init(struct drm_device *dev); |
|
- | 615 | void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc); |
|
- | 616 | void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, |
|
- | 617 | enum transcoder cpu_transcoder); |
|
- | 618 | void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc); |
|
- | 619 | void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc); |
|
- | 620 | void intel_ddi_setup_hw_pll_state(struct drm_device *dev); |
|
- | 621 | bool intel_ddi_pll_select(struct intel_crtc *crtc); |
|
- | 622 | void intel_ddi_pll_enable(struct intel_crtc *crtc); |
|
- | 623 | void intel_ddi_put_crtc_pll(struct drm_crtc *crtc); |
|
- | 624 | void intel_ddi_set_pipe_settings(struct drm_crtc *crtc); |
|
- | 625 | void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder); |
|
- | 626 | bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); |
|
- | 627 | void intel_ddi_fdi_disable(struct drm_crtc *crtc); |
|
- | 628 | void intel_ddi_get_config(struct intel_encoder *encoder, |
|
- | 629 | struct intel_crtc_config *pipe_config); |
|
- | 630 | ||
- | 631 | ||
- | 632 | /* intel_display.c */ |
|
- | 633 | const char *intel_output_name(int output); |
|
- | 634 | bool intel_has_pending_fb_unpin(struct drm_device *dev); |
|
- | 635 | int intel_pch_rawclk(struct drm_device *dev); |
|
- | 636 | void intel_mark_busy(struct drm_device *dev); |
|
- | 637 | void intel_mark_fb_busy(struct drm_i915_gem_object *obj, |
|
- | 638 | struct intel_ring_buffer *ring); |
|
- | 639 | void intel_mark_idle(struct drm_device *dev); |
|
- | 640 | void intel_crtc_restore_mode(struct drm_crtc *crtc); |
|
- | 641 | void intel_crtc_update_dpms(struct drm_crtc *crtc); |
|
- | 642 | void intel_encoder_destroy(struct drm_encoder *encoder); |
|
- | 643 | void intel_connector_dpms(struct drm_connector *, int mode); |
|
- | 644 | bool intel_connector_get_hw_state(struct intel_connector *connector); |
|
623 | 645 | void intel_modeset_check_state(struct drm_device *dev); |
|
624 | bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, |
646 | bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, |
625 | struct intel_digital_port *port); |
- | |
626 | 647 | struct intel_digital_port *port); |
|
627 | extern void intel_connector_attach_encoder(struct intel_connector *connector, |
648 | void intel_connector_attach_encoder(struct intel_connector *connector, |
628 | struct intel_encoder *encoder); |
649 | struct intel_encoder *encoder); |
629 | extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector); |
- | |
630 | 650 | struct drm_encoder *intel_best_encoder(struct drm_connector *connector); |
|
631 | extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, |
651 | struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, |
- | 652 | struct drm_crtc *crtc); |
|
632 | struct drm_crtc *crtc); |
653 | enum pipe intel_get_pipe_from_connector(struct intel_connector *connector); |
633 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, |
654 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, |
634 | struct drm_file *file_priv); |
- | |
635 | extern enum transcoder |
655 | struct drm_file *file_priv); |
636 | intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, |
656 | enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, |
637 | enum pipe pipe); |
657 | enum pipe pipe); |
638 | extern void intel_wait_for_vblank(struct drm_device *dev, int pipe); |
658 | void intel_wait_for_vblank(struct drm_device *dev, int pipe); |
639 | extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe); |
659 | void intel_wait_for_pipe_off(struct drm_device *dev, int pipe); |
640 | extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp); |
660 | int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp); |
641 | extern void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port); |
- | |
642 | 661 | void vlv_wait_port_ready(struct drm_i915_private *dev_priv, |
|
643 | struct intel_load_detect_pipe { |
- | |
644 | struct drm_framebuffer *release_fb; |
- | |
645 | bool load_detect_temp; |
- | |
646 | int dpms_mode; |
- | |
647 | }; |
662 | struct intel_digital_port *dport); |
648 | extern bool intel_get_load_detect_pipe(struct drm_connector *connector, |
663 | bool intel_get_load_detect_pipe(struct drm_connector *connector, |
649 | struct drm_display_mode *mode, |
664 | struct drm_display_mode *mode, |
650 | struct intel_load_detect_pipe *old); |
665 | struct intel_load_detect_pipe *old); |
651 | extern void intel_release_load_detect_pipe(struct drm_connector *connector, |
666 | void intel_release_load_detect_pipe(struct drm_connector *connector, |
652 | struct intel_load_detect_pipe *old); |
- | |
653 | - | ||
654 | extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
- | |
655 | u16 blue, int regno); |
- | |
656 | extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
- | |
657 | u16 *blue, int regno); |
- | |
658 | 667 | struct intel_load_detect_pipe *old); |
|
659 | extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, |
668 | int intel_pin_and_fence_fb_obj(struct drm_device *dev, |
660 | struct drm_i915_gem_object *obj, |
669 | struct drm_i915_gem_object *obj, |
661 | struct intel_ring_buffer *pipelined); |
670 | struct intel_ring_buffer *pipelined); |
662 | extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); |
- | |
663 | 671 | void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); |
|
664 | extern int intel_framebuffer_init(struct drm_device *dev, |
672 | int intel_framebuffer_init(struct drm_device *dev, |
665 | struct intel_framebuffer *ifb, |
673 | struct intel_framebuffer *ifb, |
666 | struct drm_mode_fb_cmd2 *mode_cmd, |
674 | struct drm_mode_fb_cmd2 *mode_cmd, |
667 | struct drm_i915_gem_object *obj); |
675 | struct drm_i915_gem_object *obj); |
668 | extern void intel_framebuffer_fini(struct intel_framebuffer *fb); |
- | |
669 | extern int intel_fbdev_init(struct drm_device *dev); |
- | |
670 | extern void intel_fbdev_initial_config(struct drm_device *dev); |
- | |
671 | extern void intel_fbdev_fini(struct drm_device *dev); |
- | |
672 | extern void intel_fbdev_set_suspend(struct drm_device *dev, int state); |
676 | void intel_framebuffer_fini(struct intel_framebuffer *fb); |
673 | extern void intel_prepare_page_flip(struct drm_device *dev, int plane); |
677 | void intel_prepare_page_flip(struct drm_device *dev, int plane); |
674 | extern void intel_finish_page_flip(struct drm_device *dev, int pipe); |
678 | void intel_finish_page_flip(struct drm_device *dev, int pipe); |
675 | extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane); |
- | |
676 | - | ||
677 | extern void intel_setup_overlay(struct drm_device *dev); |
- | |
678 | extern void intel_cleanup_overlay(struct drm_device *dev); |
- | |
679 | extern int intel_overlay_switch_off(struct intel_overlay *overlay); |
- | |
680 | extern int intel_overlay_put_image(struct drm_device *dev, void *data, |
- | |
681 | struct drm_file *file_priv); |
- | |
682 | extern int intel_overlay_attrs(struct drm_device *dev, void *data, |
- | |
683 | struct drm_file *file_priv); |
- | |
684 | - | ||
685 | extern void intel_fb_output_poll_changed(struct drm_device *dev); |
- | |
686 | extern void intel_fb_restore_mode(struct drm_device *dev); |
- | |
687 | - | ||
688 | struct intel_shared_dpll * |
679 | void intel_finish_page_flip_plane(struct drm_device *dev, int plane); |
689 | intel_crtc_to_shared_dpll(struct intel_crtc *crtc); |
- | |
690 | 680 | struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc); |
|
691 | void assert_shared_dpll(struct drm_i915_private *dev_priv, |
681 | void assert_shared_dpll(struct drm_i915_private *dev_priv, |
692 | struct intel_shared_dpll *pll, |
682 | struct intel_shared_dpll *pll, |
693 | bool state); |
683 | bool state); |
694 | #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true) |
684 | #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true) |
Line 699... | Line 689... | ||
699 | #define assert_pll_disabled(d, p) assert_pll(d, p, false) |
689 | #define assert_pll_disabled(d, p) assert_pll(d, p, false) |
700 | void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, |
690 | void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, |
701 | enum pipe pipe, bool state); |
691 | enum pipe pipe, bool state); |
702 | #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true) |
692 | #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true) |
703 | #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false) |
693 | #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false) |
704 | extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, |
694 | void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state); |
705 | bool state); |
- | |
706 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) |
695 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) |
707 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) |
696 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) |
708 | - | ||
709 | extern void intel_init_clock_gating(struct drm_device *dev); |
- | |
710 | extern void intel_suspend_hw(struct drm_device *dev); |
- | |
711 | extern void intel_write_eld(struct drm_encoder *encoder, |
697 | void intel_write_eld(struct drm_encoder *encoder, |
712 | struct drm_display_mode *mode); |
698 | struct drm_display_mode *mode); |
713 | extern void intel_prepare_ddi(struct drm_device *dev); |
- | |
714 | extern void hsw_fdi_link_train(struct drm_crtc *crtc); |
- | |
715 | extern void intel_ddi_init(struct drm_device *dev, enum port port); |
- | |
716 | - | ||
717 | /* For use by IVB LP watermark workaround in intel_sprite.c */ |
- | |
718 | extern void intel_update_watermarks(struct drm_device *dev); |
- | |
719 | extern void intel_update_sprite_watermarks(struct drm_plane *plane, |
- | |
720 | struct drm_crtc *crtc, |
- | |
721 | uint32_t sprite_width, int pixel_size, |
- | |
722 | bool enabled, bool scaled); |
- | |
723 | - | ||
724 | extern unsigned long intel_gen4_compute_page_offset(int *x, int *y, |
699 | unsigned long intel_gen4_compute_page_offset(int *x, int *y, |
725 | unsigned int tiling_mode, |
700 | unsigned int tiling_mode, |
726 | unsigned int bpp, |
701 | unsigned int bpp, |
727 | unsigned int pitch); |
702 | unsigned int pitch); |
- | 703 | void intel_display_handle_reset(struct drm_device *dev); |
|
- | 704 | void hsw_enable_pc8_work(struct work_struct *__work); |
|
- | 705 | void hsw_enable_package_c8(struct drm_i915_private *dev_priv); |
|
- | 706 | void hsw_disable_package_c8(struct drm_i915_private *dev_priv); |
|
- | 707 | void intel_dp_get_m_n(struct intel_crtc *crtc, |
|
- | 708 | struct intel_crtc_config *pipe_config); |
|
- | 709 | int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); |
|
- | 710 | void |
|
- | 711 | ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config, |
|
- | 712 | int dotclock); |
|
- | 713 | bool intel_crtc_active(struct drm_crtc *crtc); |
|
- | 714 | void hsw_enable_ips(struct intel_crtc *crtc); |
|
- | 715 | void hsw_disable_ips(struct intel_crtc *crtc); |
|
- | 716 | void intel_display_set_init_power(struct drm_device *dev, bool enable); |
|
- | 717 | int valleyview_get_vco(struct drm_i915_private *dev_priv); |
|
- | 718 | ||
- | 719 | /* intel_dp.c */ |
|
- | 720 | void intel_dp_init(struct drm_device *dev, int output_reg, enum port port); |
|
- | 721 | bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
|
- | 722 | struct intel_connector *intel_connector); |
|
- | 723 | void intel_dp_start_link_train(struct intel_dp *intel_dp); |
|
- | 724 | void intel_dp_complete_link_train(struct intel_dp *intel_dp); |
|
- | 725 | void intel_dp_stop_link_train(struct intel_dp *intel_dp); |
|
- | 726 | void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); |
|
- | 727 | void intel_dp_encoder_destroy(struct drm_encoder *encoder); |
|
- | 728 | void intel_dp_check_link_status(struct intel_dp *intel_dp); |
|
- | 729 | bool intel_dp_compute_config(struct intel_encoder *encoder, |
|
- | 730 | struct intel_crtc_config *pipe_config); |
|
- | 731 | bool intel_dp_is_edp(struct drm_device *dev, enum port port); |
|
- | 732 | void ironlake_edp_backlight_on(struct intel_dp *intel_dp); |
|
- | 733 | void ironlake_edp_backlight_off(struct intel_dp *intel_dp); |
|
- | 734 | void ironlake_edp_panel_on(struct intel_dp *intel_dp); |
|
- | 735 | void ironlake_edp_panel_off(struct intel_dp *intel_dp); |
|
- | 736 | void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp); |
|
- | 737 | void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); |
|
- | 738 | void intel_edp_psr_enable(struct intel_dp *intel_dp); |
|
- | 739 | void intel_edp_psr_disable(struct intel_dp *intel_dp); |
|
- | 740 | void intel_edp_psr_update(struct drm_device *dev); |
|
- | 741 | ||
- | 742 | ||
- | 743 | /* intel_dsi.c */ |
|
- | 744 | bool intel_dsi_init(struct drm_device *dev); |
|
- | 745 | ||
Line -... | Line 746... | ||
- | 746 | ||
- | 747 | /* intel_dvo.c */ |
|
- | 748 | void intel_dvo_init(struct drm_device *dev); |
|
- | 749 | ||
- | 750 | ||
- | 751 | /* legacy fbdev emulation in intel_fbdev.c */ |
|
- | 752 | #ifdef CONFIG_DRM_I915_FBDEV |
|
- | 753 | extern int intel_fbdev_init(struct drm_device *dev); |
|
- | 754 | extern void intel_fbdev_initial_config(struct drm_device *dev); |
|
- | 755 | extern void intel_fbdev_fini(struct drm_device *dev); |
|
- | 756 | extern void intel_fbdev_set_suspend(struct drm_device *dev, int state); |
|
- | 757 | extern void intel_fbdev_output_poll_changed(struct drm_device *dev); |
|
- | 758 | extern void intel_fbdev_restore_mode(struct drm_device *dev); |
|
- | 759 | #else |
|
- | 760 | static inline int intel_fbdev_init(struct drm_device *dev) |
|
- | 761 | { |
|
- | 762 | return 0; |
|
- | 763 | } |
|
- | 764 | ||
- | 765 | static inline void intel_fbdev_initial_config(struct drm_device *dev) |
|
- | 766 | { |
|
- | 767 | } |
|
- | 768 | ||
- | 769 | static inline void intel_fbdev_fini(struct drm_device *dev) |
|
- | 770 | { |
|
- | 771 | } |
|
- | 772 | ||
- | 773 | static inline void intel_fbdev_set_suspend(struct drm_device *dev, int state) |
|
- | 774 | { |
|
- | 775 | } |
|
- | 776 | ||
- | 777 | static inline void intel_fbdev_restore_mode(struct drm_device *dev) |
|
- | 778 | { |
|
- | 779 | } |
|
- | 780 | #endif |
|
- | 781 | ||
- | 782 | /* intel_hdmi.c */ |
|
- | 783 | void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port); |
|
- | 784 | void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, |
|
- | 785 | struct intel_connector *intel_connector); |
|
- | 786 | struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); |
|
- | 787 | bool intel_hdmi_compute_config(struct intel_encoder *encoder, |
|
- | 788 | struct intel_crtc_config *pipe_config); |
|
- | 789 | ||
- | 790 | ||
- | 791 | /* intel_lvds.c */ |
|
- | 792 | void intel_lvds_init(struct drm_device *dev); |
|
- | 793 | bool intel_is_dual_link_lvds(struct drm_device *dev); |
|
- | 794 | ||
- | 795 | ||
- | 796 | /* intel_modes.c */ |
|
- | 797 | int intel_connector_update_modes(struct drm_connector *connector, |
|
- | 798 | struct edid *edid); |
|
- | 799 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); |
|
- | 800 | void intel_attach_force_audio_property(struct drm_connector *connector); |
|
- | 801 | void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
|
- | 802 | ||
- | 803 | ||
- | 804 | /* intel_overlay.c */ |
|
- | 805 | void intel_setup_overlay(struct drm_device *dev); |
|
- | 806 | void intel_cleanup_overlay(struct drm_device *dev); |
|
728 | 807 | int intel_overlay_switch_off(struct intel_overlay *overlay); |
|
729 | extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
808 | int intel_overlay_put_image(struct drm_device *dev, void *data, |
730 | struct drm_file *file_priv); |
809 | struct drm_file *file_priv); |
731 | extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
810 | int intel_overlay_attrs(struct drm_device *dev, void *data, |
Line 732... | Line -... | ||
732 | struct drm_file *file_priv); |
- | |
733 | - | ||
734 | /* Power-related functions, located in intel_pm.c */ |
- | |
735 | extern void intel_init_pm(struct drm_device *dev); |
- | |
736 | /* FBC */ |
- | |
737 | extern bool intel_fbc_enabled(struct drm_device *dev); |
- | |
738 | extern void intel_update_fbc(struct drm_device *dev); |
- | |
739 | /* IPS */ |
- | |
740 | extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
- | |
741 | extern void intel_gpu_ips_teardown(void); |
- | |
742 | - | ||
743 | /* Power well */ |
- | |
Line -... | Line 811... | ||
- | 811 | struct drm_file *file_priv); |
|
- | 812 | ||
- | 813 | ||
- | 814 | /* intel_panel.c */ |
|
- | 815 | int intel_panel_init(struct intel_panel *panel, |
|
- | 816 | struct drm_display_mode *fixed_mode); |
|
- | 817 | void intel_panel_fini(struct intel_panel *panel); |
|
- | 818 | void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
|
- | 819 | struct drm_display_mode *adjusted_mode); |
|
- | 820 | void intel_pch_panel_fitting(struct intel_crtc *crtc, |
|
- | 821 | struct intel_crtc_config *pipe_config, |
|
- | 822 | int fitting_mode); |
|
- | 823 | void intel_gmch_panel_fitting(struct intel_crtc *crtc, |
|
- | 824 | struct intel_crtc_config *pipe_config, |
|
- | 825 | int fitting_mode); |
|
- | 826 | void intel_panel_set_backlight(struct intel_connector *connector, u32 level, |
|
- | 827 | u32 max); |
|
- | 828 | int intel_panel_setup_backlight(struct drm_connector *connector); |
|
- | 829 | void intel_panel_enable_backlight(struct intel_connector *connector); |
|
- | 830 | void intel_panel_disable_backlight(struct intel_connector *connector); |
|
- | 831 | void intel_panel_destroy_backlight(struct drm_connector *connector); |
|
- | 832 | void intel_panel_init_backlight_funcs(struct drm_device *dev); |
|
- | 833 | enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
|
- | 834 | extern struct drm_display_mode *intel_find_panel_downclock( |
|
- | 835 | struct drm_device *dev, |
|
- | 836 | struct drm_display_mode *fixed_mode, |
|
- | 837 | struct drm_connector *connector); |
|
- | 838 | ||
- | 839 | /* intel_pm.c */ |
|
- | 840 | void intel_init_clock_gating(struct drm_device *dev); |
|
- | 841 | void intel_suspend_hw(struct drm_device *dev); |
|
- | 842 | void intel_update_watermarks(struct drm_crtc *crtc); |
|
- | 843 | void intel_update_sprite_watermarks(struct drm_plane *plane, |
|
- | 844 | struct drm_crtc *crtc, |
|
- | 845 | uint32_t sprite_width, int pixel_size, |
|
- | 846 | bool enabled, bool scaled); |
|
- | 847 | void intel_init_pm(struct drm_device *dev); |
|
- | 848 | void intel_pm_setup(struct drm_device *dev); |
|
- | 849 | bool intel_fbc_enabled(struct drm_device *dev); |
|
- | 850 | void intel_update_fbc(struct drm_device *dev); |
|
- | 851 | void intel_gpu_ips_init(struct drm_i915_private *dev_priv); |
|
744 | extern int i915_init_power_well(struct drm_device *dev); |
852 | void intel_gpu_ips_teardown(void); |
745 | extern void i915_remove_power_well(struct drm_device *dev); |
853 | int intel_power_domains_init(struct drm_device *dev); |
- | 854 | void intel_power_domains_remove(struct drm_device *dev); |
|
- | 855 | bool intel_display_power_enabled(struct drm_device *dev, |
|
746 | 856 | enum intel_display_power_domain domain); |
|
- | 857 | bool intel_display_power_enabled_sw(struct drm_device *dev, |
|
- | 858 | enum intel_display_power_domain domain); |
|
- | 859 | void intel_display_power_get(struct drm_device *dev, |
|
- | 860 | enum intel_display_power_domain domain); |
|
747 | extern bool intel_display_power_enabled(struct drm_device *dev, |
861 | void intel_display_power_put(struct drm_device *dev, |
748 | enum intel_display_power_domain domain); |
862 | enum intel_display_power_domain domain); |
749 | extern void intel_init_power_well(struct drm_device *dev); |
863 | void intel_power_domains_init_hw(struct drm_device *dev); |
750 | extern void intel_set_power_well(struct drm_device *dev, bool enable); |
864 | void intel_set_power_well(struct drm_device *dev, bool enable); |
751 | extern void intel_enable_gt_powersave(struct drm_device *dev); |
865 | void intel_enable_gt_powersave(struct drm_device *dev); |
- | 866 | void intel_disable_gt_powersave(struct drm_device *dev); |
|
- | 867 | void ironlake_teardown_rc6(struct drm_device *dev); |
|
- | 868 | void gen6_update_ring_freq(struct drm_device *dev); |
|
- | 869 | void gen6_rps_idle(struct drm_i915_private *dev_priv); |
|
- | 870 | void gen6_rps_boost(struct drm_i915_private *dev_priv); |
|
- | 871 | void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv); |
|
- | 872 | void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv); |
|
- | 873 | void intel_runtime_pm_get(struct drm_i915_private *dev_priv); |
|
- | 874 | void intel_runtime_pm_put(struct drm_i915_private *dev_priv); |
|
- | 875 | void intel_init_runtime_pm(struct drm_i915_private *dev_priv); |
|
- | 876 | void intel_fini_runtime_pm(struct drm_i915_private *dev_priv); |
|
- | 877 | void ilk_wm_get_hw_state(struct drm_device *dev); |
|
- | 878 | ||
- | 879 | ||
- | 880 | /* intel_sdvo.c */ |
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- | 881 | bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob); |
|
- | 882 | ||
- | 883 | ||
- | 884 | /* intel_sprite.c */ |
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- | 885 | int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane); |
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- | 886 | void intel_flush_primary_plane(struct drm_i915_private *dev_priv, |
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- | 887 | enum plane plane); |
|
- | 888 | void intel_plane_restore(struct drm_plane *plane); |
|
- | 889 | void intel_plane_disable(struct drm_plane *plane); |
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- | 890 | int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
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Line 752... | Line -... | ||
752 | extern void intel_disable_gt_powersave(struct drm_device *dev); |
- | |
753 | extern void ironlake_teardown_rc6(struct drm_device *dev); |
- | |
754 | void gen6_update_ring_freq(struct drm_device *dev); |
- | |
755 | - | ||
756 | extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder, |
- | |
757 | enum pipe *pipe); |
- | |
758 | extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv); |
- | |
759 | extern void intel_ddi_pll_init(struct drm_device *dev); |
- | |
760 | extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc); |
- | |
761 | extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, |
- | |
762 | enum transcoder cpu_transcoder); |
- | |
763 | extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc); |
- | |
764 | extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc); |
- | |
765 | extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev); |
- | |
766 | extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc); |
- | |
767 | extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc); |
- | |
768 | extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc); |
- | |
769 | extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder); |
- | |
770 | extern bool |
- | |
771 | intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); |
- | |
772 | extern void intel_ddi_fdi_disable(struct drm_crtc *crtc); |
- | |
773 | extern void intel_ddi_get_config(struct intel_encoder *encoder, |
- | |
774 | struct intel_crtc_config *pipe_config); |
- | |
775 | - | ||
776 | extern void intel_display_handle_reset(struct drm_device *dev); |
- | |
777 | extern bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev, |
- | |
778 | enum pipe pipe, |
- | |
Line 779... | Line -... | ||
779 | bool enable); |
- | |
780 | extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev, |
- | |
781 | enum transcoder pch_transcoder, |
- | |
782 | bool enable); |
- | |
783 | - | ||
784 | extern void intel_edp_psr_enable(struct intel_dp *intel_dp); |
- | |
785 | extern void intel_edp_psr_disable(struct intel_dp *intel_dp); |
- | |
786 | extern void intel_edp_psr_update(struct drm_device *dev); |
- | |
787 | extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv, |
891 | struct drm_file *file_priv); |
788 | bool switch_to_fclk, bool allow_power_down); |
- | |
789 | extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv); |
- | |
790 | extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
- | |
791 | extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, |
- | |
792 | uint32_t mask); |
- | |
793 | extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask); |
- | |
794 | extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv, |
- | |
795 | uint32_t mask); |
892 | int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
796 | extern void hsw_enable_pc8_work(struct work_struct *__work); |
- | |
797 | extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv); |
- | |
Line 798... | Line 893... | ||
798 | extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv); |
893 | struct drm_file *file_priv); |