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Rev 6084 Rev 6320
Line 1580... Line 1580...
1580 
		cfgcr2 = DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |
 1580 
		cfgcr2 = DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |
1581 
			 DPLL_CFGCR2_QDIV_MODE(wrpll_params.qdiv_mode) |
 1581 
			 DPLL_CFGCR2_QDIV_MODE(wrpll_params.qdiv_mode) |
1582 
			 DPLL_CFGCR2_KDIV(wrpll_params.kdiv) |
 1582 
			 DPLL_CFGCR2_KDIV(wrpll_params.kdiv) |
1583 
			 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) |
 1583 
			 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) |
1584 
			 wrpll_params.central_freq;
 1584 
			 wrpll_params.central_freq;
1585 
	} else if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) {
 1585 
	} else if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT ||
- 
 
 1586 
		   intel_encoder->type == INTEL_OUTPUT_DP_MST) {
1586 
		switch (crtc_state->port_clock / 2) {
 1587 
		switch (crtc_state->port_clock / 2) {
1587 
		case 81000:
 1588 
		case 81000:
1588 
			ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, 0);
 1589 
			ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, 0);
1589 
			break;
 1590 
			break;
1590 
		case 135000:
 1591 
		case 135000: