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Rev 4560 | Rev 5060 | ||
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Line 65... | Line 65... | ||
65 | enum pipe *pipe) |
65 | enum pipe *pipe) |
66 | { |
66 | { |
67 | struct drm_device *dev = encoder->base.dev; |
67 | struct drm_device *dev = encoder->base.dev; |
68 | struct drm_i915_private *dev_priv = dev->dev_private; |
68 | struct drm_i915_private *dev_priv = dev->dev_private; |
69 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
69 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
- | 70 | enum intel_display_power_domain power_domain; |
|
70 | u32 tmp; |
71 | u32 tmp; |
Line -... | Line 72... | ||
- | 72 | ||
- | 73 | power_domain = intel_display_port_power_domain(encoder); |
|
- | 74 | if (!intel_display_power_enabled(dev_priv, power_domain)) |
|
- | 75 | return false; |
|
71 | 76 | ||
Line 72... | Line 77... | ||
72 | tmp = I915_READ(crt->adpa_reg); |
77 | tmp = I915_READ(crt->adpa_reg); |
73 | 78 | ||
Line 129... | Line 134... | ||
129 | DRM_MODE_FLAG_PVSYNC | |
134 | DRM_MODE_FLAG_PVSYNC | |
130 | DRM_MODE_FLAG_NVSYNC); |
135 | DRM_MODE_FLAG_NVSYNC); |
131 | pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder); |
136 | pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder); |
132 | } |
137 | } |
Line -... | Line 138... | ||
- | 138 | ||
- | 139 | static void hsw_crt_pre_enable(struct intel_encoder *encoder) |
|
- | 140 | { |
|
- | 141 | struct drm_device *dev = encoder->base.dev; |
|
- | 142 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
- | 143 | ||
- | 144 | WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, "SPLL already enabled\n"); |
|
- | 145 | I915_WRITE(SPLL_CTL, |
|
- | 146 | SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC); |
|
- | 147 | POSTING_READ(SPLL_CTL); |
|
- | 148 | udelay(20); |
|
- | 149 | } |
|
133 | 150 | ||
134 | /* Note: The caller is required to filter out dpms modes not supported by the |
151 | /* Note: The caller is required to filter out dpms modes not supported by the |
135 | * platform. */ |
152 | * platform. */ |
136 | static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) |
153 | static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) |
137 | { |
154 | { |
138 | struct drm_device *dev = encoder->base.dev; |
155 | struct drm_device *dev = encoder->base.dev; |
139 | struct drm_i915_private *dev_priv = dev->dev_private; |
156 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | 157 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
|
- | 158 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
|
140 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
159 | struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; |
Line -... | Line 160... | ||
- | 160 | u32 adpa; |
|
141 | u32 temp; |
161 | |
- | 162 | if (INTEL_INFO(dev)->gen >= 5) |
|
- | 163 | adpa = ADPA_HOTPLUG_BITS; |
|
- | 164 | else |
|
- | 165 | adpa = 0; |
|
142 | 166 | ||
- | 167 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
|
- | 168 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; |
|
- | 169 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
|
- | 170 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; |
|
- | 171 | ||
- | 172 | /* For CPT allow 3 pipe config, for others just use A or B */ |
|
- | 173 | if (HAS_PCH_LPT(dev)) |
|
- | 174 | ; /* Those bits don't exist here */ |
|
- | 175 | else if (HAS_PCH_CPT(dev)) |
|
- | 176 | adpa |= PORT_TRANS_SEL_CPT(crtc->pipe); |
|
- | 177 | else if (crtc->pipe == 0) |
|
143 | temp = I915_READ(crt->adpa_reg); |
178 | adpa |= ADPA_PIPE_A_SELECT; |
- | 179 | else |
|
- | 180 | adpa |= ADPA_PIPE_B_SELECT; |
|
- | 181 | ||
Line 144... | Line 182... | ||
144 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); |
182 | if (!HAS_PCH_SPLIT(dev)) |
145 | temp &= ~ADPA_DAC_ENABLE; |
183 | I915_WRITE(BCLRPAT(crtc->pipe), 0); |
146 | 184 | ||
147 | switch (mode) { |
185 | switch (mode) { |
148 | case DRM_MODE_DPMS_ON: |
186 | case DRM_MODE_DPMS_ON: |
149 | temp |= ADPA_DAC_ENABLE; |
187 | adpa |= ADPA_DAC_ENABLE; |
150 | break; |
188 | break; |
151 | case DRM_MODE_DPMS_STANDBY: |
189 | case DRM_MODE_DPMS_STANDBY: |
152 | temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; |
190 | adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; |
153 | break; |
191 | break; |
154 | case DRM_MODE_DPMS_SUSPEND: |
192 | case DRM_MODE_DPMS_SUSPEND: |
155 | temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; |
193 | adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; |
156 | break; |
194 | break; |
157 | case DRM_MODE_DPMS_OFF: |
195 | case DRM_MODE_DPMS_OFF: |
Line 158... | Line 196... | ||
158 | temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; |
196 | adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; |
159 | break; |
197 | break; |
Line 160... | Line 198... | ||
160 | } |
198 | } |
161 | 199 | ||
162 | I915_WRITE(crt->adpa_reg, temp); |
200 | I915_WRITE(crt->adpa_reg, adpa); |
163 | } |
201 | } |
Line -... | Line 202... | ||
- | 202 | ||
- | 203 | static void intel_disable_crt(struct intel_encoder *encoder) |
|
- | 204 | { |
|
- | 205 | intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF); |
|
- | 206 | } |
|
- | 207 | ||
- | 208 | ||
- | 209 | static void hsw_crt_post_disable(struct intel_encoder *encoder) |
|
- | 210 | { |
|
- | 211 | struct drm_device *dev = encoder->base.dev; |
|
- | 212 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
- | 213 | uint32_t val; |
|
- | 214 | ||
- | 215 | DRM_DEBUG_KMS("Disabling SPLL\n"); |
|
164 | 216 | val = I915_READ(SPLL_CTL); |
|
165 | static void intel_disable_crt(struct intel_encoder *encoder) |
217 | WARN_ON(!(val & SPLL_PLL_ENABLE)); |
166 | { |
218 | I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE); |
Line 167... | Line 219... | ||
167 | intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF); |
219 | POSTING_READ(SPLL_CTL); |
Line 259... | Line 311... | ||
259 | 311 | ||
260 | /* LPT FDI RX only supports 8bpc. */ |
312 | /* LPT FDI RX only supports 8bpc. */ |
261 | if (HAS_PCH_LPT(dev)) |
313 | if (HAS_PCH_LPT(dev)) |
Line -... | Line 314... | ||
- | 314 | pipe_config->pipe_bpp = 24; |
|
262 | pipe_config->pipe_bpp = 24; |
315 | |
- | 316 | /* FDI must always be 2.7 GHz */ |
|
- | 317 | if (HAS_DDI(dev)) { |
|
263 | 318 | pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL; |
|
Line 264... | Line -... | ||
264 | return true; |
- | |
265 | } |
- | |
266 | - | ||
267 | static void intel_crt_mode_set(struct intel_encoder *encoder) |
- | |
268 | { |
- | |
269 | - | ||
270 | struct drm_device *dev = encoder->base.dev; |
- | |
271 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
- | |
272 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
319 | pipe_config->port_clock = 135000 * 2; |
273 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | |
274 | struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; |
- | |
275 | u32 adpa; |
- | |
276 | - | ||
277 | if (INTEL_INFO(dev)->gen >= 5) |
- | |
278 | adpa = ADPA_HOTPLUG_BITS; |
- | |
279 | else |
- | |
280 | adpa = 0; |
- | |
281 | - | ||
282 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
- | |
283 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; |
- | |
284 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
- | |
285 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; |
- | |
286 | - | ||
287 | /* For CPT allow 3 pipe config, for others just use A or B */ |
- | |
288 | if (HAS_PCH_LPT(dev)) |
- | |
289 | ; /* Those bits don't exist here */ |
- | |
290 | else if (HAS_PCH_CPT(dev)) |
- | |
291 | adpa |= PORT_TRANS_SEL_CPT(crtc->pipe); |
- | |
292 | else if (crtc->pipe == 0) |
- | |
293 | adpa |= ADPA_PIPE_A_SELECT; |
- | |
294 | else |
- | |
295 | adpa |= ADPA_PIPE_B_SELECT; |
- | |
296 | - | ||
297 | if (!HAS_PCH_SPLIT(dev)) |
- | |
298 | I915_WRITE(BCLRPAT(crtc->pipe), 0); |
320 | } |
Line 299... | Line 321... | ||
299 | 321 | ||
300 | I915_WRITE(crt->adpa_reg, adpa); |
322 | return true; |
301 | } |
323 | } |
Line 627... | Line 649... | ||
627 | 649 | ||
628 | static enum drm_connector_status |
650 | static enum drm_connector_status |
629 | intel_crt_detect(struct drm_connector *connector, bool force) |
651 | intel_crt_detect(struct drm_connector *connector, bool force) |
630 | { |
652 | { |
- | 653 | struct drm_device *dev = connector->dev; |
|
631 | struct drm_device *dev = connector->dev; |
654 | struct drm_i915_private *dev_priv = dev->dev_private; |
- | 655 | struct intel_crt *crt = intel_attached_crt(connector); |
|
- | 656 | struct intel_encoder *intel_encoder = &crt->base; |
|
632 | struct intel_crt *crt = intel_attached_crt(connector); |
657 | enum intel_display_power_domain power_domain; |
633 | enum drm_connector_status status; |
658 | enum drm_connector_status status; |
- | 659 | struct intel_load_detect_pipe tmp; |
|
Line 634... | Line 660... | ||
634 | struct intel_load_detect_pipe tmp; |
660 | struct drm_modeset_acquire_ctx ctx; |
635 | 661 | ||
636 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n", |
662 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n", |
Line -... | Line 663... | ||
- | 663 | connector->base.id, connector->name, |
|
- | 664 | force); |
|
- | 665 | ||
637 | connector->base.id, drm_get_connector_name(connector), |
666 | power_domain = intel_display_port_power_domain(intel_encoder); |
638 | force); |
667 | intel_display_power_get(dev_priv, power_domain); |
639 | 668 | ||
640 | if (I915_HAS_HOTPLUG(dev)) { |
669 | if (I915_HAS_HOTPLUG(dev)) { |
641 | /* We can not rely on the HPD pin always being correctly wired |
670 | /* We can not rely on the HPD pin always being correctly wired |
642 | * up, for example many KVM do not pass it through, and so |
671 | * up, for example many KVM do not pass it through, and so |
643 | * only trust an assertion that the monitor is connected. |
672 | * only trust an assertion that the monitor is connected. |
644 | */ |
673 | */ |
- | 674 | if (intel_crt_detect_hotplug(connector)) { |
|
645 | if (intel_crt_detect_hotplug(connector)) { |
675 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); |
646 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); |
676 | status = connector_status_connected; |
647 | return connector_status_connected; |
677 | goto out; |
Line 648... | Line 678... | ||
648 | } else |
678 | } else |
649 | DRM_DEBUG_KMS("CRT not detected via hotplug\n"); |
679 | DRM_DEBUG_KMS("CRT not detected via hotplug\n"); |
- | 680 | } |
|
- | 681 | ||
Line 650... | Line 682... | ||
650 | } |
682 | if (intel_crt_detect_ddc(connector)) { |
651 | 683 | status = connector_status_connected; |
|
652 | if (intel_crt_detect_ddc(connector)) |
684 | goto out; |
653 | return connector_status_connected; |
685 | } |
654 | 686 | ||
655 | /* Load detection is broken on HPD capable machines. Whoever wants a |
687 | /* Load detection is broken on HPD capable machines. Whoever wants a |
- | 688 | * broken monitor (without edid) to work behind a broken kvm (that fails |
|
- | 689 | * to have the right resistors for HP detection) needs to fix this up. |
|
- | 690 | * For now just bail out. */ |
|
- | 691 | if (I915_HAS_HOTPLUG(dev)) { |
|
- | 692 | status = connector_status_disconnected; |
|
- | 693 | goto out; |
|
- | 694 | } |
|
Line 656... | Line -... | ||
656 | * broken monitor (without edid) to work behind a broken kvm (that fails |
- | |
657 | * to have the right resistors for HP detection) needs to fix this up. |
695 | |
Line 658... | Line 696... | ||
658 | * For now just bail out. */ |
696 | if (!force) { |
659 | if (I915_HAS_HOTPLUG(dev)) |
697 | status = connector->status; |
660 | return connector_status_disconnected; |
698 | goto out; |
661 | 699 | } |
|
662 | if (!force) |
700 | |
663 | return connector->status; |
701 | drm_modeset_acquire_init(&ctx, 0); |
664 | 702 | ||
665 | /* for pre-945g platforms use load detect */ |
703 | /* for pre-945g platforms use load detect */ |
666 | if (intel_get_load_detect_pipe(connector, NULL, &tmp)) { |
704 | if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) { |
Line -... | Line 705... | ||
- | 705 | if (intel_crt_detect_ddc(connector)) |
|
- | 706 | status = connector_status_connected; |
|
- | 707 | else |
|
- | 708 | status = intel_crt_load_detect(crt); |
|
- | 709 | intel_release_load_detect_pipe(connector, &tmp); |
|
667 | if (intel_crt_detect_ddc(connector)) |
710 | } else |
668 | status = connector_status_connected; |
711 | status = connector_status_unknown; |
Line 669... | Line 712... | ||
669 | else |
712 | |
670 | status = intel_crt_load_detect(crt); |
713 | drm_modeset_drop_locks(&ctx); |
Line 683... | Line 726... | ||
683 | 726 | ||
684 | static int intel_crt_get_modes(struct drm_connector *connector) |
727 | static int intel_crt_get_modes(struct drm_connector *connector) |
685 | { |
728 | { |
686 | struct drm_device *dev = connector->dev; |
729 | struct drm_device *dev = connector->dev; |
- | 730 | struct drm_i915_private *dev_priv = dev->dev_private; |
|
- | 731 | struct intel_crt *crt = intel_attached_crt(connector); |
|
- | 732 | struct intel_encoder *intel_encoder = &crt->base; |
|
687 | struct drm_i915_private *dev_priv = dev->dev_private; |
733 | enum intel_display_power_domain power_domain; |
688 | int ret; |
734 | int ret; |
Line -... | Line 735... | ||
- | 735 | struct i2c_adapter *i2c; |
|
- | 736 | ||
- | 737 | power_domain = intel_display_port_power_domain(intel_encoder); |
|
689 | struct i2c_adapter *i2c; |
738 | intel_display_power_get(dev_priv, power_domain); |
690 | 739 | ||
691 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin); |
740 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin); |
692 | ret = intel_crt_ddc_get_modes(connector, i2c); |
741 | ret = intel_crt_ddc_get_modes(connector, i2c); |
Line 693... | Line 742... | ||
693 | if (ret || !IS_G4X(dev)) |
742 | if (ret || !IS_G4X(dev)) |
694 | return ret; |
743 | goto out; |
695 | 744 | ||
- | 745 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ |
|
- | 746 | i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); |
|
- | 747 | ret = intel_crt_ddc_get_modes(connector, i2c); |
|
- | 748 | ||
- | 749 | out: |
|
696 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ |
750 | intel_display_power_put(dev_priv, power_domain); |
Line 697... | Line 751... | ||
697 | i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); |
751 | |
698 | return intel_crt_ddc_get_modes(connector, i2c); |
752 | return ret; |
699 | } |
753 | } |
Line 775... | Line 829... | ||
775 | DRM_MODE_ENCODER_DAC); |
829 | DRM_MODE_ENCODER_DAC); |
Line 776... | Line 830... | ||
776 | 830 | ||
Line 777... | Line 831... | ||
777 | intel_connector_attach_encoder(intel_connector, &crt->base); |
831 | intel_connector_attach_encoder(intel_connector, &crt->base); |
778 | 832 | ||
779 | crt->base.type = INTEL_OUTPUT_ANALOG; |
833 | crt->base.type = INTEL_OUTPUT_ANALOG; |
780 | crt->base.cloneable = true; |
834 | crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI); |
781 | if (IS_I830(dev)) |
835 | if (IS_I830(dev)) |
782 | crt->base.crtc_mask = (1 << 0); |
836 | crt->base.crtc_mask = (1 << 0); |
Line 795... | Line 849... | ||
795 | crt->adpa_reg = VLV_ADPA; |
849 | crt->adpa_reg = VLV_ADPA; |
796 | else |
850 | else |
797 | crt->adpa_reg = ADPA; |
851 | crt->adpa_reg = ADPA; |
Line 798... | Line 852... | ||
798 | 852 | ||
799 | crt->base.compute_config = intel_crt_compute_config; |
- | |
800 | crt->base.mode_set = intel_crt_mode_set; |
853 | crt->base.compute_config = intel_crt_compute_config; |
801 | crt->base.disable = intel_disable_crt; |
854 | crt->base.disable = intel_disable_crt; |
802 | crt->base.enable = intel_enable_crt; |
855 | crt->base.enable = intel_enable_crt; |
803 | if (I915_HAS_HOTPLUG(dev)) |
856 | if (I915_HAS_HOTPLUG(dev)) |
804 | crt->base.hpd_pin = HPD_CRT; |
857 | crt->base.hpd_pin = HPD_CRT; |
805 | if (HAS_DDI(dev)) { |
858 | if (HAS_DDI(dev)) { |
806 | crt->base.get_config = hsw_crt_get_config; |
859 | crt->base.get_config = hsw_crt_get_config; |
- | 860 | crt->base.get_hw_state = intel_ddi_get_hw_state; |
|
- | 861 | crt->base.pre_enable = hsw_crt_pre_enable; |
|
807 | crt->base.get_hw_state = intel_ddi_get_hw_state; |
862 | crt->base.post_disable = hsw_crt_post_disable; |
808 | } else { |
863 | } else { |
809 | crt->base.get_config = intel_crt_get_config; |
864 | crt->base.get_config = intel_crt_get_config; |
810 | crt->base.get_hw_state = intel_crt_get_hw_state; |
865 | crt->base.get_hw_state = intel_crt_get_hw_state; |
811 | } |
866 | } |
- | 867 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
|
Line 812... | Line 868... | ||
812 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
868 | intel_connector->unregister = intel_connector_unregister; |
Line 813... | Line 869... | ||
813 | 869 | ||
Line 814... | Line 870... | ||
814 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
870 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
815 | 871 | ||
Line 816... | Line 872... | ||
816 | drm_sysfs_connector_add(connector); |
872 | drm_connector_register(connector); |
Line 832... | Line 888... | ||
832 | u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT | |
888 | u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT | |
833 | FDI_RX_LINK_REVERSAL_OVERRIDE; |
889 | FDI_RX_LINK_REVERSAL_OVERRIDE; |
Line 834... | Line 890... | ||
834 | 890 | ||
835 | dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config; |
891 | dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config; |
- | 892 | } |
|
- | 893 | ||
836 | } |
894 | intel_crt_reset(connector); |