WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/intel_crt.c


/*
 * Copyright © 2006-2007 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt 
 */
 
#include 
#include 
#include 
#include 
#include 
#include 
#include "intel_drv.h"
#include 
#include "i915_drv.h"
 
/* Here's the desired hotplug mode */
#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |		\
			   ADPA_CRT_HOTPLUG_WARMUP_10MS |		\
			   ADPA_CRT_HOTPLUG_SAMPLE_4S |			\
			   ADPA_CRT_HOTPLUG_VOLTAGE_50 |		\
			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\
			   ADPA_CRT_HOTPLUG_ENABLE)
 
struct intel_crt {
	struct intel_encoder base;
	/* DPMS state is stored in the connector, which we need in the
	 * encoder's enable/disable callbacks */
	struct intel_connector *connector;
	bool force_hotplug_required;
	u32 adpa_reg;
};
 
static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
{
 
	return container_of(encoder, struct intel_crt, base);
}
 
static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
{
	return intel_encoder_to_crt(intel_attached_encoder(connector));
}
 
static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
				   enum pipe *pipe)
{
	struct drm_device *dev = encoder->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
	u32 tmp;
 
	tmp = I915_READ(crt->adpa_reg);
 
	if (!(tmp & ADPA_DAC_ENABLE))
		return false;
 
	if (HAS_PCH_CPT(dev))
		*pipe = PORT_TO_PIPE_CPT(tmp);
	else
		*pipe = PORT_TO_PIPE(tmp);
 
	return true;
}
 
static void intel_crt_get_config(struct intel_encoder *encoder,
				 struct intel_crtc_config *pipe_config)
{
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
	u32 tmp, flags = 0;
 
	tmp = I915_READ(crt->adpa_reg);
 
	if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
		flags |= DRM_MODE_FLAG_PHSYNC;
	else
		flags |= DRM_MODE_FLAG_NHSYNC;
 
	if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
		flags |= DRM_MODE_FLAG_PVSYNC;
	else
		flags |= DRM_MODE_FLAG_NVSYNC;
 
	pipe_config->adjusted_mode.flags |= flags;
}
 
/* Note: The caller is required to filter out dpms modes not supported by the
 * platform. */
static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
	u32 temp;
 
	temp = I915_READ(crt->adpa_reg);
	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
	temp &= ~ADPA_DAC_ENABLE;
 
	switch (mode) {
	case DRM_MODE_DPMS_ON:
		temp |= ADPA_DAC_ENABLE;
		break;
	case DRM_MODE_DPMS_STANDBY:
		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
		break;
	case DRM_MODE_DPMS_SUSPEND:
		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
		break;
	case DRM_MODE_DPMS_OFF:
		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
		break;
	}
 
	I915_WRITE(crt->adpa_reg, temp);
}
 
static void intel_disable_crt(struct intel_encoder *encoder)
{
	intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
}
 
static void intel_enable_crt(struct intel_encoder *encoder)
{
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
 
	intel_crt_set_dpms(encoder, crt->connector->base.dpms);
}
 
 
/* Special dpms function to support cloning between dvo/sdvo/crt. */
static void intel_crt_dpms(struct drm_connector *connector, int mode)
{
	struct drm_device *dev = connector->dev;
	struct intel_encoder *encoder = intel_attached_encoder(connector);
	struct drm_crtc *crtc;
	int old_dpms;
 
	/* PCH platforms and VLV only support on/off. */
	if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
		mode = DRM_MODE_DPMS_OFF;
 
	if (mode == connector->dpms)
		return;
 
	old_dpms = connector->dpms;
	connector->dpms = mode;
 
	/* Only need to change hw state when actually enabled */
	crtc = encoder->base.crtc;
	if (!crtc) {
		encoder->connectors_active = false;
		return;
	}
 
	/* We need the pipe to run for anything but OFF. */
	if (mode == DRM_MODE_DPMS_OFF)
		encoder->connectors_active = false;
	else
		encoder->connectors_active = true;
 
	/* We call connector dpms manually below in case pipe dpms doesn't
	 * change due to cloning. */
	if (mode < old_dpms) {
		/* From off to on, enable the pipe first. */
		intel_crtc_update_dpms(crtc);
 
		intel_crt_set_dpms(encoder, mode);
	} else {
		intel_crt_set_dpms(encoder, mode);
 
		intel_crtc_update_dpms(crtc);
	}
 
	intel_modeset_check_state(connector->dev);
}
 
static int intel_crt_mode_valid(struct drm_connector *connector,
				struct drm_display_mode *mode)
{
	struct drm_device *dev = connector->dev;
 
	int max_clock = 0;
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;
 
	if (mode->clock < 25000)
		return MODE_CLOCK_LOW;
 
	if (IS_GEN2(dev))
		max_clock = 350000;
	else
		max_clock = 400000;
	if (mode->clock > max_clock)
		return MODE_CLOCK_HIGH;
 
	/* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
	if (HAS_PCH_LPT(dev) &&
	    (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
		return MODE_CLOCK_HIGH;
 
	return MODE_OK;
}
 
static bool intel_crt_compute_config(struct intel_encoder *encoder,
				     struct intel_crtc_config *pipe_config)
{
	struct drm_device *dev = encoder->base.dev;
 
	if (HAS_PCH_SPLIT(dev))
		pipe_config->has_pch_encoder = true;
 
	/* LPT FDI RX only supports 8bpc. */
	if (HAS_PCH_LPT(dev))
		pipe_config->pipe_bpp = 24;
 
	return true;
}
 
 
 
static void intel_crt_mode_set(struct intel_encoder *encoder)
{
 
 
 
	struct drm_device *dev = encoder->base.dev;
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
	u32 adpa;
 
	if (HAS_PCH_SPLIT(dev))
	adpa = ADPA_HOTPLUG_BITS;
	else
		adpa = 0;
 
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		adpa |= ADPA_HSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 
	/* For CPT allow 3 pipe config, for others just use A or B */
	if (HAS_PCH_LPT(dev))
		; /* Those bits don't exist here */
	else if (HAS_PCH_CPT(dev))
		adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
	else if (crtc->pipe == 0)
			adpa |= ADPA_PIPE_A_SELECT;
		else
			adpa |= ADPA_PIPE_B_SELECT;
 
	if (!HAS_PCH_SPLIT(dev))
		I915_WRITE(BCLRPAT(crtc->pipe), 0);
 
	I915_WRITE(crt->adpa_reg, adpa);
}
 
static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct intel_crt *crt = intel_attached_crt(connector);
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 adpa;
	bool ret;
 
	/* The first time through, trigger an explicit detection cycle */
	if (crt->force_hotplug_required) {
		bool turn_off_dac = HAS_PCH_SPLIT(dev);
		u32 save_adpa;
 
		crt->force_hotplug_required = 0;
 
		save_adpa = adpa = I915_READ(crt->adpa_reg);
		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 
		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
		if (turn_off_dac)
			adpa &= ~ADPA_DAC_ENABLE;
 
		I915_WRITE(crt->adpa_reg, adpa);
 
		if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
			     1000))
			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 
		if (turn_off_dac) {
			I915_WRITE(crt->adpa_reg, save_adpa);
			POSTING_READ(crt->adpa_reg);
		}
	}
 
	/* Check the status to see if both blue and green are on now */
	adpa = I915_READ(crt->adpa_reg);
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
		ret = true;
	else
		ret = false;
	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 
	return ret;
}
 
static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct intel_crt *crt = intel_attached_crt(connector);
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 adpa;
	bool ret;
	u32 save_adpa;
 
	save_adpa = adpa = I915_READ(crt->adpa_reg);
	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 
	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 
	I915_WRITE(crt->adpa_reg, adpa);
 
	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
		     1000)) {
		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
		I915_WRITE(crt->adpa_reg, save_adpa);
	}
 
	/* Check the status to see if both blue and green are on now */
	adpa = I915_READ(crt->adpa_reg);
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
		ret = true;
	else
		ret = false;
 
	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 
	/* FIXME: debug force function and remove */
	ret = true;
 
	return ret;
}
 
/**
 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 *
 * Not for i915G/i915GM
 *
 * \return true if CRT is connected.
 * \return false if CRT is disconnected.
 */
static bool intel_crt_detect_hotplug(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 hotplug_en, orig, stat;
	bool ret = false;
	int i, tries = 0;
 
	if (HAS_PCH_SPLIT(dev))
		return intel_ironlake_crt_detect_hotplug(connector);
 
	if (IS_VALLEYVIEW(dev))
		return valleyview_crt_detect_hotplug(connector);
 
	/*
	 * On 4 series desktop, CRT detect sequence need to be done twice
	 * to get a reliable result.
	 */
 
	if (IS_G4X(dev) && !IS_GM45(dev))
		tries = 2;
	else
		tries = 1;
	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 
	for (i = 0; i < tries ; i++) {
		/* turn on the FORCE_DETECT */
		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
		/* wait for FORCE_DETECT to go off */
		if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
			      CRT_HOTPLUG_FORCE_DETECT) == 0,
			     1000))
			DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
	}
 
	stat = I915_READ(PORT_HOTPLUG_STAT);
	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
		ret = true;
 
	/* clear the interrupt we just generated, if any */
	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 
	/* and put the bits back */
	I915_WRITE(PORT_HOTPLUG_EN, orig);
 
	return ret;
}
 
static struct edid *intel_crt_get_edid(struct drm_connector *connector,
				struct i2c_adapter *i2c)
{
	struct edid *edid;
 
	edid = drm_get_edid(connector, i2c);
 
	if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
		DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
		intel_gmbus_force_bit(i2c, true);
		edid = drm_get_edid(connector, i2c);
		intel_gmbus_force_bit(i2c, false);
	}
 
	return edid;
}
 
/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
static int intel_crt_ddc_get_modes(struct drm_connector *connector,
				struct i2c_adapter *adapter)
{
	struct edid *edid;
	int ret;
 
	edid = intel_crt_get_edid(connector, adapter);
	if (!edid)
		return 0;
 
	ret = intel_connector_update_modes(connector, edid);
	kfree(edid);
 
	return ret;
}
 
static bool intel_crt_detect_ddc(struct drm_connector *connector)
{
	struct intel_crt *crt = intel_attached_crt(connector);
	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
	struct edid *edid;
	struct i2c_adapter *i2c;
 
	BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 
	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
	edid = intel_crt_get_edid(connector, i2c);
 
	if (edid) {
		bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 
		/*
		 * This may be a DVI-I connector with a shared DDC
		 * link between analog and digital outputs, so we
		 * have to check the EDID input spec of the attached device.
		 */
		if (!is_digital) {
			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
			return true;
		}
 
		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
		} else {
		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
		}
 
	kfree(edid);
 
	return false;
}
 
static enum drm_connector_status
intel_crt_load_detect(struct intel_crt *crt)
{
	struct drm_device *dev = crt->base.base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
	uint32_t save_bclrpat;
	uint32_t save_vtotal;
	uint32_t vtotal, vactive;
	uint32_t vsample;
	uint32_t vblank, vblank_start, vblank_end;
	uint32_t dsl;
	uint32_t bclrpat_reg;
	uint32_t vtotal_reg;
	uint32_t vblank_reg;
	uint32_t vsync_reg;
	uint32_t pipeconf_reg;
	uint32_t pipe_dsl_reg;
	uint8_t	st00;
	enum drm_connector_status status;
 
	DRM_DEBUG_KMS("starting load-detect on CRT\n");
 
	bclrpat_reg = BCLRPAT(pipe);
	vtotal_reg = VTOTAL(pipe);
	vblank_reg = VBLANK(pipe);
	vsync_reg = VSYNC(pipe);
	pipeconf_reg = PIPECONF(pipe);
	pipe_dsl_reg = PIPEDSL(pipe);
 
	save_bclrpat = I915_READ(bclrpat_reg);
	save_vtotal = I915_READ(vtotal_reg);
	vblank = I915_READ(vblank_reg);
 
	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
	vactive = (save_vtotal & 0x7ff) + 1;
 
	vblank_start = (vblank & 0xfff) + 1;
	vblank_end = ((vblank >> 16) & 0xfff) + 1;
 
	/* Set the border color to purple. */
	I915_WRITE(bclrpat_reg, 0x500050);
 
	if (!IS_GEN2(dev)) {
		uint32_t pipeconf = I915_READ(pipeconf_reg);
		I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
		POSTING_READ(pipeconf_reg);
		/* Wait for next Vblank to substitue
		 * border color for Color info */
		intel_wait_for_vblank(dev, pipe);
		st00 = I915_READ8(VGA_MSR_WRITE);
		status = ((st00 & (1 << 4)) != 0) ?
			connector_status_connected :
			connector_status_disconnected;
 
		I915_WRITE(pipeconf_reg, pipeconf);
	} else {
		bool restore_vblank = false;
		int count, detect;
 
		/*
		* If there isn't any border, add some.
		* Yes, this will flicker
		*/
		if (vblank_start <= vactive && vblank_end >= vtotal) {
			uint32_t vsync = I915_READ(vsync_reg);
			uint32_t vsync_start = (vsync & 0xffff) + 1;
 
			vblank_start = vsync_start;
			I915_WRITE(vblank_reg,
				   (vblank_start - 1) |
				   ((vblank_end - 1) << 16));
			restore_vblank = true;
		}
		/* sample in the vertical border, selecting the larger one */
		if (vblank_start - vactive >= vtotal - vblank_end)
			vsample = (vblank_start + vactive) >> 1;
		else
			vsample = (vtotal + vblank_end) >> 1;
 
		/*
		 * Wait for the border to be displayed
		 */
		while (I915_READ(pipe_dsl_reg) >= vactive)
			;
		while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
			;
		/*
		 * Watch ST00 for an entire scanline
		 */
		detect = 0;
		count = 0;
		do {
			count++;
			/* Read the ST00 VGA status register */
			st00 = I915_READ8(VGA_MSR_WRITE);
			if (st00 & (1 << 4))
				detect++;
		} while ((I915_READ(pipe_dsl_reg) == dsl));
 
		/* restore vblank if necessary */
		if (restore_vblank)
			I915_WRITE(vblank_reg, vblank);
		/*
		 * If more than 3/4 of the scanline detected a monitor,
		 * then it is assumed to be present. This works even on i830,
		 * where there isn't any way to force the border color across
		 * the screen
		 */
		status = detect * 4 > count * 3 ?
			 connector_status_connected :
			 connector_status_disconnected;
	}
 
	/* Restore previous settings */
	I915_WRITE(bclrpat_reg, save_bclrpat);
 
	return status;
}
 
static enum drm_connector_status
intel_crt_detect(struct drm_connector *connector, bool force)
{
	struct drm_device *dev = connector->dev;
	struct intel_crt *crt = intel_attached_crt(connector);
	enum drm_connector_status status;
	struct intel_load_detect_pipe tmp;
 
	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
		      connector->base.id, drm_get_connector_name(connector),
		      force);
 
	if (I915_HAS_HOTPLUG(dev)) {
		/* We can not rely on the HPD pin always being correctly wired
		 * up, for example many KVM do not pass it through, and so
		 * only trust an assertion that the monitor is connected.
		 */
		if (intel_crt_detect_hotplug(connector)) {
			DRM_DEBUG_KMS("CRT detected via hotplug\n");
			return connector_status_connected;
		} else
			DRM_DEBUG_KMS("CRT not detected via hotplug\n");
	}
 
	if (intel_crt_detect_ddc(connector))
		return connector_status_connected;
 
	/* Load detection is broken on HPD capable machines. Whoever wants a
	 * broken monitor (without edid) to work behind a broken kvm (that fails
	 * to have the right resistors for HP detection) needs to fix this up.
	 * For now just bail out. */
	if (I915_HAS_HOTPLUG(dev))
		return connector_status_disconnected;
 
	if (!force)
		return connector->status;
 
	/* for pre-945g platforms use load detect */
	if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
			if (intel_crt_detect_ddc(connector))
				status = connector_status_connected;
			else
				status = intel_crt_load_detect(crt);
		intel_release_load_detect_pipe(connector, &tmp);
		} else
			status = connector_status_unknown;
 
	return status;
}
 
static void intel_crt_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}
 
static int intel_crt_get_modes(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;
	struct i2c_adapter *i2c;
 
	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
	ret = intel_crt_ddc_get_modes(connector, i2c);
	if (ret || !IS_G4X(dev))
		return ret;
 
	/* Try to probe digital port for output in DVI-I -> VGA mode. */
	i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
	return intel_crt_ddc_get_modes(connector, i2c);
}
 
static int intel_crt_set_property(struct drm_connector *connector,
				  struct drm_property *property,
				  uint64_t value)
{
	return 0;
}
 
static void intel_crt_reset(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crt *crt = intel_attached_crt(connector);
 
	if (INTEL_INFO(dev)->gen >= 5) {
		u32 adpa;
 
		adpa = I915_READ(crt->adpa_reg);
		adpa &= ~ADPA_CRT_HOTPLUG_MASK;
		adpa |= ADPA_HOTPLUG_BITS;
		I915_WRITE(crt->adpa_reg, adpa);
		POSTING_READ(crt->adpa_reg);
 
		DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
		crt->force_hotplug_required = 1;
	}
 
}
 
/*
 * Routines for controlling stuff on the analog port
 */
 
 
 
 
 
static const struct drm_connector_funcs intel_crt_connector_funcs = {
	.reset = intel_crt_reset,
	.dpms = intel_crt_dpms,
	.detect = intel_crt_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = intel_crt_destroy,
	.set_property = intel_crt_set_property,
};
 
static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
	.mode_valid = intel_crt_mode_valid,
	.get_modes = intel_crt_get_modes,
	.best_encoder = intel_best_encoder,
};
 
static const struct drm_encoder_funcs intel_crt_enc_funcs = {
	.destroy = intel_encoder_destroy,
};
 
void intel_crt_init(struct drm_device *dev)
{
	struct drm_connector *connector;
	struct intel_crt *crt;
	struct intel_connector *intel_connector;
	struct drm_i915_private *dev_priv = dev->dev_private;
 
	crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
	if (!crt)
		return;
 
	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(crt);
		return;
	}
 
	connector = &intel_connector->base;
	crt->connector = intel_connector;
	drm_connector_init(dev, &intel_connector->base,
			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 
	drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
			 DRM_MODE_ENCODER_DAC);
 
	intel_connector_attach_encoder(intel_connector, &crt->base);
 
	crt->base.type = INTEL_OUTPUT_ANALOG;
	crt->base.cloneable = true;
	if (IS_I830(dev))
		crt->base.crtc_mask = (1 << 0);
	else
		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 
	if (IS_GEN2(dev))
		connector->interlace_allowed = 0;
	else
	connector->interlace_allowed = 1;
	connector->doublescan_allowed = 0;
 
	if (HAS_PCH_SPLIT(dev))
		crt->adpa_reg = PCH_ADPA;
	else if (IS_VALLEYVIEW(dev))
		crt->adpa_reg = VLV_ADPA;
	else
		crt->adpa_reg = ADPA;
 
	crt->base.compute_config = intel_crt_compute_config;
	crt->base.mode_set = intel_crt_mode_set;
	crt->base.disable = intel_disable_crt;
	crt->base.enable = intel_enable_crt;
	crt->base.get_config = intel_crt_get_config;
	if (I915_HAS_HOTPLUG(dev))
		crt->base.hpd_pin = HPD_CRT;
	if (HAS_DDI(dev))
		crt->base.get_hw_state = intel_ddi_get_hw_state;
	else
	crt->base.get_hw_state = intel_crt_get_hw_state;
	intel_connector->get_hw_state = intel_connector_get_hw_state;
 
 
	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 
	drm_sysfs_connector_add(connector);
 
	if (!I915_HAS_HOTPLUG(dev))
		intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 
	/*
	 * Configure the automatic hotplug detection stuff
	 */
	crt->force_hotplug_required = 0;
 
	/*
	 * TODO: find a proper way to discover whether we need to set the the
	 * polarity and link reversal bits or not, instead of relying on the
	 * BIOS.
	 */
	if (HAS_PCH_LPT(dev)) {
		u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
				 FDI_RX_LINK_REVERSAL_OVERRIDE;
 
		dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
	}
}

Rev 3746	Rev 4104
1	/*	1	/*
2	* Copyright © 2006-2007 Intel Corporation	2	* Copyright © 2006-2007 Intel Corporation
3	*	3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a	4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),	5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation	6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the	8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:	9	* Software is furnished to do so, subject to the following conditions:
10	*	10	*
11	* The above copyright notice and this permission notice (including the next	11	* The above copyright notice and this permission notice (including the next
12	* paragraph) shall be included in all copies or substantial portions of the	12	* paragraph) shall be included in all copies or substantial portions of the
13	* Software.	13	* Software.
14	*	14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21	* DEALINGS IN THE SOFTWARE.	21	* DEALINGS IN THE SOFTWARE.
22	*	22	*
23	* Authors:	23	* Authors:
24	* Eric Anholt	24	* Eric Anholt
25	*/	25	*/
26		26
27	#include	27	#include
28	#include	28	#include
29	#include	29	#include
30	#include	30	#include
31	#include	31	#include
32	#include	32	#include
33	#include "intel_drv.h"	33	#include "intel_drv.h"
34	#include	34	#include
35	#include "i915_drv.h"	35	#include "i915_drv.h"
36		36
37	/* Here's the desired hotplug mode */	37	/* Here's the desired hotplug mode */
38	#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 \| \	38	#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 \| \
39	ADPA_CRT_HOTPLUG_WARMUP_10MS \| \	39	ADPA_CRT_HOTPLUG_WARMUP_10MS \| \
40	ADPA_CRT_HOTPLUG_SAMPLE_4S \| \	40	ADPA_CRT_HOTPLUG_SAMPLE_4S \| \
41	ADPA_CRT_HOTPLUG_VOLTAGE_50 \| \	41	ADPA_CRT_HOTPLUG_VOLTAGE_50 \| \
42	ADPA_CRT_HOTPLUG_VOLREF_325MV \| \	42	ADPA_CRT_HOTPLUG_VOLREF_325MV \| \
43	ADPA_CRT_HOTPLUG_ENABLE)	43	ADPA_CRT_HOTPLUG_ENABLE)
44		44
45	struct intel_crt {	45	struct intel_crt {
46	struct intel_encoder base;	46	struct intel_encoder base;
47	/* DPMS state is stored in the connector, which we need in the	47	/* DPMS state is stored in the connector, which we need in the
48	* encoder's enable/disable callbacks */	48	* encoder's enable/disable callbacks */
49	struct intel_connector *connector;	49	struct intel_connector *connector;
50	bool force_hotplug_required;	50	bool force_hotplug_required;
51	u32 adpa_reg;	51	u32 adpa_reg;
52	};	52	};
53		53
54	static struct intel_crt intel_attached_crt(struct drm_connector connector)	54	static struct intel_crt intel_encoder_to_crt(struct intel_encoder encoder)
55	{	55	{
56	return container_of(intel_attached_encoder(connector),	-
57	struct intel_crt, base);	56	return container_of(encoder, struct intel_crt, base);
58	}	57	}
59		58
60	static struct intel_crt intel_encoder_to_crt(struct intel_encoder encoder)	59	static struct intel_crt intel_attached_crt(struct drm_connector connector)
61	{	60	{
62	return container_of(encoder, struct intel_crt, base);	61	return intel_encoder_to_crt(intel_attached_encoder(connector));
63	}	62	}
64		63
65	static bool intel_crt_get_hw_state(struct intel_encoder *encoder,	64	static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
66	enum pipe *pipe)	65	enum pipe *pipe)
67	{	66	{
68	struct drm_device *dev = encoder->base.dev;	67	struct drm_device *dev = encoder->base.dev;
69	struct drm_i915_private *dev_priv = dev->dev_private;	68	struct drm_i915_private *dev_priv = dev->dev_private;
70	struct intel_crt *crt = intel_encoder_to_crt(encoder);	69	struct intel_crt *crt = intel_encoder_to_crt(encoder);
71	u32 tmp;	70	u32 tmp;
72		71
73	tmp = I915_READ(crt->adpa_reg);	72	tmp = I915_READ(crt->adpa_reg);
74		73
75	if (!(tmp & ADPA_DAC_ENABLE))	74	if (!(tmp & ADPA_DAC_ENABLE))
76	return false;	75	return false;
77		76
78	if (HAS_PCH_CPT(dev))	77	if (HAS_PCH_CPT(dev))
79	*pipe = PORT_TO_PIPE_CPT(tmp);	78	*pipe = PORT_TO_PIPE_CPT(tmp);
80	else	79	else
81	*pipe = PORT_TO_PIPE(tmp);	80	*pipe = PORT_TO_PIPE(tmp);
82		81
83	return true;	82	return true;
84	}	83	}
-		84
-		85	static void intel_crt_get_config(struct intel_encoder *encoder,
-		86	struct intel_crtc_config *pipe_config)
-		87	{
-		88	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-		89	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-		90	u32 tmp, flags = 0;
-		91
-		92	tmp = I915_READ(crt->adpa_reg);
-		93
-		94	if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
-		95	flags \|= DRM_MODE_FLAG_PHSYNC;
-		96	else
-		97	flags \|= DRM_MODE_FLAG_NHSYNC;
-		98
-		99	if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
-		100	flags \|= DRM_MODE_FLAG_PVSYNC;
-		101	else
-		102	flags \|= DRM_MODE_FLAG_NVSYNC;
-		103
-		104	pipe_config->adjusted_mode.flags \|= flags;
-		105	}
85		106
86	/* Note: The caller is required to filter out dpms modes not supported by the	107	/* Note: The caller is required to filter out dpms modes not supported by the
87	* platform. */	108	* platform. */
88	static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)	109	static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
89	{	110	{
90	struct drm_device *dev = encoder->base.dev;	111	struct drm_device *dev = encoder->base.dev;
91	struct drm_i915_private *dev_priv = dev->dev_private;	112	struct drm_i915_private *dev_priv = dev->dev_private;
92	struct intel_crt *crt = intel_encoder_to_crt(encoder);	113	struct intel_crt *crt = intel_encoder_to_crt(encoder);
93	u32 temp;	114	u32 temp;
94		115
95	temp = I915_READ(crt->adpa_reg);	116	temp = I915_READ(crt->adpa_reg);
96	temp &= ~(ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE);	117	temp &= ~(ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE);
97	temp &= ~ADPA_DAC_ENABLE;	118	temp &= ~ADPA_DAC_ENABLE;
98		119
99	switch (mode) {	120	switch (mode) {
100	case DRM_MODE_DPMS_ON:	121	case DRM_MODE_DPMS_ON:
101	temp \|= ADPA_DAC_ENABLE;	122	temp \|= ADPA_DAC_ENABLE;
102	break;	123	break;
103	case DRM_MODE_DPMS_STANDBY:	124	case DRM_MODE_DPMS_STANDBY:
104	temp \|= ADPA_DAC_ENABLE \| ADPA_HSYNC_CNTL_DISABLE;	125	temp \|= ADPA_DAC_ENABLE \| ADPA_HSYNC_CNTL_DISABLE;
105	break;	126	break;
106	case DRM_MODE_DPMS_SUSPEND:	127	case DRM_MODE_DPMS_SUSPEND:
107	temp \|= ADPA_DAC_ENABLE \| ADPA_VSYNC_CNTL_DISABLE;	128	temp \|= ADPA_DAC_ENABLE \| ADPA_VSYNC_CNTL_DISABLE;
108	break;	129	break;
109	case DRM_MODE_DPMS_OFF:	130	case DRM_MODE_DPMS_OFF:
110	temp \|= ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE;	131	temp \|= ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE;
111	break;	132	break;
112	}	133	}
113		134
114	I915_WRITE(crt->adpa_reg, temp);	135	I915_WRITE(crt->adpa_reg, temp);
115	}	136	}
116		137
117	static void intel_disable_crt(struct intel_encoder *encoder)	138	static void intel_disable_crt(struct intel_encoder *encoder)
118	{	139	{
119	intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);	140	intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
120	}	141	}
121		142
122	static void intel_enable_crt(struct intel_encoder *encoder)	143	static void intel_enable_crt(struct intel_encoder *encoder)
123	{	144	{
124	struct intel_crt *crt = intel_encoder_to_crt(encoder);	145	struct intel_crt *crt = intel_encoder_to_crt(encoder);
125		146
126	intel_crt_set_dpms(encoder, crt->connector->base.dpms);	147	intel_crt_set_dpms(encoder, crt->connector->base.dpms);
127	}	148	}
128		-
-		149
129		150	/* Special dpms function to support cloning between dvo/sdvo/crt. */
130	static void intel_crt_dpms(struct drm_connector *connector, int mode)	151	static void intel_crt_dpms(struct drm_connector *connector, int mode)
131	{	152	{
132	struct drm_device *dev = connector->dev;	153	struct drm_device *dev = connector->dev;
133	struct intel_encoder *encoder = intel_attached_encoder(connector);	154	struct intel_encoder *encoder = intel_attached_encoder(connector);
134	struct drm_crtc *crtc;	155	struct drm_crtc *crtc;
135	int old_dpms;	156	int old_dpms;
136		157
137	/* PCH platforms and VLV only support on/off. */	158	/* PCH platforms and VLV only support on/off. */
138	if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)	159	if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
139	mode = DRM_MODE_DPMS_OFF;	160	mode = DRM_MODE_DPMS_OFF;
140		161
141	if (mode == connector->dpms)	162	if (mode == connector->dpms)
142	return;	163	return;
143		164
144	old_dpms = connector->dpms;	165	old_dpms = connector->dpms;
145	connector->dpms = mode;	166	connector->dpms = mode;
146		167
147	/* Only need to change hw state when actually enabled */	168	/* Only need to change hw state when actually enabled */
148	crtc = encoder->base.crtc;	169	crtc = encoder->base.crtc;
149	if (!crtc) {	170	if (!crtc) {
150	encoder->connectors_active = false;	171	encoder->connectors_active = false;
151	return;	172	return;
152	}	173	}
153		174
154	/* We need the pipe to run for anything but OFF. */	175	/* We need the pipe to run for anything but OFF. */
155	if (mode == DRM_MODE_DPMS_OFF)	176	if (mode == DRM_MODE_DPMS_OFF)
156	encoder->connectors_active = false;	177	encoder->connectors_active = false;
157	else	178	else
158	encoder->connectors_active = true;	179	encoder->connectors_active = true;
-		180
-		181	/* We call connector dpms manually below in case pipe dpms doesn't
159		182	* change due to cloning. */
160	if (mode < old_dpms) {	183	if (mode < old_dpms) {
161	/* From off to on, enable the pipe first. */	184	/* From off to on, enable the pipe first. */
162	intel_crtc_update_dpms(crtc);	185	intel_crtc_update_dpms(crtc);
163		186
164	intel_crt_set_dpms(encoder, mode);	187	intel_crt_set_dpms(encoder, mode);
165	} else {	188	} else {
166	intel_crt_set_dpms(encoder, mode);	189	intel_crt_set_dpms(encoder, mode);
167		190
168	intel_crtc_update_dpms(crtc);	191	intel_crtc_update_dpms(crtc);
169	}	192	}
170		193
171	intel_modeset_check_state(connector->dev);	194	intel_modeset_check_state(connector->dev);
172	}	195	}
173		196
174	static int intel_crt_mode_valid(struct drm_connector *connector,	197	static int intel_crt_mode_valid(struct drm_connector *connector,
175	struct drm_display_mode *mode)	198	struct drm_display_mode *mode)
176	{	199	{
177	struct drm_device *dev = connector->dev;	200	struct drm_device *dev = connector->dev;
178		201
179	int max_clock = 0;	202	int max_clock = 0;
180	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)	203	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
181	return MODE_NO_DBLESCAN;	204	return MODE_NO_DBLESCAN;
182		205
183	if (mode->clock < 25000)	206	if (mode->clock < 25000)
184	return MODE_CLOCK_LOW;	207	return MODE_CLOCK_LOW;
185		208
186	if (IS_GEN2(dev))	209	if (IS_GEN2(dev))
187	max_clock = 350000;	210	max_clock = 350000;
188	else	211	else
189	max_clock = 400000;	212	max_clock = 400000;
190	if (mode->clock > max_clock)	213	if (mode->clock > max_clock)
191	return MODE_CLOCK_HIGH;	214	return MODE_CLOCK_HIGH;
192		215
193	/* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */	216	/* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
194	if (HAS_PCH_LPT(dev) &&	217	if (HAS_PCH_LPT(dev) &&
195	(ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))	218	(ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
196	return MODE_CLOCK_HIGH;	219	return MODE_CLOCK_HIGH;
197		220
198	return MODE_OK;	221	return MODE_OK;
199	}	222	}
200		223
201	static bool intel_crt_compute_config(struct intel_encoder *encoder,	224	static bool intel_crt_compute_config(struct intel_encoder *encoder,
202	struct intel_crtc_config *pipe_config)	225	struct intel_crtc_config *pipe_config)
203	{	226	{
204	struct drm_device *dev = encoder->base.dev;	227	struct drm_device *dev = encoder->base.dev;
205		228
206	if (HAS_PCH_SPLIT(dev))	229	if (HAS_PCH_SPLIT(dev))
207	pipe_config->has_pch_encoder = true;	230	pipe_config->has_pch_encoder = true;
-		231
-		232	/* LPT FDI RX only supports 8bpc. */
-		233	if (HAS_PCH_LPT(dev))
-		234	pipe_config->pipe_bpp = 24;
208		235
209	return true;	236	return true;
210	}	237	}
211		238
212	static void intel_crt_mode_set(struct drm_encoder *encoder,	-
213	struct drm_display_mode *mode,	-
214	struct drm_display_mode *adjusted_mode)	239	static void intel_crt_mode_set(struct intel_encoder *encoder)
215	{	240	{
216		-
217	struct drm_device *dev = encoder->dev;	-
218	struct drm_crtc *crtc = encoder->crtc;	241
219	struct intel_crt *crt =	242	struct drm_device *dev = encoder->base.dev;
220	intel_encoder_to_crt(to_intel_encoder(encoder));	243	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-		244	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
221	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);	245	struct drm_i915_private *dev_priv = dev->dev_private;
222	struct drm_i915_private *dev_priv = dev->dev_private;	246	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
223	u32 adpa;	247	u32 adpa;
224		248
225	if (HAS_PCH_SPLIT(dev))	249	if (HAS_PCH_SPLIT(dev))
226	adpa = ADPA_HOTPLUG_BITS;	250	adpa = ADPA_HOTPLUG_BITS;
227	else	251	else
228	adpa = 0;	252	adpa = 0;
229		253
230	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)	254	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
231	adpa \|= ADPA_HSYNC_ACTIVE_HIGH;	255	adpa \|= ADPA_HSYNC_ACTIVE_HIGH;
232	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)	256	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
233	adpa \|= ADPA_VSYNC_ACTIVE_HIGH;	257	adpa \|= ADPA_VSYNC_ACTIVE_HIGH;
234		258
235	/* For CPT allow 3 pipe config, for others just use A or B */	259	/* For CPT allow 3 pipe config, for others just use A or B */
236	if (HAS_PCH_LPT(dev))	260	if (HAS_PCH_LPT(dev))
237	; /* Those bits don't exist here */	261	; /* Those bits don't exist here */
238	else if (HAS_PCH_CPT(dev))	262	else if (HAS_PCH_CPT(dev))
239	adpa \|= PORT_TRANS_SEL_CPT(intel_crtc->pipe);	263	adpa \|= PORT_TRANS_SEL_CPT(crtc->pipe);
240	else if (intel_crtc->pipe == 0)	264	else if (crtc->pipe == 0)
241	adpa \|= ADPA_PIPE_A_SELECT;	265	adpa \|= ADPA_PIPE_A_SELECT;
242	else	266	else
243	adpa \|= ADPA_PIPE_B_SELECT;	267	adpa \|= ADPA_PIPE_B_SELECT;
244		268
245	if (!HAS_PCH_SPLIT(dev))	269	if (!HAS_PCH_SPLIT(dev))
246	I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);	270	I915_WRITE(BCLRPAT(crtc->pipe), 0);
247		271
248	I915_WRITE(crt->adpa_reg, adpa);	272	I915_WRITE(crt->adpa_reg, adpa);
249	}	273	}
250		274
251	static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)	275	static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
252	{	276	{
253	struct drm_device *dev = connector->dev;	277	struct drm_device *dev = connector->dev;
254	struct intel_crt *crt = intel_attached_crt(connector);	278	struct intel_crt *crt = intel_attached_crt(connector);
255	struct drm_i915_private *dev_priv = dev->dev_private;	279	struct drm_i915_private *dev_priv = dev->dev_private;
256	u32 adpa;	280	u32 adpa;
257	bool ret;	281	bool ret;
258		282
259	/* The first time through, trigger an explicit detection cycle */	283	/* The first time through, trigger an explicit detection cycle */
260	if (crt->force_hotplug_required) {	284	if (crt->force_hotplug_required) {
261	bool turn_off_dac = HAS_PCH_SPLIT(dev);	285	bool turn_off_dac = HAS_PCH_SPLIT(dev);
262	u32 save_adpa;	286	u32 save_adpa;
263		287
264	crt->force_hotplug_required = 0;	288	crt->force_hotplug_required = 0;
265		289
266	save_adpa = adpa = I915_READ(crt->adpa_reg);	290	save_adpa = adpa = I915_READ(crt->adpa_reg);
267	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);	291	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
268		292
269	adpa \|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;	293	adpa \|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
270	if (turn_off_dac)	294	if (turn_off_dac)
271	adpa &= ~ADPA_DAC_ENABLE;	295	adpa &= ~ADPA_DAC_ENABLE;
272		296
273	I915_WRITE(crt->adpa_reg, adpa);	297	I915_WRITE(crt->adpa_reg, adpa);
274		298
275	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,	299	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
276	1000))	300	1000))
277	DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");	301	DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
278		302
279	if (turn_off_dac) {	303	if (turn_off_dac) {
280	I915_WRITE(crt->adpa_reg, save_adpa);	304	I915_WRITE(crt->adpa_reg, save_adpa);
281	POSTING_READ(crt->adpa_reg);	305	POSTING_READ(crt->adpa_reg);
282	}	306	}
283	}	307	}
284		308
285	/* Check the status to see if both blue and green are on now */	309	/* Check the status to see if both blue and green are on now */
286	adpa = I915_READ(crt->adpa_reg);	310	adpa = I915_READ(crt->adpa_reg);
287	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)	311	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
288	ret = true;	312	ret = true;
289	else	313	else
290	ret = false;	314	ret = false;
291	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);	315	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
292		316
293	return ret;	317	return ret;
294	}	318	}
295		319
296	static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)	320	static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
297	{	321	{
298	struct drm_device *dev = connector->dev;	322	struct drm_device *dev = connector->dev;
299	struct intel_crt *crt = intel_attached_crt(connector);	323	struct intel_crt *crt = intel_attached_crt(connector);
300	struct drm_i915_private *dev_priv = dev->dev_private;	324	struct drm_i915_private *dev_priv = dev->dev_private;
301	u32 adpa;	325	u32 adpa;
302	bool ret;	326	bool ret;
303	u32 save_adpa;	327	u32 save_adpa;
304		328
305	save_adpa = adpa = I915_READ(crt->adpa_reg);	329	save_adpa = adpa = I915_READ(crt->adpa_reg);
306	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);	330	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
307		331
308	adpa \|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;	332	adpa \|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
309		333
310	I915_WRITE(crt->adpa_reg, adpa);	334	I915_WRITE(crt->adpa_reg, adpa);
311		335
312	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,	336	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
313	1000)) {	337	1000)) {
314	DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");	338	DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
315	I915_WRITE(crt->adpa_reg, save_adpa);	339	I915_WRITE(crt->adpa_reg, save_adpa);
316	}	340	}
317		341
318	/* Check the status to see if both blue and green are on now */	342	/* Check the status to see if both blue and green are on now */
319	adpa = I915_READ(crt->adpa_reg);	343	adpa = I915_READ(crt->adpa_reg);
320	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)	344	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
321	ret = true;	345	ret = true;
322	else	346	else
323	ret = false;	347	ret = false;
324		348
325	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);	349	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
326		350
327	/* FIXME: debug force function and remove */	351	/* FIXME: debug force function and remove */
328	ret = true;	352	ret = true;
329		353
330	return ret;	354	return ret;
331	}	355	}
332		356
333	/**	357	/**
334	* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.	358	* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
335	*	359	*
336	* Not for i915G/i915GM	360	* Not for i915G/i915GM
337	*	361	*
338	* \return true if CRT is connected.	362	* \return true if CRT is connected.
339	* \return false if CRT is disconnected.	363	* \return false if CRT is disconnected.
340	*/	364	*/
341	static bool intel_crt_detect_hotplug(struct drm_connector *connector)	365	static bool intel_crt_detect_hotplug(struct drm_connector *connector)
342	{	366	{
343	struct drm_device *dev = connector->dev;	367	struct drm_device *dev = connector->dev;
344	struct drm_i915_private *dev_priv = dev->dev_private;	368	struct drm_i915_private *dev_priv = dev->dev_private;
345	u32 hotplug_en, orig, stat;	369	u32 hotplug_en, orig, stat;
346	bool ret = false;	370	bool ret = false;
347	int i, tries = 0;	371	int i, tries = 0;
348		372
349	if (HAS_PCH_SPLIT(dev))	373	if (HAS_PCH_SPLIT(dev))
350	return intel_ironlake_crt_detect_hotplug(connector);	374	return intel_ironlake_crt_detect_hotplug(connector);
351		375
352	if (IS_VALLEYVIEW(dev))	376	if (IS_VALLEYVIEW(dev))
353	return valleyview_crt_detect_hotplug(connector);	377	return valleyview_crt_detect_hotplug(connector);
354		378
355	/*	379	/*
356	* On 4 series desktop, CRT detect sequence need to be done twice	380	* On 4 series desktop, CRT detect sequence need to be done twice
357	* to get a reliable result.	381	* to get a reliable result.
358	*/	382	*/
359		383
360	if (IS_G4X(dev) && !IS_GM45(dev))	384	if (IS_G4X(dev) && !IS_GM45(dev))
361	tries = 2;	385	tries = 2;
362	else	386	else
363	tries = 1;	387	tries = 1;
364	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);	388	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
365	hotplug_en \|= CRT_HOTPLUG_FORCE_DETECT;	389	hotplug_en \|= CRT_HOTPLUG_FORCE_DETECT;
366		390
367	for (i = 0; i < tries ; i++) {	391	for (i = 0; i < tries ; i++) {
368	/* turn on the FORCE_DETECT */	392	/* turn on the FORCE_DETECT */
369	I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);	393	I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
370	/* wait for FORCE_DETECT to go off */	394	/* wait for FORCE_DETECT to go off */
371	if (wait_for((I915_READ(PORT_HOTPLUG_EN) &	395	if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
372	CRT_HOTPLUG_FORCE_DETECT) == 0,	396	CRT_HOTPLUG_FORCE_DETECT) == 0,
373	1000))	397	1000))
374	DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");	398	DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
375	}	399	}
376		400
377	stat = I915_READ(PORT_HOTPLUG_STAT);	401	stat = I915_READ(PORT_HOTPLUG_STAT);
378	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)	402	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
379	ret = true;	403	ret = true;
380		404
381	/* clear the interrupt we just generated, if any */	405	/* clear the interrupt we just generated, if any */
382	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);	406	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
383		407
384	/* and put the bits back */	408	/* and put the bits back */
385	I915_WRITE(PORT_HOTPLUG_EN, orig);	409	I915_WRITE(PORT_HOTPLUG_EN, orig);
386		410
387	return ret;	411	return ret;
388	}	412	}
389		413
390	static struct edid intel_crt_get_edid(struct drm_connector connector,	414	static struct edid intel_crt_get_edid(struct drm_connector connector,
391	struct i2c_adapter *i2c)	415	struct i2c_adapter *i2c)
392	{	416	{
393	struct edid *edid;	417	struct edid *edid;
394		418
395	edid = drm_get_edid(connector, i2c);	419	edid = drm_get_edid(connector, i2c);
396		420
397	if (!edid && !intel_gmbus_is_forced_bit(i2c)) {	421	if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
398	DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");	422	DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
399	intel_gmbus_force_bit(i2c, true);	423	intel_gmbus_force_bit(i2c, true);
400	edid = drm_get_edid(connector, i2c);	424	edid = drm_get_edid(connector, i2c);
401	intel_gmbus_force_bit(i2c, false);	425	intel_gmbus_force_bit(i2c, false);
402	}	426	}
403		427
404	return edid;	428	return edid;
405	}	429	}
406		430
407	/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */	431	/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
408	static int intel_crt_ddc_get_modes(struct drm_connector *connector,	432	static int intel_crt_ddc_get_modes(struct drm_connector *connector,
409	struct i2c_adapter *adapter)	433	struct i2c_adapter *adapter)
410	{	434	{
411	struct edid *edid;	435	struct edid *edid;
412	int ret;	436	int ret;
413		437
414	edid = intel_crt_get_edid(connector, adapter);	438	edid = intel_crt_get_edid(connector, adapter);
415	if (!edid)	439	if (!edid)
416	return 0;	440	return 0;
417		441
418	ret = intel_connector_update_modes(connector, edid);	442	ret = intel_connector_update_modes(connector, edid);
419	kfree(edid);	443	kfree(edid);
420		444
421	return ret;	445	return ret;
422	}	446	}
423		447
424	static bool intel_crt_detect_ddc(struct drm_connector *connector)	448	static bool intel_crt_detect_ddc(struct drm_connector *connector)
425	{	449	{
426	struct intel_crt *crt = intel_attached_crt(connector);	450	struct intel_crt *crt = intel_attached_crt(connector);
427	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;	451	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
428	struct edid *edid;	452	struct edid *edid;
429	struct i2c_adapter *i2c;	453	struct i2c_adapter *i2c;
430		454
431	BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);	455	BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
432		456
433	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);	457	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
434	edid = intel_crt_get_edid(connector, i2c);	458	edid = intel_crt_get_edid(connector, i2c);
435		459
436	if (edid) {	460	if (edid) {
437	bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;	461	bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
438		462
439	/*	463	/*
440	* This may be a DVI-I connector with a shared DDC	464	* This may be a DVI-I connector with a shared DDC
441	* link between analog and digital outputs, so we	465	* link between analog and digital outputs, so we
442	* have to check the EDID input spec of the attached device.	466	* have to check the EDID input spec of the attached device.
443	*/	467	*/
444	if (!is_digital) {	468	if (!is_digital) {
445	DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");	469	DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
446	return true;	470	return true;
447	}	471	}
448		472
449	DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");	473	DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
450	} else {	474	} else {
451	DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");	475	DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
452	}	476	}
453		477
454	kfree(edid);	478	kfree(edid);
455		479
456	return false;	480	return false;
457	}	481	}
458		482
459	static enum drm_connector_status	483	static enum drm_connector_status
460	intel_crt_load_detect(struct intel_crt *crt)	484	intel_crt_load_detect(struct intel_crt *crt)
461	{	485	{
462	struct drm_device *dev = crt->base.base.dev;	486	struct drm_device *dev = crt->base.base.dev;
463	struct drm_i915_private *dev_priv = dev->dev_private;	487	struct drm_i915_private *dev_priv = dev->dev_private;
464	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;	488	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
465	uint32_t save_bclrpat;	489	uint32_t save_bclrpat;
466	uint32_t save_vtotal;	490	uint32_t save_vtotal;
467	uint32_t vtotal, vactive;	491	uint32_t vtotal, vactive;
468	uint32_t vsample;	492	uint32_t vsample;
469	uint32_t vblank, vblank_start, vblank_end;	493	uint32_t vblank, vblank_start, vblank_end;
470	uint32_t dsl;	494	uint32_t dsl;

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/intel_crt.c – Rev 3746 → 4104