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Line 42... Line 42...
42
			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\
42
			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\
43
			   ADPA_CRT_HOTPLUG_ENABLE)
43
			   ADPA_CRT_HOTPLUG_ENABLE)
Line 44... Line 44...
44
 
44
 
45
struct intel_crt {
45
struct intel_crt {
-
 
46
	struct intel_encoder base;
-
 
47
	/* DPMS state is stored in the connector, which we need in the
-
 
48
	 * encoder's enable/disable callbacks */
46
	struct intel_encoder base;
49
	struct intel_connector *connector;
47
	bool force_hotplug_required;
50
	bool force_hotplug_required;
48
	u32 adpa_reg;
51
	u32 adpa_reg;
Line 49... Line 52...
49
};
52
};
Line 78... Line 81...
78
		*pipe = PORT_TO_PIPE(tmp);
81
		*pipe = PORT_TO_PIPE(tmp);
Line 79... Line 82...
79
 
82
 
80
	return true;
83
	return true;
Line 81... Line -...
81
}
-
 
82
 
-
 
83
static void intel_disable_crt(struct intel_encoder *encoder)
-
 
84
{
-
 
85
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-
 
86
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-
 
87
	u32 temp;
-
 
88
 
-
 
89
	temp = I915_READ(crt->adpa_reg);
-
 
90
	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
-
 
91
	temp &= ~ADPA_DAC_ENABLE;
-
 
92
	I915_WRITE(crt->adpa_reg, temp);
-
 
93
}
-
 
94
 
-
 
95
static void intel_enable_crt(struct intel_encoder *encoder)
-
 
96
{
-
 
97
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-
 
98
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-
 
99
	u32 temp;
-
 
100
 
-
 
101
	temp = I915_READ(crt->adpa_reg);
-
 
102
	temp |= ADPA_DAC_ENABLE;
-
 
103
	I915_WRITE(crt->adpa_reg, temp);
-
 
104
}
84
}
105
 
85
 
106
/* Note: The caller is required to filter out dpms modes not supported by the
86
/* Note: The caller is required to filter out dpms modes not supported by the
107
 * platform. */
87
 * platform. */
108
static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
88
static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
Line 132... Line 112...
132
	}
112
	}
Line 133... Line 113...
133
 
113
 
134
	I915_WRITE(crt->adpa_reg, temp);
114
	I915_WRITE(crt->adpa_reg, temp);
Line -... Line 115...
-
 
115
}
-
 
116
 
-
 
117
static void intel_disable_crt(struct intel_encoder *encoder)
-
 
118
{
-
 
119
	intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
-
 
120
}
-
 
121
 
-
 
122
static void intel_enable_crt(struct intel_encoder *encoder)
-
 
123
{
-
 
124
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-
 
125
 
-
 
126
	intel_crt_set_dpms(encoder, crt->connector->base.dpms);
-
 
127
}
135
}
128
 
136
 
129
 
137
static void intel_crt_dpms(struct drm_connector *connector, int mode)
130
static void intel_crt_dpms(struct drm_connector *connector, int mode)
138
{
131
{
139
	struct drm_device *dev = connector->dev;
132
	struct drm_device *dev = connector->dev;
Line 257... Line 250...
257
	struct intel_crt *crt = intel_attached_crt(connector);
250
	struct intel_crt *crt = intel_attached_crt(connector);
258
	struct drm_i915_private *dev_priv = dev->dev_private;
251
	struct drm_i915_private *dev_priv = dev->dev_private;
259
	u32 adpa;
252
	u32 adpa;
260
	bool ret;
253
	bool ret;
Line -... Line 254...
-
 
254
 
-
 
255
    ENTER();
261
 
256
 
262
	/* The first time through, trigger an explicit detection cycle */
257
	/* The first time through, trigger an explicit detection cycle */
263
	if (crt->force_hotplug_required) {
258
	if (crt->force_hotplug_required) {
264
		bool turn_off_dac = HAS_PCH_SPLIT(dev);
259
		bool turn_off_dac = HAS_PCH_SPLIT(dev);
Line 265... Line 260...
265
		u32 save_adpa;
260
		u32 save_adpa;
Line 266... Line 261...
266
 
261
 
267
		crt->force_hotplug_required = 0;
262
		crt->force_hotplug_required = 0;
Line 268... Line 263...
268
 
263
 
269
		save_adpa = adpa = I915_READ(PCH_ADPA);
264
		save_adpa = adpa = I915_READ(crt->adpa_reg);
270
		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
265
		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
Line 271... Line 266...
271
 
266
 
Line 272... Line 267...
272
		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
267
		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
273
		if (turn_off_dac)
268
		if (turn_off_dac)
274
			adpa &= ~ADPA_DAC_ENABLE;
269
			adpa &= ~ADPA_DAC_ENABLE;
Line 275... Line 270...
275
 
270
 
276
		I915_WRITE(PCH_ADPA, adpa);
271
		I915_WRITE(crt->adpa_reg, adpa);
277
 
272
 
278
		if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
273
		if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
279
			     1000))
274
			     1000))
Line 280... Line 275...
280
			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
275
			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
281
 
276
 
282
		if (turn_off_dac) {
277
		if (turn_off_dac) {
283
			I915_WRITE(PCH_ADPA, save_adpa);
278
			I915_WRITE(crt->adpa_reg, save_adpa);
284
			POSTING_READ(PCH_ADPA);
279
			POSTING_READ(crt->adpa_reg);
285
		}
280
		}
286
	}
281
	}
Line -... Line 282...
-
 
282
 
-
 
283
	/* Check the status to see if both blue and green are on now */
287
 
284
	adpa = I915_READ(crt->adpa_reg);
288
	/* Check the status to see if both blue and green are on now */
285
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
Line 289... Line 286...
289
	adpa = I915_READ(PCH_ADPA);
286
		ret = true;
290
	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
287
	else
291
		ret = true;
288
		ret = false;
-
 
289
	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
292
	else
290
 
293
		ret = false;
291
    LEAVE();
294
	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
292
 
295
 
293
	return ret;
Line -... Line 294...
-
 
294
}
-
 
295
 
296
	return ret;
296
static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
297
}
297
{
Line 298... Line 298...
298
 
298
	struct drm_device *dev = connector->dev;
Line 299... Line 299...
299
static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
299
	struct intel_crt *crt = intel_attached_crt(connector);
Line 300... Line 300...
300
{
300
	struct drm_i915_private *dev_priv = dev->dev_private;
301
	struct drm_device *dev = connector->dev;
301
	u32 adpa;
302
	struct drm_i915_private *dev_priv = dev->dev_private;
302
	bool ret;
303
	u32 adpa;
303
	u32 save_adpa;
304
	bool ret;
304
 
Line 305... Line 305...
305
	u32 save_adpa;
305
    ENTER();
306
 
306
 
307
	save_adpa = adpa = I915_READ(ADPA);
307
	save_adpa = adpa = I915_READ(crt->adpa_reg);
308
	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
308
	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
309
 
309
 
310
	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
310
	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
Line 311... Line 311...
311
 
311
 
Line 312... Line 312...
312
	I915_WRITE(ADPA, adpa);
312
	I915_WRITE(crt->adpa_reg, adpa);
313
 
313
 
Line -... Line 314...
-
 
314
	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
-
 
315
		     1000)) {
314
	if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
316
		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
315
		     1000)) {
317
		I915_WRITE(crt->adpa_reg, save_adpa);
Line 316... Line 318...
316
		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
318
	}
317
		I915_WRITE(ADPA, save_adpa);
319
 
Line 346... Line 348...
346
	struct drm_i915_private *dev_priv = dev->dev_private;
348
	struct drm_i915_private *dev_priv = dev->dev_private;
347
	u32 hotplug_en, orig, stat;
349
	u32 hotplug_en, orig, stat;
348
	bool ret = false;
350
	bool ret = false;
349
	int i, tries = 0;
351
	int i, tries = 0;
Line -... Line 352...
-
 
352
 
-
 
353
    ENTER();
350
 
354
 
351
	if (HAS_PCH_SPLIT(dev))
355
	if (HAS_PCH_SPLIT(dev))
Line 352... Line 356...
352
		return intel_ironlake_crt_detect_hotplug(connector);
356
		return intel_ironlake_crt_detect_hotplug(connector);
353
 
357
 
Line 384... Line 388...
384
	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
388
	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
Line 385... Line 389...
385
 
389
 
386
	/* and put the bits back */
390
	/* and put the bits back */
Line -... Line 391...
-
 
391
	I915_WRITE(PORT_HOTPLUG_EN, orig);
-
 
392
 
387
	I915_WRITE(PORT_HOTPLUG_EN, orig);
393
    LEAVE();
388
 
394
 
Line 389... Line 395...
389
	return ret;
395
	return ret;
390
}
396
}
391
 
397
 
392
static struct edid *intel_crt_get_edid(struct drm_connector *connector,
398
static struct edid *intel_crt_get_edid(struct drm_connector *connector,
Line -... Line 399...
-
 
399
				struct i2c_adapter *i2c)
-
 
400
{
393
				struct i2c_adapter *i2c)
401
	struct edid *edid;
Line 394... Line 402...
394
{
402
 
395
	struct edid *edid;
403
    ENTER();
396
 
404
 
397
	edid = drm_get_edid(connector, i2c);
405
	edid = drm_get_edid(connector, i2c);
398
 
406
 
399
	if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
407
	if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
Line -... Line 408...
-
 
408
		DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
-
 
409
		intel_gmbus_force_bit(i2c, true);
400
		DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
410
		edid = drm_get_edid(connector, i2c);
401
		intel_gmbus_force_bit(i2c, true);
411
		intel_gmbus_force_bit(i2c, false);
Line 402... Line 412...
402
		edid = drm_get_edid(connector, i2c);
412
	}
403
		intel_gmbus_force_bit(i2c, false);
413
 
Line 662... Line 672...
662
	struct intel_crt *crt = intel_attached_crt(connector);
672
	struct intel_crt *crt = intel_attached_crt(connector);
Line 663... Line 673...
663
 
673
 
664
	if (HAS_PCH_SPLIT(dev)) {
674
	if (HAS_PCH_SPLIT(dev)) {
Line 665... Line 675...
665
		u32 adpa;
675
		u32 adpa;
666
 
676
 
667
		adpa = I915_READ(PCH_ADPA);
677
		adpa = I915_READ(crt->adpa_reg);
668
		adpa &= ~ADPA_CRT_HOTPLUG_MASK;
678
		adpa &= ~ADPA_CRT_HOTPLUG_MASK;
669
		adpa |= ADPA_HOTPLUG_BITS;
679
		adpa |= ADPA_HOTPLUG_BITS;
Line 670... Line 680...
670
		I915_WRITE(PCH_ADPA, adpa);
680
		I915_WRITE(crt->adpa_reg, adpa);
671
		POSTING_READ(PCH_ADPA);
681
		POSTING_READ(crt->adpa_reg);
672
 
682
 
Line 681... Line 691...
681
 */
691
 */
Line 682... Line 692...
682
 
692
 
683
static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
693
static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
684
	.mode_fixup = intel_crt_mode_fixup,
694
	.mode_fixup = intel_crt_mode_fixup,
685
	.mode_set = intel_crt_mode_set,
-
 
686
	.disable = intel_encoder_noop,
695
	.mode_set = intel_crt_mode_set,
Line 687... Line 696...
687
};
696
};
688
 
697
 
689
static const struct drm_connector_funcs intel_crt_connector_funcs = {
698
static const struct drm_connector_funcs intel_crt_connector_funcs = {
Line 721... Line 730...
721
		kfree(crt);
730
		kfree(crt);
722
		return;
731
		return;
723
	}
732
	}
Line 724... Line 733...
724
 
733
 
-
 
734
	connector = &intel_connector->base;
725
	connector = &intel_connector->base;
735
	crt->connector = intel_connector;
726
	drm_connector_init(dev, &intel_connector->base,
736
	drm_connector_init(dev, &intel_connector->base,
Line 727... Line 737...
727
			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
737
			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
728
 
738
 
Line 751... Line 761...
751
	else
761
	else
752
		crt->adpa_reg = ADPA;
762
		crt->adpa_reg = ADPA;
Line 753... Line 763...
753
 
763
 
754
	crt->base.disable = intel_disable_crt;
764
	crt->base.disable = intel_disable_crt;
755
	crt->base.enable = intel_enable_crt;
765
	crt->base.enable = intel_enable_crt;
756
	if (IS_HASWELL(dev))
766
	if (HAS_DDI(dev))
757
		crt->base.get_hw_state = intel_ddi_get_hw_state;
767
		crt->base.get_hw_state = intel_ddi_get_hw_state;
758
	else
768
	else
759
	crt->base.get_hw_state = intel_crt_get_hw_state;
769
	crt->base.get_hw_state = intel_crt_get_hw_state;
Line 775... Line 785...
775
	crt->force_hotplug_required = 0;
785
	crt->force_hotplug_required = 0;
Line 776... Line 786...
776
 
786
 
Line 777... Line 787...
777
	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
787
	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
778
 
788
 
779
	/*
789
	/*
-
 
790
	 * TODO: find a proper way to discover whether we need to set the the
780
	 * TODO: find a proper way to discover whether we need to set the
791
	 * polarity and link reversal bits or not, instead of relying on the
781
	 * polarity reversal bit or not, instead of relying on the BIOS.
792
	 * BIOS.
-
 
793
	 */
782
	 */
794
	if (HAS_PCH_LPT(dev)) {
-
 
795
		u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
783
	if (HAS_PCH_LPT(dev))
796
				 FDI_RX_LINK_REVERSAL_OVERRIDE;
-
 
797
 
784
		dev_priv->fdi_rx_polarity_reversed =
798
		dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;