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Rev 6084 Rev 6937
Line 365... Line 365...
365 
	}
 365 
	}
366 
	err_printf(m, "Reset count: %u\n", error->reset_count);
 366 
	err_printf(m, "Reset count: %u\n", error->reset_count);
367 
	err_printf(m, "Suspend count: %u\n", error->suspend_count);
 367 
	err_printf(m, "Suspend count: %u\n", error->suspend_count);
368 
	err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
 368 
	err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
369 
	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
 369 
	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
- 
 
 370 
 
- 
 
 371 
	if (HAS_CSR(dev)) {
- 
 
 372 
		struct intel_csr *csr = &dev_priv->csr;
- 
 
 373 
 
- 
 
 374 
		err_printf(m, "DMC loaded: %s\n",
- 
 
 375 
			   yesno(csr->dmc_payload != NULL));
- 
 
 376 
		err_printf(m, "DMC fw version: %d.%d\n",
- 
 
 377 
			   CSR_VERSION_MAJOR(csr->version),
- 
 
 378 
			   CSR_VERSION_MINOR(csr->version));
- 
 
 379 
	}
- 
 
 380 
 
370 
	err_printf(m, "EIR: 0x%08x\n", error->eir);
 381 
	err_printf(m, "EIR: 0x%08x\n", error->eir);
371 
	err_printf(m, "IER: 0x%08x\n", error->ier);
 382 
	err_printf(m, "IER: 0x%08x\n", error->ier);
372 
	if (INTEL_INFO(dev)->gen >= 8) {
 383 
	if (INTEL_INFO(dev)->gen >= 8) {
373 
		for (i = 0; i < 4; i++)
 384 
		for (i = 0; i < 4; i++)
374 
			err_printf(m, "GTIER gt %d: 0x%08x\n", i,
 385 
			err_printf(m, "GTIER gt %d: 0x%08x\n", i,
Line 861... Line 872...
861 
				   struct drm_i915_error_ring *ering)
 872 
				   struct drm_i915_error_ring *ering)
862 
{
 873 
{
863 
	struct drm_i915_private *dev_priv = dev->dev_private;
 874 
	struct drm_i915_private *dev_priv = dev->dev_private;
Line 864... Line 875...
864 
 
 875 
 
865 
	if (INTEL_INFO(dev)->gen >= 6) {
 876 
	if (INTEL_INFO(dev)->gen >= 6) {
866 
		ering->rc_psmi = I915_READ(ring->mmio_base + 0x50);
 877 
		ering->rc_psmi = I915_READ(RING_PSMI_CTL(ring->mmio_base));
867 
		ering->fault_reg = I915_READ(RING_FAULT_REG(ring));
 878 
		ering->fault_reg = I915_READ(RING_FAULT_REG(ring));
868 
		if (INTEL_INFO(dev)->gen >= 8)
 879 
		if (INTEL_INFO(dev)->gen >= 8)
869 
			gen8_record_semaphore_state(dev_priv, error, ring, ering);
 880 
			gen8_record_semaphore_state(dev_priv, error, ring, ering);
870 
		else
 881 
		else
Line 898... Line 909...
898 
	ering->head = I915_READ_HEAD(ring);
 909 
	ering->head = I915_READ_HEAD(ring);
899 
	ering->tail = I915_READ_TAIL(ring);
 910 
	ering->tail = I915_READ_TAIL(ring);
900 
	ering->ctl = I915_READ_CTL(ring);
 911 
	ering->ctl = I915_READ_CTL(ring);
Line 901... Line 912...
901 
 
 912 
 
902 
	if (I915_NEED_GFX_HWS(dev)) {
 913 
	if (I915_NEED_GFX_HWS(dev)) {
Line 903... Line 914...
903 
		int mmio;
 914 
		i915_reg_t mmio;
904 
 
 915 
 
905 
		if (IS_GEN7(dev)) {
 916 
		if (IS_GEN7(dev)) {
906 
			switch (ring->id) {
 917 
			switch (ring->id) {
Line 1070... Line 1081...
1070 
 
 1081 
 
1071 
		count = 0;
 1082 
		count = 0;
1072 
		list_for_each_entry(request, &ring->request_list, list) {
 1083 
		list_for_each_entry(request, &ring->request_list, list) {
Line -... Line 1084...
- 
 
 1084 
			struct drm_i915_error_request *erq;
- 
 
 1085 
 
- 
 
 1086 
			if (count >= error->ring[i].num_requests) {
- 
 
 1087 
				/*
- 
 
 1088 
				 * If the ring request list was changed in
- 
 
 1089 
				 * between the point where the error request
- 
 
 1090 
				 * list was created and dimensioned and this
- 
 
 1091 
				 * point then just exit early to avoid crashes.
- 
 
 1092 
				 *
- 
 
 1093 
				 * We don't need to communicate that the
- 
 
 1094 
				 * request list changed state during error
- 
 
 1095 
				 * state capture and that the error state is
- 
 
 1096 
				 * slightly incorrect as a consequence since we
- 
 
 1097 
				 * are typically only interested in the request
- 
 
 1098 
				 * list state at the point of error state
- 
 
 1099 
				 * capture, not in any changes happening during
- 
 
 1100 
				 * the capture.
- 
 
 1101 
				 */
- 
 
 1102 
				break;
1073 
			struct drm_i915_error_request *erq;
 1103 
			}
1074 
 
 1104 
 
1075 
			erq = &error->ring[i].requests[count++];
 1105 
			erq = &error->ring[i].requests[count++];
1076 
			erq->seqno = request->seqno;
 1106 
			erq->seqno = request->seqno;
1077 
			erq->jiffies = request->emitted_jiffies;
 1107 
			erq->jiffies = request->emitted_jiffies;
Line 1180... Line 1210...
1180 
 
 1210 
 
1181 
	/* 1: Registers specific to a single generation */
 1211 
	/* 1: Registers specific to a single generation */
1182 
	if (IS_VALLEYVIEW(dev)) {
 1212 
	if (IS_VALLEYVIEW(dev)) {
1183 
		error->gtier[0] = I915_READ(GTIER);
 1213 
		error->gtier[0] = I915_READ(GTIER);
1184 
		error->ier = I915_READ(VLV_IER);
 1214 
		error->ier = I915_READ(VLV_IER);
1185 
		error->forcewake = I915_READ(FORCEWAKE_VLV);
 1215 
		error->forcewake = I915_READ_FW(FORCEWAKE_VLV);
Line 1186... Line 1216...
1186 
	}
 1216 
	}
1187 
 
 1217 
 
Line 1192... Line 1222...
1192 
		error->fault_data0 = I915_READ(GEN8_FAULT_TLB_DATA0);
 1222 
		error->fault_data0 = I915_READ(GEN8_FAULT_TLB_DATA0);
1193 
		error->fault_data1 = I915_READ(GEN8_FAULT_TLB_DATA1);
 1223 
		error->fault_data1 = I915_READ(GEN8_FAULT_TLB_DATA1);
1194 
	}
 1224 
	}
Line 1195... Line 1225...
1195 
 
 1225 
 
1196 
	if (IS_GEN6(dev)) {
 1226 
	if (IS_GEN6(dev)) {
1197 
		error->forcewake = I915_READ(FORCEWAKE);
 1227 
		error->forcewake = I915_READ_FW(FORCEWAKE);
1198 
		error->gab_ctl = I915_READ(GAB_CTL);
 1228 
		error->gab_ctl = I915_READ(GAB_CTL);
1199 
		error->gfx_mode = I915_READ(GFX_MODE);
 1229 
		error->gfx_mode = I915_READ(GFX_MODE);
Line 1200... Line 1230...
1200 
	}
 1230 
	}
1201 
 
 1231 
 
1202 
	/* 2: Registers which belong to multiple generations */
 1232 
	/* 2: Registers which belong to multiple generations */
Line 1203... Line 1233...
1203 
	if (INTEL_INFO(dev)->gen >= 7)
 1233 
	if (INTEL_INFO(dev)->gen >= 7)
1204 
		error->forcewake = I915_READ(FORCEWAKE_MT);
 1234 
		error->forcewake = I915_READ_FW(FORCEWAKE_MT);
1205 
 
 1235 
 
1206 
	if (INTEL_INFO(dev)->gen >= 6) {
 1236 
	if (INTEL_INFO(dev)->gen >= 6) {