WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_gem_gtt.c

  */
 static int
 i915_get_ggtt_vma_pages(struct i915_vma *vma);
+const struct i915_ggtt_view i915_ggtt_view_normal = {
 	.type = I915_GGTT_VIEW_NORMAL,
-const struct i915_ggtt_view i915_ggtt_view_normal;
+};
 const struct i915_ggtt_view i915_ggtt_view_rotated = {
-        .type = I915_GGTT_VIEW_ROTATED
+	.type = I915_GGTT_VIEW_ROTATED,
 };
 	INIT_LIST_HEAD(&vm->active_list);
 	INIT_LIST_HEAD(&vm->inactive_list);
 	list_add_tail(&vm->global_link, &dev_priv->vm_list);
+}
+static void gtt_write_workarounds(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	/* This function is for gtt related workarounds. This function is
+	 * called on driver load and after a GPU reset, so you can place
+	 * workarounds here even if they get overwritten by GPU reset.
+	 */
+	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt */
+	if (IS_BROADWELL(dev))
+		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
+	else if (IS_CHERRYVIEW(dev))
+		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
+	else if (IS_SKYLAKE(dev))
+		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
+	else if (IS_BROXTON(dev))
+		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
+}
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
+{
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	return ret;
+}
 int i915_ppgtt_init_hw(struct drm_device *dev)
+{
+	gtt_write_workarounds(dev);
 	/* In the case of execlists, PPGTT is enabled by the context descriptor
 	 * and the PDPs are contained within the context itself.  We don't
 	 * need to do anything here. */
 	if (i915.enable_execlists)
 			DRM_DEBUG_KMS("Reservation failed: %i\n", ret);
 			return ret;
+		}
 		vma->bound |= GLOBAL_BIND;
 		__i915_vma_set_map_and_fenceable(vma);
-		list_add_tail(&vma->mm_list, &ggtt_vm->inactive_list);
+		list_add_tail(&vma->vm_link, &ggtt_vm->inactive_list);
+	}
 	/* Clear any non-preallocated blocks */
 	drm_mm_for_each_hole(entry, &ggtt_vm->mm, hole_start, hole_end) {
 		struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
 		ppgtt->base.cleanup(&ppgtt->base);
+	}
 	i915_gem_cleanup_stolen(dev);
 	if (drm_mm_initialized(&vm->mm)) {
 		if (intel_vgpu_active(dev))
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
 	*mappable_base = pci_resource_start(dev->pdev, 2);
-	*mappable_end = pci_resource_len(dev->pdev, 2);
-	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(39)))
-		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(39));
+	*mappable_end = pci_resource_len(dev->pdev, 2);
 	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 		DRM_ERROR("Unknown GMADR size (%llx)\n",
 			  dev_priv->gtt.mappable_end);
 		return -ENXIO;
+	}
-	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
 		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
 	pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 		dev_priv->gtt.gtt_probe = gen8_gmch_probe;
 		dev_priv->gtt.base.cleanup = gen6_gmch_remove;
+	}
+	gtt->base.dev = dev;
-	gtt->base.dev = dev;
+	gtt->base.is_ggtt = true;
 	ret = gtt->gtt_probe(dev, >t->base.total, >t->stolen_size,
 			     >t->mappable_base, >t->mappable_end);
+	if (ret)
+		return ret;
+	/*
+	 * Initialise stolen early so that we may reserve preallocated
+	 * objects for the BIOS to KMS transition.
+	 */
+	ret = i915_gem_init_stolen(dev);
 	if (ret)
-		return ret;
+		goto out_gtt_cleanup;
 	/* GMADR is the PCI mmio aperture into the global GTT. */
 	DRM_INFO("Memory usable by graphics device = %lluM\n",
 	 */
 	i915.enable_ppgtt = sanitize_enable_ppgtt(dev, i915.enable_ppgtt);
 	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);
+	return 0;
+out_gtt_cleanup:
+	gtt->base.cleanup(&dev_priv->gtt.base);
-	return 0;
+	return ret;
+}
 void i915_gem_restore_gtt_mappings(struct drm_device *dev)
 	/* Cache flush objects bound into GGTT and rebind them. */
 	vm = &dev_priv->gtt.base;
 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 		flush = false;
-		list_for_each_entry(vma, &obj->vma_list, vma_link) {
+		list_for_each_entry(vma, &obj->vma_list, obj_link) {
 			if (vma->vm != vm)
 				continue;
 //	vma = kmem_cache_zalloc(to_i915(obj->base.dev)->vmas, GFP_KERNEL);
 	vma = kzalloc(sizeof(*vma), GFP_KERNEL);
 	if (vma == NULL)
 		return ERR_PTR(-ENOMEM);
-	INIT_LIST_HEAD(&vma->vma_link);
+	INIT_LIST_HEAD(&vma->vm_link);
-	INIT_LIST_HEAD(&vma->mm_list);
+	INIT_LIST_HEAD(&vma->obj_link);
 	INIT_LIST_HEAD(&vma->exec_list);
 	vma->vm = vm;
+	vma->obj = obj;
-	vma->obj = obj;
+	vma->is_ggtt = i915_is_ggtt(vm);
 	if (i915_is_ggtt(vm))
-		vma->ggtt_view = *ggtt_view;
-	list_add_tail(&vma->vma_link, &obj->vma_list);
+		vma->ggtt_view = *ggtt_view;
+	else
+		i915_ppgtt_get(i915_vm_to_ppgtt(vm));
 	if (!i915_is_ggtt(vm))
-		i915_ppgtt_get(i915_vm_to_ppgtt(vm));
+	list_add_tail(&vma->obj_link, &obj->vma_list);
 	return vma;
 	return vma;
+}
 static struct scatterlist *
+rotate_pages(const dma_addr_t *in, unsigned int offset,
-rotate_pages(dma_addr_t *in, unsigned int offset,
+	     unsigned int width, unsigned int height,
-	     unsigned int width, unsigned int height,
+	     unsigned int stride,
 	     struct sg_table *st, struct scatterlist *sg)
+{
 		st->nents = 0;
 		sg = st->sgl;
+	}
 	for (column = 0; column < width; column++) {
-		src_idx = width * (height - 1) + column;
+		src_idx = stride * (height - 1) + column;
 		for (row = 0; row < height; row++) {
 			st->nents++;
 			/* We don't need the pages, but need to initialize
 			 * the entries so the sg list can be happily traversed.
 			 * The only thing we need are DMA addresses.
 			 */
 			sg_set_page(sg, NULL, PAGE_SIZE, 0);
 			sg_dma_address(sg) = in[offset + src_idx];
 			sg_dma_len(sg) = PAGE_SIZE;
 			sg = sg_next(sg);
-			src_idx -= width;
+			src_idx -= stride;
+		}
+	}
 	return sg;
 }
 static struct sg_table *
-intel_rotate_fb_obj_pages(struct i915_ggtt_view *ggtt_view,
-			  struct drm_i915_gem_object *obj)
+intel_rotate_fb_obj_pages(struct intel_rotation_info *rot_info,
 			  struct drm_i915_gem_object *obj)
 	struct intel_rotation_info *rot_info = &ggtt_view->params.rotation_info;
 	unsigned int size_pages = rot_info->size >> PAGE_SHIFT;
 	unsigned int size_pages_uv;
+	}
 	/* Rotate the pages. */
 	sg = rotate_pages(page_addr_list, 0,
+		     rot_info->width_pages, rot_info->height_pages,
-		     rot_info->width_pages, rot_info->height_pages,
+		     rot_info->width_pages,
 		     st, NULL);
 	/* Append the UV plane if NV12. */
 		rot_info->uv_start_page = uv_start_page;
 		rotate_pages(page_addr_list, uv_start_page,
 			     rot_info->width_pages_uv,
+			     rot_info->height_pages_uv,
-			     rot_info->height_pages_uv,
+			     rot_info->width_pages_uv,
 			     st, sg);
+	}
 	if (vma->ggtt_view.type == I915_GGTT_VIEW_NORMAL)
 		vma->ggtt_view.pages = vma->obj->pages;
 	else if (vma->ggtt_view.type == I915_GGTT_VIEW_ROTATED)
 		vma->ggtt_view.pages =
-			intel_rotate_fb_obj_pages(&vma->ggtt_view, vma->obj);
+			intel_rotate_fb_obj_pages(&vma->ggtt_view.params.rotated, vma->obj);
 	else if (vma->ggtt_view.type == I915_GGTT_VIEW_PARTIAL)
 		vma->ggtt_view.pages =
 			intel_partial_pages(&vma->ggtt_view, vma->obj);
 	else
 	if (bind_flags == 0)
 		return 0;
-	if (vma->bound == 0 && vma->vm->allocate_va_range) {
-		trace_i915_va_alloc(vma->vm,
-				    vma->node.start,
-				    vma->node.size,
 				    VM_TO_TRACE_NAME(vma->vm));
 	if (vma->bound == 0 && vma->vm->allocate_va_range) {
 		/* XXX: i915_vma_pin() will fix this +- hack */
 		vma->pin_count++;
 		ret = vma->vm->allocate_va_range(vma->vm,
 		    const struct i915_ggtt_view *view)
+{
 	if (view->type == I915_GGTT_VIEW_NORMAL) {
 		return obj->base.size;
 	} else if (view->type == I915_GGTT_VIEW_ROTATED) {
-		return view->params.rotation_info.size;
+		return view->params.rotated.size;
 	} else if (view->type == I915_GGTT_VIEW_PARTIAL) {
 		return view->params.partial.size << PAGE_SHIFT;
 	} else {
 		WARN_ONCE(1, "GGTT view %u not implemented!\n", view->type);
 		return obj->base.size;

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_gem_gtt.c – Rev 6937 → 7144