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1
/*
1
/*
2
 * Copyright © 2008,2010 Intel Corporation
2
 * Copyright © 2008,2010 Intel Corporation
3
 *
3
 *
4
 * Permission is hereby granted, free of charge, to any person obtaining a
4
 * Permission is hereby granted, free of charge, to any person obtaining a
5
 * copy of this software and associated documentation files (the "Software"),
5
 * copy of this software and associated documentation files (the "Software"),
6
 * to deal in the Software without restriction, including without limitation
6
 * to deal in the Software without restriction, including without limitation
7
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
 * and/or sell copies of the Software, and to permit persons to whom the
8
 * and/or sell copies of the Software, and to permit persons to whom the
9
 * Software is furnished to do so, subject to the following conditions:
9
 * Software is furnished to do so, subject to the following conditions:
10
 *
10
 *
11
 * The above copyright notice and this permission notice (including the next
11
 * The above copyright notice and this permission notice (including the next
12
 * paragraph) shall be included in all copies or substantial portions of the
12
 * paragraph) shall be included in all copies or substantial portions of the
13
 * Software.
13
 * Software.
14
 *
14
 *
15
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
20
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21
 * IN THE SOFTWARE.
21
 * IN THE SOFTWARE.
22
 *
22
 *
23
 * Authors:
23
 * Authors:
24
 *    Eric Anholt 
24
 *    Eric Anholt 
25
 *    Chris Wilson 
25
 *    Chris Wilson 
26
 *
26
 *
27
 */
27
 */
28
 
28
 
29
#include 
29
#include 
30
#include 
30
#include 
31
#include "i915_drv.h"
31
#include "i915_drv.h"
32
#include "i915_trace.h"
32
#include "i915_trace.h"
33
#include "intel_drv.h"
33
#include "intel_drv.h"
34
//#include 
34
//#include 
-
 
35
 
-
 
36
#define  __EXEC_OBJECT_HAS_PIN (1<<31)
35
 
37
#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
36
 
38
 
37
static unsigned long
39
static unsigned long
38
copy_to_user(void __user *to, const void *from, unsigned long n)
40
copy_to_user(void __user *to, const void *from, unsigned long n)
39
{
41
{
40
    memcpy(to, from, n);
42
    memcpy(to, from, n);
41
    return 0;
43
    return 0;
42
}
44
}
43
 
45
 
44
static unsigned long
46
static unsigned long
45
copy_from_user(void *to, const void __user *from, unsigned long n)
47
copy_from_user(void *to, const void __user *from, unsigned long n)
46
{
48
{
47
    memcpy(to, from, n);
49
    memcpy(to, from, n);
48
    return 0;
50
    return 0;
49
}
51
}
50
 
52
 
51
struct eb_objects {
53
struct eb_vmas {
52
	struct list_head objects;
54
	struct list_head vmas;
53
	int and;
55
	int and;
54
	union {
56
	union {
55
		struct drm_i915_gem_object *lut[0];
57
		struct i915_vma *lut[0];
56
	struct hlist_head buckets[0];
58
	struct hlist_head buckets[0];
57
	};
59
	};
58
};
60
};
59
 
61
 
60
static struct eb_objects *
62
static struct eb_vmas *
61
eb_create(struct drm_i915_gem_execbuffer2 *args)
63
eb_create(struct drm_i915_gem_execbuffer2 *args)
62
{
64
{
63
	struct eb_objects *eb = NULL;
65
	struct eb_vmas *eb = NULL;
64
 
66
 
65
	if (args->flags & I915_EXEC_HANDLE_LUT) {
67
	if (args->flags & I915_EXEC_HANDLE_LUT) {
66
		int size = args->buffer_count;
68
		unsigned size = args->buffer_count;
67
		size *= sizeof(struct drm_i915_gem_object *);
69
		size *= sizeof(struct i915_vma *);
68
		size += sizeof(struct eb_objects);
70
		size += sizeof(struct eb_vmas);
69
		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
71
		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
70
	}
72
	}
71
 
73
 
72
	if (eb == NULL) {
74
	if (eb == NULL) {
73
		int size = args->buffer_count;
75
		unsigned size = args->buffer_count;
74
	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
76
		unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
75
		BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
77
		BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
76
		while (count > 2*size)
78
		while (count > 2*size)
77
		count >>= 1;
79
		count >>= 1;
78
	eb = kzalloc(count*sizeof(struct hlist_head) +
80
	eb = kzalloc(count*sizeof(struct hlist_head) +
79
		     sizeof(struct eb_objects),
81
			     sizeof(struct eb_vmas),
80
			     GFP_TEMPORARY);
82
			     GFP_TEMPORARY);
81
	if (eb == NULL)
83
	if (eb == NULL)
82
		return eb;
84
		return eb;
83
 
85
 
84
	eb->and = count - 1;
86
	eb->and = count - 1;
85
	} else
87
	} else
86
		eb->and = -args->buffer_count;
88
		eb->and = -args->buffer_count;
87
 
89
 
88
	INIT_LIST_HEAD(&eb->objects);
90
	INIT_LIST_HEAD(&eb->vmas);
89
	return eb;
91
	return eb;
90
}
92
}
91
 
93
 
92
static void
94
static void
93
eb_reset(struct eb_objects *eb)
95
eb_reset(struct eb_vmas *eb)
94
{
96
{
95
	if (eb->and >= 0)
97
	if (eb->and >= 0)
96
	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
98
	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
97
}
99
}
98
 
100
 
99
static int
101
static int
100
eb_lookup_objects(struct eb_objects *eb,
102
eb_lookup_vmas(struct eb_vmas *eb,
101
		  struct drm_i915_gem_exec_object2 *exec,
103
		  struct drm_i915_gem_exec_object2 *exec,
102
		  const struct drm_i915_gem_execbuffer2 *args,
104
		  const struct drm_i915_gem_execbuffer2 *args,
-
 
105
	       struct i915_address_space *vm,
103
		  struct drm_file *file)
106
		  struct drm_file *file)
104
{
107
{
-
 
108
	struct drm_i915_gem_object *obj;
-
 
109
	struct list_head objects;
105
	int i;
110
	int i, ret;
-
 
111
 
106
 
112
	INIT_LIST_HEAD(&objects);
-
 
113
	spin_lock(&file->table_lock);
-
 
114
	/* Grab a reference to the object and release the lock so we can lookup
107
	spin_lock(&file->table_lock);
115
	 * or create the VMA without using GFP_ATOMIC */
108
	for (i = 0; i < args->buffer_count; i++) {
-
 
109
		struct drm_i915_gem_object *obj;
-
 
110
 
116
	for (i = 0; i < args->buffer_count; i++) {
111
		    obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
117
		    obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
112
		if (obj == NULL) {
118
		if (obj == NULL) {
113
			spin_unlock(&file->table_lock);
119
			spin_unlock(&file->table_lock);
114
			DRM_DEBUG("Invalid object handle %d at index %d\n",
120
			DRM_DEBUG("Invalid object handle %d at index %d\n",
115
				   exec[i].handle, i);
121
				   exec[i].handle, i);
116
			return -ENOENT;
122
			ret = -ENOENT;
-
 
123
			goto err;
117
		}
124
		}
118
 
125
 
119
		if (!list_empty(&obj->exec_list)) {
126
		if (!list_empty(&obj->obj_exec_link)) {
120
			spin_unlock(&file->table_lock);
127
			spin_unlock(&file->table_lock);
121
			DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
128
			DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
122
				   obj, exec[i].handle, i);
129
				   obj, exec[i].handle, i);
123
			return -EINVAL;
130
			ret = -EINVAL;
-
 
131
			goto err;
124
		}
132
		}
125
 
133
 
126
		drm_gem_object_reference(&obj->base);
134
		drm_gem_object_reference(&obj->base);
127
		list_add_tail(&obj->exec_list, &eb->objects);
135
		list_add_tail(&obj->obj_exec_link, &objects);
-
 
136
	}
-
 
137
	spin_unlock(&file->table_lock);
-
 
138
 
-
 
139
	i = 0;
-
 
140
	while (!list_empty(&objects)) {
-
 
141
		struct i915_vma *vma;
-
 
142
 
-
 
143
		obj = list_first_entry(&objects,
-
 
144
				       struct drm_i915_gem_object,
-
 
145
				       obj_exec_link);
-
 
146
 
-
 
147
		/*
-
 
148
		 * NOTE: We can leak any vmas created here when something fails
-
 
149
		 * later on. But that's no issue since vma_unbind can deal with
-
 
150
		 * vmas which are not actually bound. And since only
-
 
151
		 * lookup_or_create exists as an interface to get at the vma
-
 
152
		 * from the (obj, vm) we don't run the risk of creating
-
 
153
		 * duplicated vmas for the same vm.
-
 
154
		 */
-
 
155
		vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
-
 
156
		if (IS_ERR(vma)) {
-
 
157
			DRM_DEBUG("Failed to lookup VMA\n");
-
 
158
			ret = PTR_ERR(vma);
-
 
159
			goto err;
-
 
160
		}
-
 
161
 
-
 
162
		/* Transfer ownership from the objects list to the vmas list. */
-
 
163
		list_add_tail(&vma->exec_list, &eb->vmas);
-
 
164
		list_del_init(&obj->obj_exec_link);
128
 
165
 
129
		obj->exec_entry = &exec[i];
166
		vma->exec_entry = &exec[i];
130
		if (eb->and < 0) {
167
		if (eb->and < 0) {
131
			eb->lut[i] = obj;
168
			eb->lut[i] = vma;
132
		} else {
169
		} else {
133
			uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
170
			uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
134
			obj->exec_handle = handle;
171
			vma->exec_handle = handle;
135
	hlist_add_head(&obj->exec_node,
172
			hlist_add_head(&vma->exec_node,
136
				       &eb->buckets[handle & eb->and]);
173
				       &eb->buckets[handle & eb->and]);
-
 
174
		}
137
		}
175
		++i;
138
	}
-
 
139
	spin_unlock(&file->table_lock);
176
	}
-
 
177
 
-
 
178
	return 0;
-
 
179
 
-
 
180
 
-
 
181
err:
-
 
182
	while (!list_empty(&objects)) {
-
 
183
		obj = list_first_entry(&objects,
-
 
184
				       struct drm_i915_gem_object,
-
 
185
				       obj_exec_link);
-
 
186
		list_del_init(&obj->obj_exec_link);
-
 
187
		drm_gem_object_unreference(&obj->base);
-
 
188
	}
-
 
189
	/*
-
 
190
	 * Objects already transfered to the vmas list will be unreferenced by
-
 
191
	 * eb_destroy.
-
 
192
	 */
140
 
193
 
141
	return 0;
-
 
142
}
194
	return ret;
143
 
195
}
144
static struct drm_i915_gem_object *
196
 
145
eb_get_object(struct eb_objects *eb, unsigned long handle)
197
static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
146
{
198
{
147
	if (eb->and < 0) {
199
	if (eb->and < 0) {
148
		if (handle >= -eb->and)
200
		if (handle >= -eb->and)
149
			return NULL;
201
			return NULL;
150
		return eb->lut[handle];
202
		return eb->lut[handle];
151
	} else {
203
	} else {
152
	struct hlist_head *head;
204
	struct hlist_head *head;
153
	struct hlist_node *node;
205
	struct hlist_node *node;
154
 
206
 
155
	head = &eb->buckets[handle & eb->and];
207
	head = &eb->buckets[handle & eb->and];
156
	hlist_for_each(node, head) {
208
	hlist_for_each(node, head) {
157
			struct drm_i915_gem_object *obj;
209
			struct i915_vma *vma;
158
 
210
 
159
		obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
211
			vma = hlist_entry(node, struct i915_vma, exec_node);
160
		if (obj->exec_handle == handle)
212
			if (vma->exec_handle == handle)
161
			return obj;
213
				return vma;
162
	}
214
	}
163
	return NULL;
215
	return NULL;
164
	}
216
	}
165
}
217
}
166
 
218
 
167
static void
219
static void
168
eb_destroy(struct eb_objects *eb)
220
i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
169
{
221
{
170
	while (!list_empty(&eb->objects)) {
222
	struct drm_i915_gem_exec_object2 *entry;
171
		struct drm_i915_gem_object *obj;
223
	struct drm_i915_gem_object *obj = vma->obj;
-
 
224
 
-
 
225
	if (!drm_mm_node_allocated(&vma->node))
-
 
226
		return;
-
 
227
 
-
 
228
	entry = vma->exec_entry;
-
 
229
 
-
 
230
	if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
-
 
231
		i915_gem_object_unpin_fence(obj);
-
 
232
 
-
 
233
	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
-
 
234
		i915_gem_object_unpin(obj);
-
 
235
 
-
 
236
	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
-
 
237
}
-
 
238
 
-
 
239
static void eb_destroy(struct eb_vmas *eb)
-
 
240
{
-
 
241
	while (!list_empty(&eb->vmas)) {
-
 
242
		struct i915_vma *vma;
172
 
243
 
173
		obj = list_first_entry(&eb->objects,
244
		vma = list_first_entry(&eb->vmas,
174
				       struct drm_i915_gem_object,
245
				       struct i915_vma,
175
				       exec_list);
246
				       exec_list);
-
 
247
		list_del_init(&vma->exec_list);
176
		list_del_init(&obj->exec_list);
248
		i915_gem_execbuffer_unreserve_vma(vma);
177
		drm_gem_object_unreference(&obj->base);
249
		drm_gem_object_unreference(&vma->obj->base);
178
	}
250
	}
179
	kfree(eb);
251
	kfree(eb);
180
}
252
}
181
 
253
 
182
static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
254
static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
183
{
255
{
-
 
256
	return (HAS_LLC(obj->base.dev) ||
184
	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
257
		obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
185
		!obj->map_and_fenceable ||
258
		!obj->map_and_fenceable ||
186
		obj->cache_level != I915_CACHE_NONE);
259
		obj->cache_level != I915_CACHE_NONE);
187
}
260
}
188
 
261
 
189
static int
262
static int
190
relocate_entry_cpu(struct drm_i915_gem_object *obj,
263
relocate_entry_cpu(struct drm_i915_gem_object *obj,
191
		   struct drm_i915_gem_relocation_entry *reloc)
264
		   struct drm_i915_gem_relocation_entry *reloc)
192
{
265
{
193
    struct drm_device *dev = obj->base.dev;
266
    struct drm_device *dev = obj->base.dev;
194
    struct drm_i915_private *dev_priv = dev->dev_private;
267
    struct drm_i915_private *dev_priv = dev->dev_private;
195
	uint32_t page_offset = offset_in_page(reloc->offset);
268
	uint32_t page_offset = offset_in_page(reloc->offset);
196
	char *vaddr;
269
	char *vaddr;
197
	int ret = -EINVAL;
270
	int ret;
198
 
271
 
199
	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
272
	ret = i915_gem_object_set_to_cpu_domain(obj, true);
200
	if (ret)
273
	if (ret)
201
		return ret;
274
		return ret;
202
 
275
 
203
    vaddr = dev_priv->gtt.mappable+4096;
276
    vaddr = dev_priv->gtt.mappable+4096;
204
    MapPage(vaddr,(addr_t)i915_gem_object_get_page(obj,reloc->offset >> PAGE_SHIFT), PG_SW);
277
    MapPage(vaddr,(addr_t)i915_gem_object_get_page(obj,reloc->offset >> PAGE_SHIFT), PG_SW);
205
	*(uint32_t *)(vaddr + page_offset) = reloc->delta;
278
	*(uint32_t *)(vaddr + page_offset) = reloc->delta;
206
 
279
 
207
	return 0;
280
	return 0;
208
}
281
}
209
 
282
 
210
static int
283
static int
211
relocate_entry_gtt(struct drm_i915_gem_object *obj,
284
relocate_entry_gtt(struct drm_i915_gem_object *obj,
212
		   struct drm_i915_gem_relocation_entry *reloc)
285
		   struct drm_i915_gem_relocation_entry *reloc)
213
{
286
{
214
	struct drm_device *dev = obj->base.dev;
287
	struct drm_device *dev = obj->base.dev;
215
	struct drm_i915_private *dev_priv = dev->dev_private;
288
	struct drm_i915_private *dev_priv = dev->dev_private;
216
	uint32_t __iomem *reloc_entry;
289
	uint32_t __iomem *reloc_entry;
217
	void __iomem *reloc_page;
290
	void __iomem *reloc_page;
218
	int ret = -EINVAL;
291
	int ret;
219
 
292
 
220
	ret = i915_gem_object_set_to_gtt_domain(obj, true);
293
	ret = i915_gem_object_set_to_gtt_domain(obj, true);
221
	if (ret)
294
	if (ret)
222
		return ret;
295
		return ret;
223
 
296
 
224
	ret = i915_gem_object_put_fence(obj);
297
	ret = i915_gem_object_put_fence(obj);
225
	if (ret)
298
	if (ret)
226
		return ret;
299
		return ret;
227
 
300
 
228
	/* Map the page containing the relocation we're going to perform.  */
301
	/* Map the page containing the relocation we're going to perform.  */
229
	reloc->offset += i915_gem_obj_ggtt_offset(obj);
302
	reloc->offset += i915_gem_obj_ggtt_offset(obj);
230
    MapPage(dev_priv->gtt.mappable,dev_priv->gtt.mappable_base +
303
    MapPage(dev_priv->gtt.mappable,dev_priv->gtt.mappable_base +
231
                                 (reloc->offset & PAGE_MASK), PG_SW);
304
                                 (reloc->offset & PAGE_MASK), PG_SW);
232
	reloc_page = dev_priv->gtt.mappable;
305
	reloc_page = dev_priv->gtt.mappable;
233
	reloc_entry = (uint32_t __iomem *)
306
	reloc_entry = (uint32_t __iomem *)
234
		(reloc_page + offset_in_page(reloc->offset));
307
		(reloc_page + offset_in_page(reloc->offset));
235
	iowrite32(reloc->delta, reloc_entry);
308
	iowrite32(reloc->delta, reloc_entry);
236
 
309
 
237
	return 0;
310
	return 0;
238
}
311
}
239
 
312
 
240
static int
313
static int
241
i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
314
i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
242
				   struct eb_objects *eb,
315
				   struct eb_vmas *eb,
243
				   struct drm_i915_gem_relocation_entry *reloc,
316
				   struct drm_i915_gem_relocation_entry *reloc,
244
				   struct i915_address_space *vm)
317
				   struct i915_address_space *vm)
245
{
318
{
246
	struct drm_device *dev = obj->base.dev;
319
	struct drm_device *dev = obj->base.dev;
247
	struct drm_gem_object *target_obj;
320
	struct drm_gem_object *target_obj;
248
	struct drm_i915_gem_object *target_i915_obj;
321
	struct drm_i915_gem_object *target_i915_obj;
-
 
322
	struct i915_vma *target_vma;
249
	uint32_t target_offset;
323
	uint32_t target_offset;
250
	int ret = -EINVAL;
324
	int ret;
251
 
325
 
252
	/* we've already hold a reference to all valid objects */
326
	/* we've already hold a reference to all valid objects */
253
	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
327
	target_vma = eb_get_vma(eb, reloc->target_handle);
254
	if (unlikely(target_obj == NULL))
328
	if (unlikely(target_vma == NULL))
-
 
329
		return -ENOENT;
-
 
330
	target_i915_obj = target_vma->obj;
255
		return -ENOENT;
-
 
256
 
331
	target_obj = &target_vma->obj->base;
257
	target_i915_obj = to_intel_bo(target_obj);
332
 
258
	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
333
	target_offset = target_vma->node.start;
259
 
334
 
260
	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
335
	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
261
	 * pipe_control writes because the gpu doesn't properly redirect them
336
	 * pipe_control writes because the gpu doesn't properly redirect them
262
	 * through the ppgtt for non_secure batchbuffers. */
337
	 * through the ppgtt for non_secure batchbuffers. */
263
	if (unlikely(IS_GEN6(dev) &&
338
	if (unlikely(IS_GEN6(dev) &&
264
	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
339
	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
265
	    !target_i915_obj->has_global_gtt_mapping)) {
340
	    !target_i915_obj->has_global_gtt_mapping)) {
266
		i915_gem_gtt_bind_object(target_i915_obj,
341
		i915_gem_gtt_bind_object(target_i915_obj,
267
					 target_i915_obj->cache_level);
342
					 target_i915_obj->cache_level);
268
	}
343
	}
269
 
344
 
270
	/* Validate that the target is in a valid r/w GPU domain */
345
	/* Validate that the target is in a valid r/w GPU domain */
271
	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
346
	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
272
		DRM_DEBUG("reloc with multiple write domains: "
347
		DRM_DEBUG("reloc with multiple write domains: "
273
			  "obj %p target %d offset %d "
348
			  "obj %p target %d offset %d "
274
			  "read %08x write %08x",
349
			  "read %08x write %08x",
275
			  obj, reloc->target_handle,
350
			  obj, reloc->target_handle,
276
			  (int) reloc->offset,
351
			  (int) reloc->offset,
277
			  reloc->read_domains,
352
			  reloc->read_domains,
278
			  reloc->write_domain);
353
			  reloc->write_domain);
279
		return ret;
354
		return -EINVAL;
280
	}
355
	}
281
	if (unlikely((reloc->write_domain | reloc->read_domains)
356
	if (unlikely((reloc->write_domain | reloc->read_domains)
282
		     & ~I915_GEM_GPU_DOMAINS)) {
357
		     & ~I915_GEM_GPU_DOMAINS)) {
283
		DRM_DEBUG("reloc with read/write non-GPU domains: "
358
		DRM_DEBUG("reloc with read/write non-GPU domains: "
284
			  "obj %p target %d offset %d "
359
			  "obj %p target %d offset %d "
285
			  "read %08x write %08x",
360
			  "read %08x write %08x",
286
			  obj, reloc->target_handle,
361
			  obj, reloc->target_handle,
287
			  (int) reloc->offset,
362
			  (int) reloc->offset,
288
			  reloc->read_domains,
363
			  reloc->read_domains,
289
			  reloc->write_domain);
364
			  reloc->write_domain);
290
		return ret;
365
		return -EINVAL;
291
	}
366
	}
292
 
367
 
293
	target_obj->pending_read_domains |= reloc->read_domains;
368
	target_obj->pending_read_domains |= reloc->read_domains;
294
	target_obj->pending_write_domain |= reloc->write_domain;
369
	target_obj->pending_write_domain |= reloc->write_domain;
295
 
370
 
296
	/* If the relocation already has the right value in it, no
371
	/* If the relocation already has the right value in it, no
297
	 * more work needs to be done.
372
	 * more work needs to be done.
298
	 */
373
	 */
299
	if (target_offset == reloc->presumed_offset)
374
	if (target_offset == reloc->presumed_offset)
300
		return 0;
375
		return 0;
301
 
376
 
302
	/* Check that the relocation address is valid... */
377
	/* Check that the relocation address is valid... */
303
	if (unlikely(reloc->offset > obj->base.size - 4)) {
378
	if (unlikely(reloc->offset >
-
 
379
		obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) {
304
		DRM_DEBUG("Relocation beyond object bounds: "
380
		DRM_DEBUG("Relocation beyond object bounds: "
305
			  "obj %p target %d offset %d size %d.\n",
381
			  "obj %p target %d offset %d size %d.\n",
306
			  obj, reloc->target_handle,
382
			  obj, reloc->target_handle,
307
			  (int) reloc->offset,
383
			  (int) reloc->offset,
308
			  (int) obj->base.size);
384
			  (int) obj->base.size);
309
		return ret;
385
		return -EINVAL;
310
	}
386
	}
311
	if (unlikely(reloc->offset & 3)) {
387
	if (unlikely(reloc->offset & 3)) {
312
		DRM_DEBUG("Relocation not 4-byte aligned: "
388
		DRM_DEBUG("Relocation not 4-byte aligned: "
313
			  "obj %p target %d offset %d.\n",
389
			  "obj %p target %d offset %d.\n",
314
			  obj, reloc->target_handle,
390
			  obj, reloc->target_handle,
315
			  (int) reloc->offset);
391
			  (int) reloc->offset);
316
		return ret;
392
		return -EINVAL;
317
	}
393
	}
318
 
394
 
319
	/* We can't wait for rendering with pagefaults disabled */
395
	/* We can't wait for rendering with pagefaults disabled */
320
 
396
 
321
	reloc->delta += target_offset;
397
	reloc->delta += target_offset;
322
	if (use_cpu_reloc(obj))
398
	if (use_cpu_reloc(obj))
323
		ret = relocate_entry_cpu(obj, reloc);
399
		ret = relocate_entry_cpu(obj, reloc);
324
	else
400
	else
325
		ret = relocate_entry_gtt(obj, reloc);
401
		ret = relocate_entry_gtt(obj, reloc);
326
 
402
 
327
		if (ret)
403
		if (ret)
328
			return ret;
404
			return ret;
329
 
405
 
330
	/* and update the user's relocation entry */
406
	/* and update the user's relocation entry */
331
	reloc->presumed_offset = target_offset;
407
	reloc->presumed_offset = target_offset;
332
 
408
 
333
	return 0;
409
	return 0;
334
}
410
}
335
 
411
 
336
static int
412
static int
337
i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
413
i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
338
				    struct eb_objects *eb,
414
				 struct eb_vmas *eb)
339
				    struct i915_address_space *vm)
-
 
340
{
415
{
341
#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
416
#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
342
	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];
417
	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];
343
	struct drm_i915_gem_relocation_entry __user *user_relocs;
418
	struct drm_i915_gem_relocation_entry __user *user_relocs;
344
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
419
	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
345
	int remain, ret;
420
	int remain, ret;
346
 
421
 
347
	user_relocs = to_user_ptr(entry->relocs_ptr);
422
	user_relocs = to_user_ptr(entry->relocs_ptr);
348
 
423
 
349
	remain = entry->relocation_count;
424
	remain = entry->relocation_count;
350
	while (remain) {
425
	while (remain) {
351
		struct drm_i915_gem_relocation_entry *r = stack_reloc;
426
		struct drm_i915_gem_relocation_entry *r = stack_reloc;
352
		int count = remain;
427
		int count = remain;
353
		if (count > ARRAY_SIZE(stack_reloc))
428
		if (count > ARRAY_SIZE(stack_reloc))
354
			count = ARRAY_SIZE(stack_reloc);
429
			count = ARRAY_SIZE(stack_reloc);
355
		remain -= count;
430
		remain -= count;
356
 
431
 
357
        memcpy(r, user_relocs, count*sizeof(r[0]));
432
        memcpy(r, user_relocs, count*sizeof(r[0]));
358
 
433
 
359
		do {
434
		do {
360
			u64 offset = r->presumed_offset;
435
			u64 offset = r->presumed_offset;
361
 
436
 
362
			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
437
			ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
363
								 vm);
438
								 vma->vm);
364
			if (ret)
439
			if (ret)
365
				return ret;
440
				return ret;
366
 
441
 
367
		if (r->presumed_offset != offset)
442
		if (r->presumed_offset != offset)
368
		{
443
		{
369
            memcpy(&user_relocs->presumed_offset,
444
            memcpy(&user_relocs->presumed_offset,
370
                   &r->presumed_offset,
445
                   &r->presumed_offset,
371
                   sizeof(r->presumed_offset));
446
                   sizeof(r->presumed_offset));
372
		}
447
		}
373
 
448
 
374
			user_relocs++;
449
			user_relocs++;
375
			r++;
450
			r++;
376
		} while (--count);
451
		} while (--count);
377
	}
452
	}
378
 
453
 
379
	return 0;
454
	return 0;
380
#undef N_RELOC
455
#undef N_RELOC
381
}
456
}
382
 
457
 
383
static int
458
static int
384
i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
459
i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
385
					 struct eb_objects *eb,
460
				      struct eb_vmas *eb,
386
					 struct drm_i915_gem_relocation_entry *relocs,
461
				      struct drm_i915_gem_relocation_entry *relocs)
387
					 struct i915_address_space *vm)
-
 
388
{
462
{
389
	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
463
	const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
390
	int i, ret;
464
	int i, ret;
391
 
465
 
392
	for (i = 0; i < entry->relocation_count; i++) {
466
	for (i = 0; i < entry->relocation_count; i++) {
393
		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
467
		ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
394
							 vm);
468
							 vma->vm);
395
		if (ret)
469
		if (ret)
396
			return ret;
470
			return ret;
397
	}
471
	}
398
 
472
 
399
	return 0;
473
	return 0;
400
}
474
}
401
 
475
 
402
static int
476
static int
403
i915_gem_execbuffer_relocate(struct eb_objects *eb,
477
i915_gem_execbuffer_relocate(struct eb_vmas *eb)
404
			     struct i915_address_space *vm)
-
 
405
{
478
{
406
	struct drm_i915_gem_object *obj;
479
	struct i915_vma *vma;
407
	int ret = 0;
480
	int ret = 0;
408
 
481
 
409
	/* This is the fast path and we cannot handle a pagefault whilst
482
	/* This is the fast path and we cannot handle a pagefault whilst
410
	 * holding the struct mutex lest the user pass in the relocations
483
	 * holding the struct mutex lest the user pass in the relocations
411
	 * contained within a mmaped bo. For in such a case we, the page
484
	 * contained within a mmaped bo. For in such a case we, the page
412
	 * fault handler would call i915_gem_fault() and we would try to
485
	 * fault handler would call i915_gem_fault() and we would try to
413
	 * acquire the struct mutex again. Obviously this is bad and so
486
	 * acquire the struct mutex again. Obviously this is bad and so
414
	 * lockdep complains vehemently.
487
	 * lockdep complains vehemently.
415
	 */
488
	 */
416
//	pagefault_disable();
489
//	pagefault_disable();
417
	list_for_each_entry(obj, &eb->objects, exec_list) {
490
	list_for_each_entry(vma, &eb->vmas, exec_list) {
418
		ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
491
		ret = i915_gem_execbuffer_relocate_vma(vma, eb);
419
		if (ret)
492
		if (ret)
420
			break;
493
			break;
421
	}
494
	}
422
//   pagefault_enable();
495
//   pagefault_enable();
423
 
496
 
424
	return ret;
497
	return ret;
425
}
498
}
426
 
-
 
427
#define  __EXEC_OBJECT_HAS_PIN (1<<31)
-
 
428
#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
-
 
429
 
499
 
430
static int
500
static int
431
need_reloc_mappable(struct drm_i915_gem_object *obj)
501
need_reloc_mappable(struct i915_vma *vma)
432
{
502
{
433
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
503
	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
-
 
504
	return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
434
	return entry->relocation_count && !use_cpu_reloc(obj);
505
		i915_is_ggtt(vma->vm);
435
}
506
}
436
 
507
 
437
static int
508
static int
438
i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
509
i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
439
				   struct intel_ring_buffer *ring,
510
				   struct intel_ring_buffer *ring,
440
				   struct i915_address_space *vm,
-
 
441
				   bool *need_reloc)
511
				   bool *need_reloc)
442
{
512
{
443
	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
513
	struct drm_i915_private *dev_priv = ring->dev->dev_private;
444
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
514
	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
445
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
515
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
446
	bool need_fence, need_mappable;
516
	bool need_fence, need_mappable;
-
 
517
	struct drm_i915_gem_object *obj = vma->obj;
447
	int ret;
518
	int ret;
448
 
519
 
449
	need_fence =
520
	need_fence =
450
		has_fenced_gpu_access &&
521
		has_fenced_gpu_access &&
451
		entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
522
		entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
452
		obj->tiling_mode != I915_TILING_NONE;
523
		obj->tiling_mode != I915_TILING_NONE;
453
	need_mappable = need_fence || need_reloc_mappable(obj);
524
	need_mappable = need_fence || need_reloc_mappable(vma);
454
 
525
 
455
	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
526
	ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
456
				  false);
527
				  false);
457
	if (ret)
528
	if (ret)
458
		return ret;
529
		return ret;
459
 
530
 
460
	entry->flags |= __EXEC_OBJECT_HAS_PIN;
531
	entry->flags |= __EXEC_OBJECT_HAS_PIN;
461
 
532
 
462
	if (has_fenced_gpu_access) {
533
	if (has_fenced_gpu_access) {
463
		if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
534
		if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
464
			ret = i915_gem_object_get_fence(obj);
535
			ret = i915_gem_object_get_fence(obj);
465
			if (ret)
536
			if (ret)
466
				return ret;
537
				return ret;
467
 
538
 
468
			if (i915_gem_object_pin_fence(obj))
539
			if (i915_gem_object_pin_fence(obj))
469
				entry->flags |= __EXEC_OBJECT_HAS_FENCE;
540
				entry->flags |= __EXEC_OBJECT_HAS_FENCE;
470
 
541
 
471
			obj->pending_fenced_gpu_access = true;
542
			obj->pending_fenced_gpu_access = true;
472
		}
543
		}
473
	}
544
	}
474
 
545
 
475
	/* Ensure ppgtt mapping exists if needed */
546
	/* Ensure ppgtt mapping exists if needed */
476
	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
547
	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
477
		i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
548
		i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
478
				       obj, obj->cache_level);
549
				       obj, obj->cache_level);
479
 
550
 
480
		obj->has_aliasing_ppgtt_mapping = 1;
551
		obj->has_aliasing_ppgtt_mapping = 1;
481
	}
552
	}
482
 
553
 
483
	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
554
	if (entry->offset != vma->node.start) {
484
		entry->offset = i915_gem_obj_offset(obj, vm);
555
		entry->offset = vma->node.start;
485
		*need_reloc = true;
556
		*need_reloc = true;
486
	}
557
	}
487
 
558
 
488
	if (entry->flags & EXEC_OBJECT_WRITE) {
559
	if (entry->flags & EXEC_OBJECT_WRITE) {
489
		obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
560
		obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
490
		obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
561
		obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
491
	}
562
	}
492
 
563
 
493
	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
564
	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
494
	    !obj->has_global_gtt_mapping)
565
	    !obj->has_global_gtt_mapping)
495
		i915_gem_gtt_bind_object(obj, obj->cache_level);
566
		i915_gem_gtt_bind_object(obj, obj->cache_level);
496
 
567
 
497
	return 0;
568
	return 0;
498
}
569
}
499
 
-
 
500
static void
-
 
501
i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
-
 
502
{
-
 
503
	struct drm_i915_gem_exec_object2 *entry;
-
 
504
 
-
 
505
	if (!i915_gem_obj_bound_any(obj))
-
 
506
		return;
-
 
507
 
-
 
508
	entry = obj->exec_entry;
-
 
509
 
-
 
510
	if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
-
 
511
		i915_gem_object_unpin_fence(obj);
-
 
512
 
-
 
513
	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
-
 
514
		i915_gem_object_unpin(obj);
-
 
515
 
-
 
516
	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
-
 
517
}
-
 
518
 
570
 
519
static int
571
static int
520
i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
572
i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
521
			    struct list_head *objects,
-
 
522
			    struct i915_address_space *vm,
573
			    struct list_head *vmas,
523
			    bool *need_relocs)
574
			    bool *need_relocs)
524
{
575
{
525
	struct drm_i915_gem_object *obj;
576
	struct drm_i915_gem_object *obj;
-
 
577
	struct i915_vma *vma;
-
 
578
	struct i915_address_space *vm;
526
	struct list_head ordered_objects;
579
	struct list_head ordered_vmas;
527
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
580
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
528
	int retry;
581
	int retry;
-
 
582
 
-
 
583
	if (list_empty(vmas))
-
 
584
		return 0;
-
 
585
 
-
 
586
	vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
529
 
587
 
530
	INIT_LIST_HEAD(&ordered_objects);
588
	INIT_LIST_HEAD(&ordered_vmas);
531
	while (!list_empty(objects)) {
589
	while (!list_empty(vmas)) {
532
		struct drm_i915_gem_exec_object2 *entry;
590
		struct drm_i915_gem_exec_object2 *entry;
533
		bool need_fence, need_mappable;
591
		bool need_fence, need_mappable;
534
 
592
 
535
		obj = list_first_entry(objects,
-
 
536
				       struct drm_i915_gem_object,
593
		vma = list_first_entry(vmas, struct i915_vma, exec_list);
537
				       exec_list);
594
		obj = vma->obj;
538
		entry = obj->exec_entry;
595
		entry = vma->exec_entry;
539
 
596
 
540
		need_fence =
597
		need_fence =
541
			has_fenced_gpu_access &&
598
			has_fenced_gpu_access &&
542
			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
599
			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
543
			obj->tiling_mode != I915_TILING_NONE;
600
			obj->tiling_mode != I915_TILING_NONE;
544
		need_mappable = need_fence || need_reloc_mappable(obj);
601
		need_mappable = need_fence || need_reloc_mappable(vma);
545
 
602
 
546
		if (need_mappable)
603
		if (need_mappable)
547
			list_move(&obj->exec_list, &ordered_objects);
604
			list_move(&vma->exec_list, &ordered_vmas);
548
		else
605
		else
549
			list_move_tail(&obj->exec_list, &ordered_objects);
606
			list_move_tail(&vma->exec_list, &ordered_vmas);
550
 
607
 
551
		obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
608
		obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
552
		obj->base.pending_write_domain = 0;
609
		obj->base.pending_write_domain = 0;
553
		obj->pending_fenced_gpu_access = false;
610
		obj->pending_fenced_gpu_access = false;
554
	}
611
	}
555
	list_splice(&ordered_objects, objects);
612
	list_splice(&ordered_vmas, vmas);
556
 
613
 
557
	/* Attempt to pin all of the buffers into the GTT.
614
	/* Attempt to pin all of the buffers into the GTT.
558
	 * This is done in 3 phases:
615
	 * This is done in 3 phases:
559
	 *
616
	 *
560
	 * 1a. Unbind all objects that do not match the GTT constraints for
617
	 * 1a. Unbind all objects that do not match the GTT constraints for
561
	 *     the execbuffer (fenceable, mappable, alignment etc).
618
	 *     the execbuffer (fenceable, mappable, alignment etc).
562
	 * 1b. Increment pin count for already bound objects.
619
	 * 1b. Increment pin count for already bound objects.
563
	 * 2.  Bind new objects.
620
	 * 2.  Bind new objects.
564
	 * 3.  Decrement pin count.
621
	 * 3.  Decrement pin count.
565
	 *
622
	 *
566
	 * This avoid unnecessary unbinding of later objects in order to make
623
	 * This avoid unnecessary unbinding of later objects in order to make
567
	 * room for the earlier objects *unless* we need to defragment.
624
	 * room for the earlier objects *unless* we need to defragment.
568
	 */
625
	 */
569
	retry = 0;
626
	retry = 0;
570
	do {
627
	do {
571
		int ret = 0;
628
		int ret = 0;
572
 
629
 
573
		/* Unbind any ill-fitting objects or pin. */
630
		/* Unbind any ill-fitting objects or pin. */
574
		list_for_each_entry(obj, objects, exec_list) {
631
		list_for_each_entry(vma, vmas, exec_list) {
575
			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
632
			struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
576
			bool need_fence, need_mappable;
633
			bool need_fence, need_mappable;
577
			u32 obj_offset;
-
 
-
 
634
 
-
 
635
			obj = vma->obj;
578
 
636
 
579
			if (!i915_gem_obj_bound(obj, vm))
637
			if (!drm_mm_node_allocated(&vma->node))
580
				continue;
-
 
581
 
638
				continue;
582
			obj_offset = i915_gem_obj_offset(obj, vm);
639
 
583
			need_fence =
640
			need_fence =
584
				has_fenced_gpu_access &&
641
				has_fenced_gpu_access &&
585
				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
642
				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
586
				obj->tiling_mode != I915_TILING_NONE;
643
				obj->tiling_mode != I915_TILING_NONE;
587
			need_mappable = need_fence || need_reloc_mappable(obj);
644
			need_mappable = need_fence || need_reloc_mappable(vma);
588
 
645
 
589
			WARN_ON((need_mappable || need_fence) &&
646
			WARN_ON((need_mappable || need_fence) &&
590
				!i915_is_ggtt(vm));
647
			       !i915_is_ggtt(vma->vm));
591
 
648
 
592
			if ((entry->alignment &&
649
			if ((entry->alignment &&
593
			     obj_offset & (entry->alignment - 1)) ||
650
			     vma->node.start & (entry->alignment - 1)) ||
594
			    (need_mappable && !obj->map_and_fenceable))
651
			    (need_mappable && !obj->map_and_fenceable))
595
				ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
652
				ret = i915_vma_unbind(vma);
596
			else
653
			else
597
				ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
654
				ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
598
			if (ret)
655
			if (ret)
599
				goto err;
656
				goto err;
600
		}
657
		}
601
 
658
 
602
		/* Bind fresh objects */
659
		/* Bind fresh objects */
603
		list_for_each_entry(obj, objects, exec_list) {
660
		list_for_each_entry(vma, vmas, exec_list) {
604
			if (i915_gem_obj_bound(obj, vm))
661
			if (drm_mm_node_allocated(&vma->node))
605
				continue;
662
				continue;
606
 
663
 
607
			ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
664
			ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
608
			if (ret)
665
			if (ret)
609
				goto err;
666
				goto err;
610
		}
667
		}
611
 
-
 
612
err:		/* Decrement pin count for bound objects */
-
 
613
		list_for_each_entry(obj, objects, exec_list)
-
 
614
			i915_gem_execbuffer_unreserve_object(obj);
668
 
615
 
669
err:
616
		if (ret != -ENOSPC || retry++)
670
		if (ret != -ENOSPC || retry++)
617
			return ret;
671
			return ret;
-
 
672
 
-
 
673
		/* Decrement pin count for bound objects */
-
 
674
		list_for_each_entry(vma, vmas, exec_list)
-
 
675
			i915_gem_execbuffer_unreserve_vma(vma);
618
 
676
 
619
//       ret = i915_gem_evict_everything(ring->dev);
677
//		ret = i915_gem_evict_vm(vm, true);
620
		if (ret)
678
		if (ret)
621
			return ret;
679
			return ret;
622
	} while (1);
680
	} while (1);
623
}
681
}
624
 
682
 
625
static int
683
static int
626
i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
684
i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
627
				  struct drm_i915_gem_execbuffer2 *args,
685
				  struct drm_i915_gem_execbuffer2 *args,
628
				  struct drm_file *file,
686
				  struct drm_file *file,
629
				  struct intel_ring_buffer *ring,
687
				  struct intel_ring_buffer *ring,
630
				  struct eb_objects *eb,
688
				  struct eb_vmas *eb,
631
				  struct drm_i915_gem_exec_object2 *exec,
689
				  struct drm_i915_gem_exec_object2 *exec)
632
				  struct i915_address_space *vm)
-
 
633
{
690
{
634
	struct drm_i915_gem_relocation_entry *reloc;
691
	struct drm_i915_gem_relocation_entry *reloc;
635
	struct drm_i915_gem_object *obj;
692
	struct i915_address_space *vm;
-
 
693
	struct i915_vma *vma;
636
	bool need_relocs;
694
	bool need_relocs;
637
	int *reloc_offset;
695
	int *reloc_offset;
638
	int i, total, ret;
696
	int i, total, ret;
639
	int count = args->buffer_count;
697
	unsigned count = args->buffer_count;
-
 
698
 
-
 
699
	if (WARN_ON(list_empty(&eb->vmas)))
-
 
700
		return 0;
-
 
701
 
-
 
702
	vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
640
 
703
 
641
	/* We may process another execbuffer during the unlock... */
704
	/* We may process another execbuffer during the unlock... */
642
	while (!list_empty(&eb->objects)) {
705
	while (!list_empty(&eb->vmas)) {
643
		obj = list_first_entry(&eb->objects,
-
 
644
				       struct drm_i915_gem_object,
706
		vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
645
				       exec_list);
707
		list_del_init(&vma->exec_list);
646
		list_del_init(&obj->exec_list);
708
		i915_gem_execbuffer_unreserve_vma(vma);
647
		drm_gem_object_unreference(&obj->base);
709
		drm_gem_object_unreference(&vma->obj->base);
648
	}
710
	}
649
 
711
 
650
	mutex_unlock(&dev->struct_mutex);
712
	mutex_unlock(&dev->struct_mutex);
651
 
713
 
652
	total = 0;
714
	total = 0;
653
	for (i = 0; i < count; i++)
715
	for (i = 0; i < count; i++)
654
		total += exec[i].relocation_count;
716
		total += exec[i].relocation_count;
655
 
717
 
656
    reloc_offset = malloc(count * sizeof(*reloc_offset));
718
    reloc_offset = malloc(count * sizeof(*reloc_offset));
657
    reloc = malloc(total * sizeof(*reloc));
719
    reloc = malloc(total * sizeof(*reloc));
658
	if (reloc == NULL || reloc_offset == NULL) {
720
	if (reloc == NULL || reloc_offset == NULL) {
659
        kfree(reloc);
721
        kfree(reloc);
660
        kfree(reloc_offset);
722
        kfree(reloc_offset);
661
		mutex_lock(&dev->struct_mutex);
723
		mutex_lock(&dev->struct_mutex);
662
		return -ENOMEM;
724
		return -ENOMEM;
663
	}
725
	}
664
 
726
 
665
	total = 0;
727
	total = 0;
666
	for (i = 0; i < count; i++) {
728
	for (i = 0; i < count; i++) {
667
		struct drm_i915_gem_relocation_entry __user *user_relocs;
729
		struct drm_i915_gem_relocation_entry __user *user_relocs;
668
		u64 invalid_offset = (u64)-1;
730
		u64 invalid_offset = (u64)-1;
669
		int j;
731
		int j;
670
 
732
 
671
		user_relocs = to_user_ptr(exec[i].relocs_ptr);
733
		user_relocs = to_user_ptr(exec[i].relocs_ptr);
672
 
734
 
673
		if (copy_from_user(reloc+total, user_relocs,
735
		if (copy_from_user(reloc+total, user_relocs,
674
				   exec[i].relocation_count * sizeof(*reloc))) {
736
				   exec[i].relocation_count * sizeof(*reloc))) {
675
			ret = -EFAULT;
737
			ret = -EFAULT;
676
			mutex_lock(&dev->struct_mutex);
738
			mutex_lock(&dev->struct_mutex);
677
			goto err;
739
			goto err;
678
		}
740
		}
679
 
741
 
680
		/* As we do not update the known relocation offsets after
742
		/* As we do not update the known relocation offsets after
681
		 * relocating (due to the complexities in lock handling),
743
		 * relocating (due to the complexities in lock handling),
682
		 * we need to mark them as invalid now so that we force the
744
		 * we need to mark them as invalid now so that we force the
683
		 * relocation processing next time. Just in case the target
745
		 * relocation processing next time. Just in case the target
684
		 * object is evicted and then rebound into its old
746
		 * object is evicted and then rebound into its old
685
		 * presumed_offset before the next execbuffer - if that
747
		 * presumed_offset before the next execbuffer - if that
686
		 * happened we would make the mistake of assuming that the
748
		 * happened we would make the mistake of assuming that the
687
		 * relocations were valid.
749
		 * relocations were valid.
688
		 */
750
		 */
689
		for (j = 0; j < exec[i].relocation_count; j++) {
751
		for (j = 0; j < exec[i].relocation_count; j++) {
690
			if (copy_to_user(&user_relocs[j].presumed_offset,
752
			if (copy_to_user(&user_relocs[j].presumed_offset,
691
					 &invalid_offset,
753
					 &invalid_offset,
692
					 sizeof(invalid_offset))) {
754
					 sizeof(invalid_offset))) {
693
				ret = -EFAULT;
755
				ret = -EFAULT;
694
				mutex_lock(&dev->struct_mutex);
756
				mutex_lock(&dev->struct_mutex);
695
				goto err;
757
				goto err;
696
			}
758
			}
697
		}
759
		}
698
 
760
 
699
		reloc_offset[i] = total;
761
		reloc_offset[i] = total;
700
		total += exec[i].relocation_count;
762
		total += exec[i].relocation_count;
701
	}
763
	}
702
 
764
 
703
	ret = i915_mutex_lock_interruptible(dev);
765
	ret = i915_mutex_lock_interruptible(dev);
704
	if (ret) {
766
	if (ret) {
705
		mutex_lock(&dev->struct_mutex);
767
		mutex_lock(&dev->struct_mutex);
706
		goto err;
768
		goto err;
707
	}
769
	}
708
 
770
 
709
	/* reacquire the objects */
771
	/* reacquire the objects */
710
	eb_reset(eb);
772
	eb_reset(eb);
711
	ret = eb_lookup_objects(eb, exec, args, file);
773
	ret = eb_lookup_vmas(eb, exec, args, vm, file);
712
	if (ret)
774
	if (ret)
713
			goto err;
775
			goto err;
714
 
776
 
715
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
777
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
716
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
778
	ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
717
	if (ret)
779
	if (ret)
718
		goto err;
780
		goto err;
719
 
781
 
720
	list_for_each_entry(obj, &eb->objects, exec_list) {
782
	list_for_each_entry(vma, &eb->vmas, exec_list) {
721
		int offset = obj->exec_entry - exec;
783
		int offset = vma->exec_entry - exec;
722
		ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
784
		ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
723
							       reloc + reloc_offset[offset],
-
 
724
							       vm);
785
							    reloc + reloc_offset[offset]);
725
		if (ret)
786
		if (ret)
726
			goto err;
787
			goto err;
727
	}
788
	}
728
 
789
 
729
	/* Leave the user relocations as are, this is the painfully slow path,
790
	/* Leave the user relocations as are, this is the painfully slow path,
730
	 * and we want to avoid the complication of dropping the lock whilst
791
	 * and we want to avoid the complication of dropping the lock whilst
731
	 * having buffers reserved in the aperture and so causing spurious
792
	 * having buffers reserved in the aperture and so causing spurious
732
	 * ENOSPC for random operations.
793
	 * ENOSPC for random operations.
733
	 */
794
	 */
734
 
795
 
735
err:
796
err:
736
    kfree(reloc);
797
    kfree(reloc);
737
    kfree(reloc_offset);
798
    kfree(reloc_offset);
738
	return ret;
799
	return ret;
739
}
800
}
740
 
801
 
741
static int
802
static int
742
i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
803
i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
743
				struct list_head *objects)
804
				struct list_head *vmas)
744
{
805
{
745
	struct drm_i915_gem_object *obj;
806
	struct i915_vma *vma;
746
	uint32_t flush_domains = 0;
807
	uint32_t flush_domains = 0;
747
	bool flush_chipset = false;
808
	bool flush_chipset = false;
748
	int ret;
809
	int ret;
749
 
810
 
-
 
811
	list_for_each_entry(vma, vmas, exec_list) {
750
	list_for_each_entry(obj, objects, exec_list) {
812
		struct drm_i915_gem_object *obj = vma->obj;
751
		ret = i915_gem_object_sync(obj, ring);
813
		ret = i915_gem_object_sync(obj, ring);
752
		if (ret)
814
		if (ret)
753
			return ret;
815
			return ret;
754
 
816
 
755
		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
817
		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
756
			flush_chipset |= i915_gem_clflush_object(obj, false);
818
			flush_chipset |= i915_gem_clflush_object(obj, false);
757
 
819
 
758
		flush_domains |= obj->base.write_domain;
820
		flush_domains |= obj->base.write_domain;
759
	}
821
	}
760
 
822
 
761
	if (flush_chipset)
823
	if (flush_chipset)
762
		i915_gem_chipset_flush(ring->dev);
824
		i915_gem_chipset_flush(ring->dev);
763
 
825
 
764
	if (flush_domains & I915_GEM_DOMAIN_GTT)
826
	if (flush_domains & I915_GEM_DOMAIN_GTT)
765
		wmb();
827
		wmb();
766
 
828
 
767
	/* Unconditionally invalidate gpu caches and ensure that we do flush
829
	/* Unconditionally invalidate gpu caches and ensure that we do flush
768
	 * any residual writes from the previous batch.
830
	 * any residual writes from the previous batch.
769
	 */
831
	 */
770
	return intel_ring_invalidate_all_caches(ring);
832
	return intel_ring_invalidate_all_caches(ring);
771
}
833
}
772
 
834
 
773
static bool
835
static bool
774
i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
836
i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
775
{
837
{
776
	if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
838
	if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
777
		return false;
839
		return false;
778
 
840
 
779
	return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
841
	return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
780
}
842
}
781
 
843
 
782
static int
844
static int
783
validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
845
validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
784
		   int count)
846
		   int count)
785
{
847
{
786
	int i;
848
	int i;
787
	int relocs_total = 0;
849
	unsigned relocs_total = 0;
788
	int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
850
	unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
789
 
851
 
790
	for (i = 0; i < count; i++) {
852
	for (i = 0; i < count; i++) {
791
		char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
853
		char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
792
		int length; /* limited by fault_in_pages_readable() */
854
		int length; /* limited by fault_in_pages_readable() */
793
 
855
 
794
		if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
856
		if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
795
			return -EINVAL;
857
			return -EINVAL;
796
 
858
 
797
		/* First check for malicious input causing overflow in
859
		/* First check for malicious input causing overflow in
798
		 * the worst case where we need to allocate the entire
860
		 * the worst case where we need to allocate the entire
799
		 * relocation tree as a single array.
861
		 * relocation tree as a single array.
800
		 */
862
		 */
801
		if (exec[i].relocation_count > relocs_max - relocs_total)
863
		if (exec[i].relocation_count > relocs_max - relocs_total)
802
			return -EINVAL;
864
			return -EINVAL;
803
		relocs_total += exec[i].relocation_count;
865
		relocs_total += exec[i].relocation_count;
804
 
866
 
805
		length = exec[i].relocation_count *
867
		length = exec[i].relocation_count *
806
			sizeof(struct drm_i915_gem_relocation_entry);
868
			sizeof(struct drm_i915_gem_relocation_entry);
807
		/*
869
		/*
808
		 * We must check that the entire relocation array is safe
870
		 * We must check that the entire relocation array is safe
809
		 * to read, but since we may need to update the presumed
871
		 * to read, but since we may need to update the presumed
810
		 * offsets during execution, check for full write access.
872
		 * offsets during execution, check for full write access.
811
		 */
873
		 */
-
 
874
	}
-
 
875
 
-
 
876
	return 0;
-
 
877
}
-
 
878
 
-
 
879
static int
-
 
880
i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
-
 
881
			  const u32 ctx_id)
-
 
882
{
-
 
883
	struct i915_ctx_hang_stats *hs;
-
 
884
 
-
 
885
	hs = i915_gem_context_get_hang_stats(dev, file, ctx_id);
-
 
886
	if (IS_ERR(hs))
-
 
887
		return PTR_ERR(hs);
-
 
888
 
-
 
889
	if (hs->banned) {
-
 
890
		DRM_DEBUG("Context %u tried to submit while banned\n", ctx_id);
812
 
891
		return -EIO;
813
	}
892
	}
814
 
893
 
815
	return 0;
894
	return 0;
816
}
895
}
817
 
896
 
818
static void
897
static void
819
i915_gem_execbuffer_move_to_active(struct list_head *objects,
898
i915_gem_execbuffer_move_to_active(struct list_head *vmas,
820
				   struct i915_address_space *vm,
-
 
821
				   struct intel_ring_buffer *ring)
899
				   struct intel_ring_buffer *ring)
822
{
900
{
823
	struct drm_i915_gem_object *obj;
901
	struct i915_vma *vma;
824
 
902
 
-
 
903
	list_for_each_entry(vma, vmas, exec_list) {
825
	list_for_each_entry(obj, objects, exec_list) {
904
		struct drm_i915_gem_object *obj = vma->obj;
826
		u32 old_read = obj->base.read_domains;
905
		u32 old_read = obj->base.read_domains;
827
		u32 old_write = obj->base.write_domain;
906
		u32 old_write = obj->base.write_domain;
828
 
907
 
829
		obj->base.write_domain = obj->base.pending_write_domain;
908
		obj->base.write_domain = obj->base.pending_write_domain;
830
		if (obj->base.write_domain == 0)
909
		if (obj->base.write_domain == 0)
831
			obj->base.pending_read_domains |= obj->base.read_domains;
910
			obj->base.pending_read_domains |= obj->base.read_domains;
832
		obj->base.read_domains = obj->base.pending_read_domains;
911
		obj->base.read_domains = obj->base.pending_read_domains;
833
		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
912
		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
834
 
-
 
835
		/* FIXME: This lookup gets fixed later <-- danvet */
-
 
836
		list_move_tail(&i915_gem_obj_to_vma(obj, vm)->mm_list, &vm->active_list);
913
 
837
		i915_gem_object_move_to_active(obj, ring);
914
		i915_vma_move_to_active(vma, ring);
838
		if (obj->base.write_domain) {
915
		if (obj->base.write_domain) {
839
			obj->dirty = 1;
916
			obj->dirty = 1;
840
			obj->last_write_seqno = intel_ring_get_seqno(ring);
917
			obj->last_write_seqno = intel_ring_get_seqno(ring);
841
			if (obj->pin_count) /* check for potential scanout */
918
			if (obj->pin_count) /* check for potential scanout */
842
				intel_mark_fb_busy(obj, ring);
919
				intel_mark_fb_busy(obj, ring);
843
		}
920
		}
844
 
921
 
845
		trace_i915_gem_object_change_domain(obj, old_read, old_write);
922
		trace_i915_gem_object_change_domain(obj, old_read, old_write);
846
	}
923
	}
847
}
924
}
848
 
925
 
849
static void
926
static void
850
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
927
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
851
				    struct drm_file *file,
928
				    struct drm_file *file,
852
				    struct intel_ring_buffer *ring,
929
				    struct intel_ring_buffer *ring,
853
				    struct drm_i915_gem_object *obj)
930
				    struct drm_i915_gem_object *obj)
854
{
931
{
855
	/* Unconditionally force add_request to emit a full flush. */
932
	/* Unconditionally force add_request to emit a full flush. */
856
	ring->gpu_caches_dirty = true;
933
	ring->gpu_caches_dirty = true;
857
 
934
 
858
	/* Add a breadcrumb for the completion of the batch buffer */
935
	/* Add a breadcrumb for the completion of the batch buffer */
859
	(void)__i915_add_request(ring, file, obj, NULL);
936
	(void)__i915_add_request(ring, file, obj, NULL);
860
}
937
}
861
 
938
 
862
static int
939
static int
863
i915_reset_gen7_sol_offsets(struct drm_device *dev,
940
i915_reset_gen7_sol_offsets(struct drm_device *dev,
864
			    struct intel_ring_buffer *ring)
941
			    struct intel_ring_buffer *ring)
865
{
942
{
866
	drm_i915_private_t *dev_priv = dev->dev_private;
943
	drm_i915_private_t *dev_priv = dev->dev_private;
867
	int ret, i;
944
	int ret, i;
868
 
945
 
869
	if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
946
	if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
870
		return 0;
947
		return 0;
871
 
948
 
872
	ret = intel_ring_begin(ring, 4 * 3);
949
	ret = intel_ring_begin(ring, 4 * 3);
873
	if (ret)
950
	if (ret)
874
		return ret;
951
		return ret;
875
 
952
 
876
	for (i = 0; i < 4; i++) {
953
	for (i = 0; i < 4; i++) {
877
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
954
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
878
		intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
955
		intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
879
		intel_ring_emit(ring, 0);
956
		intel_ring_emit(ring, 0);
880
	}
957
	}
881
 
958
 
882
	intel_ring_advance(ring);
959
	intel_ring_advance(ring);
883
 
960
 
884
	return 0;
961
	return 0;
885
}
962
}
886
 
963
 
887
static int
964
static int
888
i915_gem_do_execbuffer(struct drm_device *dev, void *data,
965
i915_gem_do_execbuffer(struct drm_device *dev, void *data,
889
		       struct drm_file *file,
966
		       struct drm_file *file,
890
		       struct drm_i915_gem_execbuffer2 *args,
967
		       struct drm_i915_gem_execbuffer2 *args,
891
		       struct drm_i915_gem_exec_object2 *exec,
968
		       struct drm_i915_gem_exec_object2 *exec,
892
		       struct i915_address_space *vm)
969
		       struct i915_address_space *vm)
893
{
970
{
894
	drm_i915_private_t *dev_priv = dev->dev_private;
971
	drm_i915_private_t *dev_priv = dev->dev_private;
895
	struct eb_objects *eb;
972
	struct eb_vmas *eb;
896
	struct drm_i915_gem_object *batch_obj;
973
	struct drm_i915_gem_object *batch_obj;
897
	struct drm_clip_rect *cliprects = NULL;
974
	struct drm_clip_rect *cliprects = NULL;
898
	struct intel_ring_buffer *ring;
975
	struct intel_ring_buffer *ring;
899
	u32 ctx_id = i915_execbuffer2_get_context_id(*args);
976
	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
900
	u32 exec_start, exec_len;
977
	u32 exec_start, exec_len;
901
	u32 mask, flags;
978
	u32 mask, flags;
902
	int ret, mode, i;
979
	int ret, mode, i;
903
	bool need_relocs;
980
	bool need_relocs;
904
 
981
 
905
	if (!i915_gem_check_execbuffer(args))
982
	if (!i915_gem_check_execbuffer(args))
906
		return -EINVAL;
983
		return -EINVAL;
907
 
984
 
908
	ret = validate_exec_list(exec, args->buffer_count);
985
	ret = validate_exec_list(exec, args->buffer_count);
909
	if (ret)
986
	if (ret)
910
		return ret;
987
		return ret;
911
 
988
 
912
	flags = 0;
989
	flags = 0;
913
	if (args->flags & I915_EXEC_SECURE) {
990
	if (args->flags & I915_EXEC_SECURE) {
914
 
991
 
915
		flags |= I915_DISPATCH_SECURE;
992
		flags |= I915_DISPATCH_SECURE;
916
	}
993
	}
917
	if (args->flags & I915_EXEC_IS_PINNED)
994
	if (args->flags & I915_EXEC_IS_PINNED)
918
		flags |= I915_DISPATCH_PINNED;
995
		flags |= I915_DISPATCH_PINNED;
919
 
996
 
920
	switch (args->flags & I915_EXEC_RING_MASK) {
997
	switch (args->flags & I915_EXEC_RING_MASK) {
921
	case I915_EXEC_DEFAULT:
998
	case I915_EXEC_DEFAULT:
922
	case I915_EXEC_RENDER:
999
	case I915_EXEC_RENDER:
923
		ring = &dev_priv->ring[RCS];
1000
		ring = &dev_priv->ring[RCS];
924
		break;
1001
		break;
925
	case I915_EXEC_BSD:
1002
	case I915_EXEC_BSD:
926
		ring = &dev_priv->ring[VCS];
1003
		ring = &dev_priv->ring[VCS];
927
		if (ctx_id != DEFAULT_CONTEXT_ID) {
1004
		if (ctx_id != DEFAULT_CONTEXT_ID) {
928
			DRM_DEBUG("Ring %s doesn't support contexts\n",
1005
			DRM_DEBUG("Ring %s doesn't support contexts\n",
929
				  ring->name);
1006
				  ring->name);
930
			return -EPERM;
1007
			return -EPERM;
931
		}
1008
		}
932
		break;
1009
		break;
933
	case I915_EXEC_BLT:
1010
	case I915_EXEC_BLT:
934
		ring = &dev_priv->ring[BCS];
1011
		ring = &dev_priv->ring[BCS];
935
		if (ctx_id != DEFAULT_CONTEXT_ID) {
1012
		if (ctx_id != DEFAULT_CONTEXT_ID) {
936
			DRM_DEBUG("Ring %s doesn't support contexts\n",
1013
			DRM_DEBUG("Ring %s doesn't support contexts\n",
937
				  ring->name);
1014
				  ring->name);
938
			return -EPERM;
1015
			return -EPERM;
939
		}
1016
		}
940
		break;
1017
		break;
941
	case I915_EXEC_VEBOX:
1018
	case I915_EXEC_VEBOX:
942
		ring = &dev_priv->ring[VECS];
1019
		ring = &dev_priv->ring[VECS];
943
		if (ctx_id != DEFAULT_CONTEXT_ID) {
1020
		if (ctx_id != DEFAULT_CONTEXT_ID) {
944
			DRM_DEBUG("Ring %s doesn't support contexts\n",
1021
			DRM_DEBUG("Ring %s doesn't support contexts\n",
945
				  ring->name);
1022
				  ring->name);
946
			return -EPERM;
1023
			return -EPERM;
947
		}
1024
		}
948
		break;
1025
		break;
949
 
1026
 
950
	default:
1027
	default:
951
		DRM_DEBUG("execbuf with unknown ring: %d\n",
1028
		DRM_DEBUG("execbuf with unknown ring: %d\n",
952
			  (int)(args->flags & I915_EXEC_RING_MASK));
1029
			  (int)(args->flags & I915_EXEC_RING_MASK));
953
		return -EINVAL;
1030
		return -EINVAL;
954
	}
1031
	}
955
	if (!intel_ring_initialized(ring)) {
1032
	if (!intel_ring_initialized(ring)) {
956
		DRM_DEBUG("execbuf with invalid ring: %d\n",
1033
		DRM_DEBUG("execbuf with invalid ring: %d\n",
957
			  (int)(args->flags & I915_EXEC_RING_MASK));
1034
			  (int)(args->flags & I915_EXEC_RING_MASK));
958
		return -EINVAL;
1035
		return -EINVAL;
959
	}
1036
	}
960
 
1037
 
961
	mode = args->flags & I915_EXEC_CONSTANTS_MASK;
1038
	mode = args->flags & I915_EXEC_CONSTANTS_MASK;
962
	mask = I915_EXEC_CONSTANTS_MASK;
1039
	mask = I915_EXEC_CONSTANTS_MASK;
963
	switch (mode) {
1040
	switch (mode) {
964
	case I915_EXEC_CONSTANTS_REL_GENERAL:
1041
	case I915_EXEC_CONSTANTS_REL_GENERAL:
965
	case I915_EXEC_CONSTANTS_ABSOLUTE:
1042
	case I915_EXEC_CONSTANTS_ABSOLUTE:
966
	case I915_EXEC_CONSTANTS_REL_SURFACE:
1043
	case I915_EXEC_CONSTANTS_REL_SURFACE:
967
		if (ring == &dev_priv->ring[RCS] &&
1044
		if (ring == &dev_priv->ring[RCS] &&
968
		    mode != dev_priv->relative_constants_mode) {
1045
		    mode != dev_priv->relative_constants_mode) {
969
			if (INTEL_INFO(dev)->gen < 4)
1046
			if (INTEL_INFO(dev)->gen < 4)
970
				return -EINVAL;
1047
				return -EINVAL;
971
 
1048
 
972
			if (INTEL_INFO(dev)->gen > 5 &&
1049
			if (INTEL_INFO(dev)->gen > 5 &&
973
			    mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1050
			    mode == I915_EXEC_CONSTANTS_REL_SURFACE)
974
				return -EINVAL;
1051
				return -EINVAL;
975
 
1052
 
976
			/* The HW changed the meaning on this bit on gen6 */
1053
			/* The HW changed the meaning on this bit on gen6 */
977
			if (INTEL_INFO(dev)->gen >= 6)
1054
			if (INTEL_INFO(dev)->gen >= 6)
978
				mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
1055
				mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
979
		}
1056
		}
980
		break;
1057
		break;
981
	default:
1058
	default:
982
		DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
1059
		DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
983
		return -EINVAL;
1060
		return -EINVAL;
984
	}
1061
	}
985
 
1062
 
986
	if (args->buffer_count < 1) {
1063
	if (args->buffer_count < 1) {
987
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1064
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
988
		return -EINVAL;
1065
		return -EINVAL;
989
	}
1066
	}
990
 
1067
 
991
	if (args->num_cliprects != 0) {
1068
	if (args->num_cliprects != 0) {
992
		if (ring != &dev_priv->ring[RCS]) {
1069
		if (ring != &dev_priv->ring[RCS]) {
993
			DRM_DEBUG("clip rectangles are only valid with the render ring\n");
1070
			DRM_DEBUG("clip rectangles are only valid with the render ring\n");
994
			return -EINVAL;
1071
			return -EINVAL;
995
		}
1072
		}
996
 
1073
 
997
		if (INTEL_INFO(dev)->gen >= 5) {
1074
		if (INTEL_INFO(dev)->gen >= 5) {
998
			DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1075
			DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
999
			return -EINVAL;
1076
			return -EINVAL;
1000
		}
1077
		}
1001
 
1078
 
1002
		if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1079
		if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1003
			DRM_DEBUG("execbuf with %u cliprects\n",
1080
			DRM_DEBUG("execbuf with %u cliprects\n",
1004
				  args->num_cliprects);
1081
				  args->num_cliprects);
1005
			return -EINVAL;
1082
			return -EINVAL;
1006
		}
1083
		}
1007
 
1084
 
-
 
1085
		cliprects = kcalloc(args->num_cliprects,
1008
		cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
1086
				    sizeof(*cliprects),
1009
				    GFP_KERNEL);
1087
				    GFP_KERNEL);
1010
		if (cliprects == NULL) {
1088
		if (cliprects == NULL) {
1011
			ret = -ENOMEM;
1089
			ret = -ENOMEM;
1012
			goto pre_mutex_err;
1090
			goto pre_mutex_err;
1013
		}
1091
		}
1014
 
1092
 
1015
		if (copy_from_user(cliprects,
1093
		if (copy_from_user(cliprects,
1016
				   to_user_ptr(args->cliprects_ptr),
1094
				   to_user_ptr(args->cliprects_ptr),
1017
				     sizeof(*cliprects)*args->num_cliprects)) {
1095
				     sizeof(*cliprects)*args->num_cliprects)) {
1018
			ret = -EFAULT;
1096
			ret = -EFAULT;
1019
			goto pre_mutex_err;
1097
			goto pre_mutex_err;
1020
		}
1098
		}
1021
	}
1099
	}
-
 
1100
 
-
 
1101
	intel_runtime_pm_get(dev_priv);
1022
 
1102
 
1023
	ret = i915_mutex_lock_interruptible(dev);
1103
	ret = i915_mutex_lock_interruptible(dev);
1024
	if (ret)
1104
	if (ret)
1025
		goto pre_mutex_err;
1105
		goto pre_mutex_err;
1026
 
1106
 
1027
	if (dev_priv->ums.mm_suspended) {
1107
	if (dev_priv->ums.mm_suspended) {
1028
		mutex_unlock(&dev->struct_mutex);
1108
		mutex_unlock(&dev->struct_mutex);
1029
		ret = -EBUSY;
1109
		ret = -EBUSY;
1030
		goto pre_mutex_err;
1110
		goto pre_mutex_err;
1031
	}
1111
	}
-
 
1112
 
-
 
1113
	ret = i915_gem_validate_context(dev, file, ctx_id);
-
 
1114
	if (ret) {
-
 
1115
		mutex_unlock(&dev->struct_mutex);
-
 
1116
		goto pre_mutex_err;
-
 
1117
	}
1032
 
1118
 
1033
	eb = eb_create(args);
1119
	eb = eb_create(args);
1034
	if (eb == NULL) {
1120
	if (eb == NULL) {
1035
		mutex_unlock(&dev->struct_mutex);
1121
		mutex_unlock(&dev->struct_mutex);
1036
		ret = -ENOMEM;
1122
		ret = -ENOMEM;
1037
		goto pre_mutex_err;
1123
		goto pre_mutex_err;
1038
	}
1124
	}
1039
 
1125
 
1040
	/* Look up object handles */
1126
	/* Look up object handles */
1041
	ret = eb_lookup_objects(eb, exec, args, file);
1127
	ret = eb_lookup_vmas(eb, exec, args, vm, file);
1042
	if (ret)
1128
	if (ret)
1043
			goto err;
1129
			goto err;
1044
 
1130
 
1045
	/* take note of the batch buffer before we might reorder the lists */
1131
	/* take note of the batch buffer before we might reorder the lists */
1046
	batch_obj = list_entry(eb->objects.prev,
1132
	batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
1047
			       struct drm_i915_gem_object,
-
 
1048
			       exec_list);
-
 
1049
 
1133
 
1050
	/* Move the objects en-masse into the GTT, evicting if necessary. */
1134
	/* Move the objects en-masse into the GTT, evicting if necessary. */
1051
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1135
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1052
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
1136
	ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
1053
	if (ret)
1137
	if (ret)
1054
		goto err;
1138
		goto err;
1055
 
1139
 
1056
	/* The objects are in their final locations, apply the relocations. */
1140
	/* The objects are in their final locations, apply the relocations. */
1057
	if (need_relocs)
1141
	if (need_relocs)
1058
		ret = i915_gem_execbuffer_relocate(eb, vm);
1142
		ret = i915_gem_execbuffer_relocate(eb);
1059
	if (ret) {
1143
	if (ret) {
1060
		if (ret == -EFAULT) {
1144
		if (ret == -EFAULT) {
1061
			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1145
			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1062
								eb, exec, vm);
1146
								eb, exec);
1063
			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1147
			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1064
		}
1148
		}
1065
		if (ret)
1149
		if (ret)
1066
			goto err;
1150
			goto err;
1067
	}
1151
	}
1068
 
1152
 
1069
	/* Set the pending read domains for the batch buffer to COMMAND */
1153
	/* Set the pending read domains for the batch buffer to COMMAND */
1070
	if (batch_obj->base.pending_write_domain) {
1154
	if (batch_obj->base.pending_write_domain) {
1071
		DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1155
		DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1072
		ret = -EINVAL;
1156
		ret = -EINVAL;
1073
		goto err;
1157
		goto err;
1074
	}
1158
	}
1075
	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1159
	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1076
 
1160
 
1077
	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1161
	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1078
	 * batch" bit. Hence we need to pin secure batches into the global gtt.
1162
	 * batch" bit. Hence we need to pin secure batches into the global gtt.
1079
	 * hsw should have this fixed, but let's be paranoid and do it
1163
	 * hsw should have this fixed, but bdw mucks it up again. */
1080
	 * unconditionally for now. */
-
 
1081
	if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1164
	if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1082
		i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1165
		i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1083
 
1166
 
1084
	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->objects);
1167
	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
1085
	if (ret)
1168
	if (ret)
1086
		goto err;
1169
		goto err;
1087
 
1170
 
1088
	ret = i915_switch_context(ring, file, ctx_id);
1171
	ret = i915_switch_context(ring, file, ctx_id);
1089
	if (ret)
1172
	if (ret)
1090
		goto err;
1173
		goto err;
1091
 
1174
 
1092
	if (ring == &dev_priv->ring[RCS] &&
1175
	if (ring == &dev_priv->ring[RCS] &&
1093
	    mode != dev_priv->relative_constants_mode) {
1176
	    mode != dev_priv->relative_constants_mode) {
1094
		ret = intel_ring_begin(ring, 4);
1177
		ret = intel_ring_begin(ring, 4);
1095
		if (ret)
1178
		if (ret)
1096
				goto err;
1179
				goto err;
1097
 
1180
 
1098
		intel_ring_emit(ring, MI_NOOP);
1181
		intel_ring_emit(ring, MI_NOOP);
1099
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1182
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1100
		intel_ring_emit(ring, INSTPM);
1183
		intel_ring_emit(ring, INSTPM);
1101
		intel_ring_emit(ring, mask << 16 | mode);
1184
		intel_ring_emit(ring, mask << 16 | mode);
1102
		intel_ring_advance(ring);
1185
		intel_ring_advance(ring);
1103
 
1186
 
1104
		dev_priv->relative_constants_mode = mode;
1187
		dev_priv->relative_constants_mode = mode;
1105
	}
1188
	}
1106
 
1189
 
1107
	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1190
	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1108
		ret = i915_reset_gen7_sol_offsets(dev, ring);
1191
		ret = i915_reset_gen7_sol_offsets(dev, ring);
1109
		if (ret)
1192
		if (ret)
1110
			goto err;
1193
			goto err;
1111
	}
1194
	}
1112
 
1195
 
1113
	exec_start = i915_gem_obj_offset(batch_obj, vm) +
1196
	exec_start = i915_gem_obj_offset(batch_obj, vm) +
1114
		args->batch_start_offset;
1197
		args->batch_start_offset;
1115
	exec_len = args->batch_len;
1198
	exec_len = args->batch_len;
1116
	if (cliprects) {
1199
	if (cliprects) {
1117
		for (i = 0; i < args->num_cliprects; i++) {
1200
		for (i = 0; i < args->num_cliprects; i++) {
1118
			ret = i915_emit_box(dev, &cliprects[i],
1201
			ret = i915_emit_box(dev, &cliprects[i],
1119
					    args->DR1, args->DR4);
1202
					    args->DR1, args->DR4);
1120
			if (ret)
1203
			if (ret)
1121
				goto err;
1204
				goto err;
1122
 
1205
 
1123
			ret = ring->dispatch_execbuffer(ring,
1206
			ret = ring->dispatch_execbuffer(ring,
1124
							exec_start, exec_len,
1207
							exec_start, exec_len,
1125
							flags);
1208
							flags);
1126
			if (ret)
1209
			if (ret)
1127
				goto err;
1210
				goto err;
1128
		}
1211
		}
1129
	} else {
1212
	} else {
1130
		ret = ring->dispatch_execbuffer(ring,
1213
		ret = ring->dispatch_execbuffer(ring,
1131
						exec_start, exec_len,
1214
						exec_start, exec_len,
1132
						flags);
1215
						flags);
1133
		if (ret)
1216
		if (ret)
1134
			goto err;
1217
			goto err;
1135
	}
1218
	}
1136
 
1219
 
1137
	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1220
	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1138
 
1221
 
1139
	i915_gem_execbuffer_move_to_active(&eb->objects, vm, ring);
1222
	i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
1140
	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1223
	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1141
 
1224
 
1142
err:
1225
err:
1143
	eb_destroy(eb);
1226
	eb_destroy(eb);
1144
 
1227
 
1145
	mutex_unlock(&dev->struct_mutex);
1228
	mutex_unlock(&dev->struct_mutex);
1146
 
1229
 
1147
pre_mutex_err:
1230
pre_mutex_err:
1148
    kfree(cliprects);
1231
    kfree(cliprects);
-
 
1232
 
-
 
1233
	/* intel_gpu_busy should also get a ref, so it will free when the device
-
 
1234
	 * is really idle. */
-
 
1235
	intel_runtime_pm_put(dev_priv);
1149
	return ret;
1236
	return ret;
1150
}
1237
}
1151
 
1238
 
1152
#if 0
1239
#if 0
1153
/*
1240
/*
1154
 * Legacy execbuffer just creates an exec2 list from the original exec object
1241
 * Legacy execbuffer just creates an exec2 list from the original exec object
1155
 * list array and passes it to the real function.
1242
 * list array and passes it to the real function.
1156
 */
1243
 */
1157
int
1244
int
1158
i915_gem_execbuffer(struct drm_device *dev, void *data,
1245
i915_gem_execbuffer(struct drm_device *dev, void *data,
1159
		    struct drm_file *file)
1246
		    struct drm_file *file)
1160
{
1247
{
1161
	struct drm_i915_private *dev_priv = dev->dev_private;
1248
	struct drm_i915_private *dev_priv = dev->dev_private;
1162
	struct drm_i915_gem_execbuffer *args = data;
1249
	struct drm_i915_gem_execbuffer *args = data;
1163
	struct drm_i915_gem_execbuffer2 exec2;
1250
	struct drm_i915_gem_execbuffer2 exec2;
1164
	struct drm_i915_gem_exec_object *exec_list = NULL;
1251
	struct drm_i915_gem_exec_object *exec_list = NULL;
1165
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1252
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1166
	int ret, i;
1253
	int ret, i;
1167
 
1254
 
1168
	if (args->buffer_count < 1) {
1255
	if (args->buffer_count < 1) {
1169
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1256
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1170
		return -EINVAL;
1257
		return -EINVAL;
1171
	}
1258
	}
1172
 
1259
 
1173
	/* Copy in the exec list from userland */
1260
	/* Copy in the exec list from userland */
1174
	exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1261
	exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1175
	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1262
	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1176
	if (exec_list == NULL || exec2_list == NULL) {
1263
	if (exec_list == NULL || exec2_list == NULL) {
1177
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1264
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1178
			  args->buffer_count);
1265
			  args->buffer_count);
1179
		drm_free_large(exec_list);
1266
		drm_free_large(exec_list);
1180
		drm_free_large(exec2_list);
1267
		drm_free_large(exec2_list);
1181
		return -ENOMEM;
1268
		return -ENOMEM;
1182
	}
1269
	}
1183
	ret = copy_from_user(exec_list,
1270
	ret = copy_from_user(exec_list,
1184
			     to_user_ptr(args->buffers_ptr),
1271
			     to_user_ptr(args->buffers_ptr),
1185
			     sizeof(*exec_list) * args->buffer_count);
1272
			     sizeof(*exec_list) * args->buffer_count);
1186
	if (ret != 0) {
1273
	if (ret != 0) {
1187
		DRM_DEBUG("copy %d exec entries failed %d\n",
1274
		DRM_DEBUG("copy %d exec entries failed %d\n",
1188
			  args->buffer_count, ret);
1275
			  args->buffer_count, ret);
1189
		drm_free_large(exec_list);
1276
		drm_free_large(exec_list);
1190
		drm_free_large(exec2_list);
1277
		drm_free_large(exec2_list);
1191
		return -EFAULT;
1278
		return -EFAULT;
1192
	}
1279
	}
1193
 
1280
 
1194
	for (i = 0; i < args->buffer_count; i++) {
1281
	for (i = 0; i < args->buffer_count; i++) {
1195
		exec2_list[i].handle = exec_list[i].handle;
1282
		exec2_list[i].handle = exec_list[i].handle;
1196
		exec2_list[i].relocation_count = exec_list[i].relocation_count;
1283
		exec2_list[i].relocation_count = exec_list[i].relocation_count;
1197
		exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1284
		exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1198
		exec2_list[i].alignment = exec_list[i].alignment;
1285
		exec2_list[i].alignment = exec_list[i].alignment;
1199
		exec2_list[i].offset = exec_list[i].offset;
1286
		exec2_list[i].offset = exec_list[i].offset;
1200
		if (INTEL_INFO(dev)->gen < 4)
1287
		if (INTEL_INFO(dev)->gen < 4)
1201
			exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1288
			exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1202
		else
1289
		else
1203
			exec2_list[i].flags = 0;
1290
			exec2_list[i].flags = 0;
1204
	}
1291
	}
1205
 
1292
 
1206
	exec2.buffers_ptr = args->buffers_ptr;
1293
	exec2.buffers_ptr = args->buffers_ptr;
1207
	exec2.buffer_count = args->buffer_count;
1294
	exec2.buffer_count = args->buffer_count;
1208
	exec2.batch_start_offset = args->batch_start_offset;
1295
	exec2.batch_start_offset = args->batch_start_offset;
1209
	exec2.batch_len = args->batch_len;
1296
	exec2.batch_len = args->batch_len;
1210
	exec2.DR1 = args->DR1;
1297
	exec2.DR1 = args->DR1;
1211
	exec2.DR4 = args->DR4;
1298
	exec2.DR4 = args->DR4;
1212
	exec2.num_cliprects = args->num_cliprects;
1299
	exec2.num_cliprects = args->num_cliprects;
1213
	exec2.cliprects_ptr = args->cliprects_ptr;
1300
	exec2.cliprects_ptr = args->cliprects_ptr;
1214
	exec2.flags = I915_EXEC_RENDER;
1301
	exec2.flags = I915_EXEC_RENDER;
1215
	i915_execbuffer2_set_context_id(exec2, 0);
1302
	i915_execbuffer2_set_context_id(exec2, 0);
1216
 
1303
 
1217
	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1304
	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1218
				     &dev_priv->gtt.base);
1305
				     &dev_priv->gtt.base);
1219
	if (!ret) {
1306
	if (!ret) {
1220
		/* Copy the new buffer offsets back to the user's exec list. */
1307
		/* Copy the new buffer offsets back to the user's exec list. */
1221
		for (i = 0; i < args->buffer_count; i++)
1308
		for (i = 0; i < args->buffer_count; i++)
1222
			exec_list[i].offset = exec2_list[i].offset;
1309
			exec_list[i].offset = exec2_list[i].offset;
1223
		/* ... and back out to userspace */
1310
		/* ... and back out to userspace */
1224
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1311
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1225
				   exec_list,
1312
				   exec_list,
1226
				   sizeof(*exec_list) * args->buffer_count);
1313
				   sizeof(*exec_list) * args->buffer_count);
1227
		if (ret) {
1314
		if (ret) {
1228
			ret = -EFAULT;
1315
			ret = -EFAULT;
1229
			DRM_DEBUG("failed to copy %d exec entries "
1316
			DRM_DEBUG("failed to copy %d exec entries "
1230
				  "back to user (%d)\n",
1317
				  "back to user (%d)\n",
1231
				  args->buffer_count, ret);
1318
				  args->buffer_count, ret);
1232
		}
1319
		}
1233
	}
1320
	}
1234
 
1321
 
1235
	drm_free_large(exec_list);
1322
	drm_free_large(exec_list);
1236
	drm_free_large(exec2_list);
1323
	drm_free_large(exec2_list);
1237
	return ret;
1324
	return ret;
1238
}
1325
}
1239
#endif
1326
#endif
1240
 
1327
 
1241
int
1328
int
1242
i915_gem_execbuffer2(struct drm_device *dev, void *data,
1329
i915_gem_execbuffer2(struct drm_device *dev, void *data,
1243
		     struct drm_file *file)
1330
		     struct drm_file *file)
1244
{
1331
{
1245
	struct drm_i915_private *dev_priv = dev->dev_private;
1332
	struct drm_i915_private *dev_priv = dev->dev_private;
1246
	struct drm_i915_gem_execbuffer2 *args = data;
1333
	struct drm_i915_gem_execbuffer2 *args = data;
1247
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1334
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1248
	int ret;
1335
	int ret;
1249
 
1336
 
1250
	if (args->buffer_count < 1 ||
1337
	if (args->buffer_count < 1 ||
1251
	    args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1338
	    args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1252
		DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1339
		DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1253
		return -EINVAL;
1340
		return -EINVAL;
1254
	}
1341
	}
1255
 
1342
 
1256
	exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1343
	exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1257
			     GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1344
			     GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1258
	if (exec2_list == NULL) {
1345
	if (exec2_list == NULL) {
1259
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1346
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1260
			  args->buffer_count);
1347
			  args->buffer_count);
1261
		return -ENOMEM;
1348
		return -ENOMEM;
1262
	}
1349
	}
1263
	ret = copy_from_user(exec2_list,
1350
	ret = copy_from_user(exec2_list,
1264
			     to_user_ptr(args->buffers_ptr),
1351
			     to_user_ptr(args->buffers_ptr),
1265
			     sizeof(*exec2_list) * args->buffer_count);
1352
			     sizeof(*exec2_list) * args->buffer_count);
1266
	if (ret != 0) {
1353
	if (ret != 0) {
1267
		DRM_DEBUG("copy %d exec entries failed %d\n",
1354
		DRM_DEBUG("copy %d exec entries failed %d\n",
1268
			  args->buffer_count, ret);
1355
			  args->buffer_count, ret);
1269
        kfree(exec2_list);
1356
        kfree(exec2_list);
1270
        FAIL();
1357
        FAIL();
1271
		return -EFAULT;
1358
		return -EFAULT;
1272
	}
1359
	}
1273
 
1360
 
1274
	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1361
	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1275
				     &dev_priv->gtt.base);
1362
				     &dev_priv->gtt.base);
1276
	if (!ret) {
1363
	if (!ret) {
1277
		/* Copy the new buffer offsets back to the user's exec list. */
1364
		/* Copy the new buffer offsets back to the user's exec list. */
1278
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1365
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1279
				   exec2_list,
1366
				   exec2_list,
1280
				   sizeof(*exec2_list) * args->buffer_count);
1367
				   sizeof(*exec2_list) * args->buffer_count);
1281
		if (ret) {
1368
		if (ret) {
1282
			ret = -EFAULT;
1369
			ret = -EFAULT;
1283
			DRM_DEBUG("failed to copy %d exec entries "
1370
			DRM_DEBUG("failed to copy %d exec entries "
1284
				  "back to user (%d)\n",
1371
				  "back to user (%d)\n",
1285
				  args->buffer_count, ret);
1372
				  args->buffer_count, ret);
1286
		}
1373
		}
1287
	}
1374
	}
1288
 
1375
 
1289
    kfree(exec2_list);
1376
    kfree(exec2_list);
1290
	return ret;
1377
	return ret;
1291
}
1378
}
1292
 
1379
 
1293
static>
1380
static>
1294
 
1381
 
1295
static>
1382
static>
1296
#define>
1383
#define>
1297
#define>
1384
#define>