WebSVN – Kolibri OS – Diff – /drivers/video/drm/i915/i915_gem_execbuffer.c


/*
 * Copyright © 2008,2010 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Eric Anholt 
 *    Chris Wilson 
 *
 */
 
#include 
#include 
#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_drv.h"
//#include 
 
 
static unsigned long
copy_to_user(void __user *to, const void *from, unsigned long n)
{
    memcpy(to, from, n);
    return 0;
}
 
static unsigned long
copy_from_user(void *to, const void __user *from, unsigned long n)
{
    memcpy(to, from, n);
    return 0;
}
 
struct eb_objects {
	struct list_head objects;
	int and;
	union {
		struct drm_i915_gem_object *lut[0];
	struct hlist_head buckets[0];
	};
};
 
static struct eb_objects *
eb_create(struct drm_i915_gem_execbuffer2 *args)
{
	struct eb_objects *eb = NULL;
 
	if (args->flags & I915_EXEC_HANDLE_LUT) {
		int size = args->buffer_count;
		size *= sizeof(struct drm_i915_gem_object *);
		size += sizeof(struct eb_objects);
		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
	}
 
	if (eb == NULL) {
		int size = args->buffer_count;
	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
		BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
		while (count > 2*size)
		count >>= 1;
	eb = kzalloc(count*sizeof(struct hlist_head) +
		     sizeof(struct eb_objects),
			     GFP_TEMPORARY);
	if (eb == NULL)
		return eb;
 
	eb->and = count - 1;
	} else
		eb->and = -args->buffer_count;
 
	INIT_LIST_HEAD(&eb->objects);
	return eb;
}
 
static void
eb_reset(struct eb_objects *eb)
{
	if (eb->and >= 0)
	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
}
 
static int
eb_lookup_objects(struct eb_objects *eb,
		  struct drm_i915_gem_exec_object2 *exec,
		  const struct drm_i915_gem_execbuffer2 *args,
		  struct drm_file *file)
{
	int i;
 
	spin_lock(&file->table_lock);
	for (i = 0; i < args->buffer_count; i++) {
		struct drm_i915_gem_object *obj;
 
		    obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
		if (obj == NULL) {
			spin_unlock(&file->table_lock);
			DRM_DEBUG("Invalid object handle %d at index %d\n",
				   exec[i].handle, i);
			return -ENOENT;
		}
 
		if (!list_empty(&obj->exec_list)) {
			spin_unlock(&file->table_lock);
			DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
				   obj, exec[i].handle, i);
			return -EINVAL;
		}
 
		drm_gem_object_reference(&obj->base);
		list_add_tail(&obj->exec_list, &eb->objects);
 
		obj->exec_entry = &exec[i];
		if (eb->and < 0) {
			eb->lut[i] = obj;
		} else {
			uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
			obj->exec_handle = handle;
	hlist_add_head(&obj->exec_node,
				       &eb->buckets[handle & eb->and]);
		}
	}
	spin_unlock(&file->table_lock);
 
	return 0;
}
 
static struct drm_i915_gem_object *
eb_get_object(struct eb_objects *eb, unsigned long handle)
{
	if (eb->and < 0) {
		if (handle >= -eb->and)
			return NULL;
		return eb->lut[handle];
	} else {
	struct hlist_head *head;
	struct hlist_node *node;
 
	head = &eb->buckets[handle & eb->and];
	hlist_for_each(node, head) {
			struct drm_i915_gem_object *obj;
 
		obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
		if (obj->exec_handle == handle)
			return obj;
	}
	return NULL;
	}
}
 
static void
eb_destroy(struct eb_objects *eb)
{
	while (!list_empty(&eb->objects)) {
		struct drm_i915_gem_object *obj;
 
		obj = list_first_entry(&eb->objects,
				       struct drm_i915_gem_object,
				       exec_list);
		list_del_init(&obj->exec_list);
		drm_gem_object_unreference(&obj->base);
	}
	kfree(eb);
}
 
static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
{
	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
		!obj->map_and_fenceable ||
		obj->cache_level != I915_CACHE_NONE);
}
 
static int
relocate_entry_cpu(struct drm_i915_gem_object *obj,
		   struct drm_i915_gem_relocation_entry *reloc)
{
    struct drm_device *dev = obj->base.dev;
    struct drm_i915_private *dev_priv = dev->dev_private;
	uint32_t page_offset = offset_in_page(reloc->offset);
	char *vaddr;
	int ret = -EINVAL;
 
	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
	if (ret)
		return ret;
 
    vaddr = dev_priv->gtt.mappable+4096;
    MapPage(vaddr,(addr_t)i915_gem_object_get_page(obj,reloc->offset >> PAGE_SHIFT), PG_SW);
 
	*(uint32_t *)(vaddr + page_offset) = reloc->delta;
 
	return 0;
}
 
static int
relocate_entry_gtt(struct drm_i915_gem_object *obj,
		   struct drm_i915_gem_relocation_entry *reloc)
{
	struct drm_device *dev = obj->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	uint32_t __iomem *reloc_entry;
	void __iomem *reloc_page;
	int ret = -EINVAL;
 
	ret = i915_gem_object_set_to_gtt_domain(obj, true);
	if (ret)
		return ret;
 
	ret = i915_gem_object_put_fence(obj);
	if (ret)
		return ret;
 
	/* Map the page containing the relocation we're going to perform.  */
	reloc->offset += i915_gem_obj_ggtt_offset(obj);
    MapPage(dev_priv->gtt.mappable,dev_priv->gtt.mappable_base +
                                 (reloc->offset & PAGE_MASK), PG_SW);
	reloc_page = dev_priv->gtt.mappable;
	reloc_entry = (uint32_t __iomem *)
		(reloc_page + offset_in_page(reloc->offset));
	iowrite32(reloc->delta, reloc_entry);
 
 
	return 0;
}
 
static int
i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
				   struct eb_objects *eb,
				   struct drm_i915_gem_relocation_entry *reloc,
				   struct i915_address_space *vm)
{
	struct drm_device *dev = obj->base.dev;
	struct drm_gem_object *target_obj;
	struct drm_i915_gem_object *target_i915_obj;
	uint32_t target_offset;
	int ret = -EINVAL;
 
	/* we've already hold a reference to all valid objects */
	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
	if (unlikely(target_obj == NULL))
		return -ENOENT;
 
	target_i915_obj = to_intel_bo(target_obj);
	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
 
	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
	 * pipe_control writes because the gpu doesn't properly redirect them
	 * through the ppgtt for non_secure batchbuffers. */
	if (unlikely(IS_GEN6(dev) &&
	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
	    !target_i915_obj->has_global_gtt_mapping)) {
		i915_gem_gtt_bind_object(target_i915_obj,
					 target_i915_obj->cache_level);
	}
 
	/* Validate that the target is in a valid r/w GPU domain */
	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
		DRM_DEBUG("reloc with multiple write domains: "
			  "obj %p target %d offset %d "
			  "read %08x write %08x",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  reloc->read_domains,
			  reloc->write_domain);
		return ret;
	}
	if (unlikely((reloc->write_domain | reloc->read_domains)
		     & ~I915_GEM_GPU_DOMAINS)) {
		DRM_DEBUG("reloc with read/write non-GPU domains: "
			  "obj %p target %d offset %d "
			  "read %08x write %08x",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  reloc->read_domains,
			  reloc->write_domain);
		return ret;
	}
 
	target_obj->pending_read_domains |= reloc->read_domains;
	target_obj->pending_write_domain |= reloc->write_domain;
 
	/* If the relocation already has the right value in it, no
	 * more work needs to be done.
	 */
	if (target_offset == reloc->presumed_offset)
		return 0;
 
	/* Check that the relocation address is valid... */
	if (unlikely(reloc->offset > obj->base.size - 4)) {
		DRM_DEBUG("Relocation beyond object bounds: "
			  "obj %p target %d offset %d size %d.\n",
			  obj, reloc->target_handle,
			  (int) reloc->offset,
			  (int) obj->base.size);
		return ret;
	}
	if (unlikely(reloc->offset & 3)) {
		DRM_DEBUG("Relocation not 4-byte aligned: "
			  "obj %p target %d offset %d.\n",
			  obj, reloc->target_handle,
			  (int) reloc->offset);
		return ret;
	}
 
	/* We can't wait for rendering with pagefaults disabled */
 
	reloc->delta += target_offset;
	if (use_cpu_reloc(obj))
		ret = relocate_entry_cpu(obj, reloc);
	else
		ret = relocate_entry_gtt(obj, reloc);
 
		if (ret)
			return ret;
 
	/* and update the user's relocation entry */
	reloc->presumed_offset = target_offset;
 
	return 0;
}
 
static int
i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
				    struct eb_objects *eb,
				    struct i915_address_space *vm)
{
#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];
	struct drm_i915_gem_relocation_entry __user *user_relocs;
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	int remain, ret;
 
	user_relocs = to_user_ptr(entry->relocs_ptr);
 
	remain = entry->relocation_count;
	while (remain) {
		struct drm_i915_gem_relocation_entry *r = stack_reloc;
		int count = remain;
		if (count > ARRAY_SIZE(stack_reloc))
			count = ARRAY_SIZE(stack_reloc);
		remain -= count;
 
        memcpy(r, user_relocs, count*sizeof(r[0]));
 
		do {
			u64 offset = r->presumed_offset;
 
			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
								 vm);
			if (ret)
				return ret;
 
		if (r->presumed_offset != offset)
		{
            memcpy(&user_relocs->presumed_offset,
                   &r->presumed_offset,
                   sizeof(r->presumed_offset));
		}
 
			user_relocs++;
			r++;
		} while (--count);
	}
 
	return 0;
#undef N_RELOC
}
 
static int
i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
					 struct eb_objects *eb,
					 struct drm_i915_gem_relocation_entry *relocs,
					 struct i915_address_space *vm)
{
	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	int i, ret;
 
	for (i = 0; i < entry->relocation_count; i++) {
		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
							 vm);
		if (ret)
			return ret;
	}
 
	return 0;
}
 
static int
i915_gem_execbuffer_relocate(struct eb_objects *eb,
			     struct i915_address_space *vm)
{
	struct drm_i915_gem_object *obj;
	int ret = 0;
 
	/* This is the fast path and we cannot handle a pagefault whilst
	 * holding the struct mutex lest the user pass in the relocations
	 * contained within a mmaped bo. For in such a case we, the page
	 * fault handler would call i915_gem_fault() and we would try to
	 * acquire the struct mutex again. Obviously this is bad and so
	 * lockdep complains vehemently.
	 */
//	pagefault_disable();
	list_for_each_entry(obj, &eb->objects, exec_list) {
		ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
		if (ret)
			break;
	}
//   pagefault_enable();
 
	return ret;
}
 
#define  __EXEC_OBJECT_HAS_PIN (1<<31)
#define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 
static int
need_reloc_mappable(struct drm_i915_gem_object *obj)
{
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	return entry->relocation_count && !use_cpu_reloc(obj);
}
 
static int
i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
				   struct intel_ring_buffer *ring,
				   struct i915_address_space *vm,
				   bool *need_reloc)
{
	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
	bool need_fence, need_mappable;
	int ret;
 
	need_fence =
		has_fenced_gpu_access &&
		entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
		obj->tiling_mode != I915_TILING_NONE;
	need_mappable = need_fence || need_reloc_mappable(obj);
 
	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
				  false);
	if (ret)
		return ret;
 
	entry->flags |= __EXEC_OBJECT_HAS_PIN;
 
	if (has_fenced_gpu_access) {
		if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
			ret = i915_gem_object_get_fence(obj);
			if (ret)
				return ret;
 
			if (i915_gem_object_pin_fence(obj))
				entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 
			obj->pending_fenced_gpu_access = true;
		}
	}
 
	/* Ensure ppgtt mapping exists if needed */
	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
		i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
				       obj, obj->cache_level);
 
		obj->has_aliasing_ppgtt_mapping = 1;
	}
 
	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
		entry->offset = i915_gem_obj_offset(obj, vm);
		*need_reloc = true;
	}
 
	if (entry->flags & EXEC_OBJECT_WRITE) {
		obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
		obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
	}
 
	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
	    !obj->has_global_gtt_mapping)
		i915_gem_gtt_bind_object(obj, obj->cache_level);
 
	return 0;
}
 
static void
i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
{
	struct drm_i915_gem_exec_object2 *entry;
 
	if (!i915_gem_obj_bound_any(obj))
		return;
 
	entry = obj->exec_entry;
 
	if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
		i915_gem_object_unpin_fence(obj);
 
	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
		i915_gem_object_unpin(obj);
 
	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
}
 
static int
i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
			    struct list_head *objects,
			    struct i915_address_space *vm,
			    bool *need_relocs)
{
	struct drm_i915_gem_object *obj;
	struct list_head ordered_objects;
	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
	int retry;
 
	INIT_LIST_HEAD(&ordered_objects);
	while (!list_empty(objects)) {
		struct drm_i915_gem_exec_object2 *entry;
		bool need_fence, need_mappable;
 
		obj = list_first_entry(objects,
				       struct drm_i915_gem_object,
				       exec_list);
		entry = obj->exec_entry;
 
		need_fence =
			has_fenced_gpu_access &&
			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
			obj->tiling_mode != I915_TILING_NONE;
		need_mappable = need_fence || need_reloc_mappable(obj);
 
		if (need_mappable)
			list_move(&obj->exec_list, &ordered_objects);
		else
			list_move_tail(&obj->exec_list, &ordered_objects);
 
		obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
		obj->base.pending_write_domain = 0;
		obj->pending_fenced_gpu_access = false;
	}
	list_splice(&ordered_objects, objects);
 
	/* Attempt to pin all of the buffers into the GTT.
	 * This is done in 3 phases:
	 *
	 * 1a. Unbind all objects that do not match the GTT constraints for
	 *     the execbuffer (fenceable, mappable, alignment etc).
	 * 1b. Increment pin count for already bound objects.
	 * 2.  Bind new objects.
	 * 3.  Decrement pin count.
	 *
	 * This avoid unnecessary unbinding of later objects in order to make
	 * room for the earlier objects *unless* we need to defragment.
	 */
	retry = 0;
	do {
		int ret = 0;
 
		/* Unbind any ill-fitting objects or pin. */
		list_for_each_entry(obj, objects, exec_list) {
			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
			bool need_fence, need_mappable;
			u32 obj_offset;
 
			if (!i915_gem_obj_bound(obj, vm))
				continue;
 
			obj_offset = i915_gem_obj_offset(obj, vm);
			need_fence =
				has_fenced_gpu_access &&
				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
				obj->tiling_mode != I915_TILING_NONE;
			need_mappable = need_fence || need_reloc_mappable(obj);
 
			WARN_ON((need_mappable || need_fence) &&
				!i915_is_ggtt(vm));
 
			if ((entry->alignment &&
			     obj_offset & (entry->alignment - 1)) ||
			    (need_mappable && !obj->map_and_fenceable))
				ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
			else
				ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
			if (ret)
				goto err;
		}
 
		/* Bind fresh objects */
		list_for_each_entry(obj, objects, exec_list) {
			if (i915_gem_obj_bound(obj, vm))
				continue;
 
			ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
			if (ret)
				goto err;
		}
 
err:		/* Decrement pin count for bound objects */
		list_for_each_entry(obj, objects, exec_list)
			i915_gem_execbuffer_unreserve_object(obj);
 
		if (ret != -ENOSPC || retry++)
			return ret;
 
//       ret = i915_gem_evict_everything(ring->dev);
		if (ret)
			return ret;
	} while (1);
}
 
static int
i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
				  struct drm_i915_gem_execbuffer2 *args,
				  struct drm_file *file,
				  struct intel_ring_buffer *ring,
				  struct eb_objects *eb,
				  struct drm_i915_gem_exec_object2 *exec,
				  struct i915_address_space *vm)
{
	struct drm_i915_gem_relocation_entry *reloc;
	struct drm_i915_gem_object *obj;
	bool need_relocs;
	int *reloc_offset;
	int i, total, ret;
	int count = args->buffer_count;
 
	/* We may process another execbuffer during the unlock... */
	while (!list_empty(&eb->objects)) {
		obj = list_first_entry(&eb->objects,
				       struct drm_i915_gem_object,
				       exec_list);
		list_del_init(&obj->exec_list);
		drm_gem_object_unreference(&obj->base);
	}
 
	mutex_unlock(&dev->struct_mutex);
 
	total = 0;
	for (i = 0; i < count; i++)
		total += exec[i].relocation_count;
 
    reloc_offset = malloc(count * sizeof(*reloc_offset));
    reloc = malloc(total * sizeof(*reloc));
	if (reloc == NULL || reloc_offset == NULL) {
        kfree(reloc);
        kfree(reloc_offset);
		mutex_lock(&dev->struct_mutex);
		return -ENOMEM;
	}
 
	total = 0;
	for (i = 0; i < count; i++) {
		struct drm_i915_gem_relocation_entry __user *user_relocs;
		u64 invalid_offset = (u64)-1;
		int j;
 
		user_relocs = to_user_ptr(exec[i].relocs_ptr);
 
		if (copy_from_user(reloc+total, user_relocs,
				   exec[i].relocation_count * sizeof(*reloc))) {
			ret = -EFAULT;
			mutex_lock(&dev->struct_mutex);
			goto err;
		}
 
		/* As we do not update the known relocation offsets after
		 * relocating (due to the complexities in lock handling),
		 * we need to mark them as invalid now so that we force the
		 * relocation processing next time. Just in case the target
		 * object is evicted and then rebound into its old
		 * presumed_offset before the next execbuffer - if that
		 * happened we would make the mistake of assuming that the
		 * relocations were valid.
		 */
		for (j = 0; j < exec[i].relocation_count; j++) {
			if (copy_to_user(&user_relocs[j].presumed_offset,
					 &invalid_offset,
					 sizeof(invalid_offset))) {
				ret = -EFAULT;
				mutex_lock(&dev->struct_mutex);
				goto err;
			}
		}
 
		reloc_offset[i] = total;
		total += exec[i].relocation_count;
	}
 
	ret = i915_mutex_lock_interruptible(dev);
	if (ret) {
		mutex_lock(&dev->struct_mutex);
		goto err;
	}
 
	/* reacquire the objects */
	eb_reset(eb);
	ret = eb_lookup_objects(eb, exec, args, file);
	if (ret)
			goto err;
 
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
	if (ret)
		goto err;
 
	list_for_each_entry(obj, &eb->objects, exec_list) {
		int offset = obj->exec_entry - exec;
		ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
							       reloc + reloc_offset[offset],
							       vm);
		if (ret)
			goto err;
	}
 
	/* Leave the user relocations as are, this is the painfully slow path,
	 * and we want to avoid the complication of dropping the lock whilst
	 * having buffers reserved in the aperture and so causing spurious
	 * ENOSPC for random operations.
	 */
 
err:
    kfree(reloc);
    kfree(reloc_offset);
	return ret;
}
 
static int
i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
				struct list_head *objects)
{
	struct drm_i915_gem_object *obj;
	uint32_t flush_domains = 0;
	bool flush_chipset = false;
	int ret;
 
	list_for_each_entry(obj, objects, exec_list) {
		ret = i915_gem_object_sync(obj, ring);
		if (ret)
			return ret;
 
		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
			flush_chipset |= i915_gem_clflush_object(obj, false);
 
		flush_domains |= obj->base.write_domain;
	}
 
	if (flush_chipset)
		i915_gem_chipset_flush(ring->dev);
 
	if (flush_domains & I915_GEM_DOMAIN_GTT)
		wmb();
 
	/* Unconditionally invalidate gpu caches and ensure that we do flush
	 * any residual writes from the previous batch.
	 */
	return intel_ring_invalidate_all_caches(ring);
}
 
static bool
i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
{
	if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
		return false;
 
	return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
}
 
static int
validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
		   int count)
{
	int i;
	int relocs_total = 0;
	int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 
	for (i = 0; i < count; i++) {
		char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
		int length; /* limited by fault_in_pages_readable() */
 
		if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
			return -EINVAL;
 
		/* First check for malicious input causing overflow in
		 * the worst case where we need to allocate the entire
		 * relocation tree as a single array.
		 */
		if (exec[i].relocation_count > relocs_max - relocs_total)
			return -EINVAL;
		relocs_total += exec[i].relocation_count;
 
		length = exec[i].relocation_count *
			sizeof(struct drm_i915_gem_relocation_entry);
		/*
		 * We must check that the entire relocation array is safe
		 * to read, but since we may need to update the presumed
		 * offsets during execution, check for full write access.
		 */
 
	}
 
	return 0;
}
 
static void
i915_gem_execbuffer_move_to_active(struct list_head *objects,
				   struct i915_address_space *vm,
				   struct intel_ring_buffer *ring)
{
	struct drm_i915_gem_object *obj;
 
	list_for_each_entry(obj, objects, exec_list) {
		u32 old_read = obj->base.read_domains;
		u32 old_write = obj->base.write_domain;
 
		obj->base.write_domain = obj->base.pending_write_domain;
		if (obj->base.write_domain == 0)
			obj->base.pending_read_domains |= obj->base.read_domains;
		obj->base.read_domains = obj->base.pending_read_domains;
		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 
		/* FIXME: This lookup gets fixed later <-- danvet */
		list_move_tail(&i915_gem_obj_to_vma(obj, vm)->mm_list, &vm->active_list);
		i915_gem_object_move_to_active(obj, ring);
		if (obj->base.write_domain) {
			obj->dirty = 1;
			obj->last_write_seqno = intel_ring_get_seqno(ring);
			if (obj->pin_count) /* check for potential scanout */
				intel_mark_fb_busy(obj, ring);
		}
 
		trace_i915_gem_object_change_domain(obj, old_read, old_write);
	}
}
 
static void
i915_gem_execbuffer_retire_commands(struct drm_device *dev,
				    struct drm_file *file,
				    struct intel_ring_buffer *ring,
				    struct drm_i915_gem_object *obj)
{
	/* Unconditionally force add_request to emit a full flush. */
	ring->gpu_caches_dirty = true;
 
	/* Add a breadcrumb for the completion of the batch buffer */
	(void)__i915_add_request(ring, file, obj, NULL);
}
 
static int
i915_reset_gen7_sol_offsets(struct drm_device *dev,
			    struct intel_ring_buffer *ring)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret, i;
 
	if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
		return 0;
 
	ret = intel_ring_begin(ring, 4 * 3);
	if (ret)
		return ret;
 
	for (i = 0; i < 4; i++) {
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
		intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
		intel_ring_emit(ring, 0);
	}
 
	intel_ring_advance(ring);
 
	return 0;
}
 
static int
i915_gem_do_execbuffer(struct drm_device *dev, void *data,
		       struct drm_file *file,
		       struct drm_i915_gem_execbuffer2 *args,
		       struct drm_i915_gem_exec_object2 *exec,
		       struct i915_address_space *vm)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct eb_objects *eb;
	struct drm_i915_gem_object *batch_obj;
	struct drm_clip_rect *cliprects = NULL;
	struct intel_ring_buffer *ring;
	u32 ctx_id = i915_execbuffer2_get_context_id(*args);
	u32 exec_start, exec_len;
	u32 mask, flags;
	int ret, mode, i;
	bool need_relocs;
 
	if (!i915_gem_check_execbuffer(args))
		return -EINVAL;
 
	ret = validate_exec_list(exec, args->buffer_count);
	if (ret)
		return ret;
 
	flags = 0;
	if (args->flags & I915_EXEC_SECURE) {
 
		flags |= I915_DISPATCH_SECURE;
	}
	if (args->flags & I915_EXEC_IS_PINNED)
		flags |= I915_DISPATCH_PINNED;
 
	switch (args->flags & I915_EXEC_RING_MASK) {
	case I915_EXEC_DEFAULT:
	case I915_EXEC_RENDER:
		ring = &dev_priv->ring[RCS];
		break;
	case I915_EXEC_BSD:
		ring = &dev_priv->ring[VCS];
		if (ctx_id != DEFAULT_CONTEXT_ID) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;
	case I915_EXEC_BLT:
		ring = &dev_priv->ring[BCS];
		if (ctx_id != DEFAULT_CONTEXT_ID) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;
	case I915_EXEC_VEBOX:
		ring = &dev_priv->ring[VECS];
		if (ctx_id != DEFAULT_CONTEXT_ID) {
			DRM_DEBUG("Ring %s doesn't support contexts\n",
				  ring->name);
			return -EPERM;
		}
		break;
 
	default:
		DRM_DEBUG("execbuf with unknown ring: %d\n",
			  (int)(args->flags & I915_EXEC_RING_MASK));
		return -EINVAL;
	}
	if (!intel_ring_initialized(ring)) {
		DRM_DEBUG("execbuf with invalid ring: %d\n",
			  (int)(args->flags & I915_EXEC_RING_MASK));
		return -EINVAL;
	}
 
	mode = args->flags & I915_EXEC_CONSTANTS_MASK;
	mask = I915_EXEC_CONSTANTS_MASK;
	switch (mode) {
	case I915_EXEC_CONSTANTS_REL_GENERAL:
	case I915_EXEC_CONSTANTS_ABSOLUTE:
	case I915_EXEC_CONSTANTS_REL_SURFACE:
		if (ring == &dev_priv->ring[RCS] &&
		    mode != dev_priv->relative_constants_mode) {
			if (INTEL_INFO(dev)->gen < 4)
				return -EINVAL;
 
			if (INTEL_INFO(dev)->gen > 5 &&
			    mode == I915_EXEC_CONSTANTS_REL_SURFACE)
				return -EINVAL;
 
			/* The HW changed the meaning on this bit on gen6 */
			if (INTEL_INFO(dev)->gen >= 6)
				mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
		}
		break;
	default:
		DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
		return -EINVAL;
	}
 
	if (args->buffer_count < 1) {
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
		return -EINVAL;
	}
 
	if (args->num_cliprects != 0) {
		if (ring != &dev_priv->ring[RCS]) {
			DRM_DEBUG("clip rectangles are only valid with the render ring\n");
			return -EINVAL;
		}
 
		if (INTEL_INFO(dev)->gen >= 5) {
			DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
			return -EINVAL;
		}
 
		if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
			DRM_DEBUG("execbuf with %u cliprects\n",
				  args->num_cliprects);
			return -EINVAL;
		}
 
		cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
				    GFP_KERNEL);
		if (cliprects == NULL) {
			ret = -ENOMEM;
			goto pre_mutex_err;
		}
 
		if (copy_from_user(cliprects,
				   to_user_ptr(args->cliprects_ptr),
				     sizeof(*cliprects)*args->num_cliprects)) {
			ret = -EFAULT;
			goto pre_mutex_err;
		}
	}
 
	ret = i915_mutex_lock_interruptible(dev);
	if (ret)
		goto pre_mutex_err;
 
	if (dev_priv->ums.mm_suspended) {
		mutex_unlock(&dev->struct_mutex);
		ret = -EBUSY;
		goto pre_mutex_err;
	}
 
	eb = eb_create(args);
	if (eb == NULL) {
		mutex_unlock(&dev->struct_mutex);
		ret = -ENOMEM;
		goto pre_mutex_err;
	}
 
	/* Look up object handles */
	ret = eb_lookup_objects(eb, exec, args, file);
	if (ret)
			goto err;
 
	/* take note of the batch buffer before we might reorder the lists */
	batch_obj = list_entry(eb->objects.prev,
			       struct drm_i915_gem_object,
			       exec_list);
 
	/* Move the objects en-masse into the GTT, evicting if necessary. */
	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
	if (ret)
		goto err;
 
	/* The objects are in their final locations, apply the relocations. */
	if (need_relocs)
		ret = i915_gem_execbuffer_relocate(eb, vm);
	if (ret) {
		if (ret == -EFAULT) {
			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
								eb, exec, vm);
			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
		}
		if (ret)
			goto err;
	}
 
	/* Set the pending read domains for the batch buffer to COMMAND */
	if (batch_obj->base.pending_write_domain) {
		DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
		ret = -EINVAL;
		goto err;
	}
	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
 
	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
	 * batch" bit. Hence we need to pin secure batches into the global gtt.
	 * hsw should have this fixed, but let's be paranoid and do it
	 * unconditionally for now. */
	if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
		i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
 
	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->objects);
	if (ret)
		goto err;
 
	ret = i915_switch_context(ring, file, ctx_id);
	if (ret)
		goto err;
 
	if (ring == &dev_priv->ring[RCS] &&
	    mode != dev_priv->relative_constants_mode) {
		ret = intel_ring_begin(ring, 4);
		if (ret)
				goto err;
 
		intel_ring_emit(ring, MI_NOOP);
		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
		intel_ring_emit(ring, INSTPM);
		intel_ring_emit(ring, mask << 16 | mode);
		intel_ring_advance(ring);
 
		dev_priv->relative_constants_mode = mode;
	}
 
	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
		ret = i915_reset_gen7_sol_offsets(dev, ring);
		if (ret)
			goto err;
	}
 
	exec_start = i915_gem_obj_offset(batch_obj, vm) +
		args->batch_start_offset;
	exec_len = args->batch_len;
	if (cliprects) {
		for (i = 0; i < args->num_cliprects; i++) {
			ret = i915_emit_box(dev, &cliprects[i],
					    args->DR1, args->DR4);
			if (ret)
				goto err;
 
			ret = ring->dispatch_execbuffer(ring,
							exec_start, exec_len,
							flags);
			if (ret)
				goto err;
		}
	} else {
		ret = ring->dispatch_execbuffer(ring,
						exec_start, exec_len,
						flags);
		if (ret)
			goto err;
	}
 
	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
 
	i915_gem_execbuffer_move_to_active(&eb->objects, vm, ring);
	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
 
err:
	eb_destroy(eb);
 
	mutex_unlock(&dev->struct_mutex);
 
pre_mutex_err:
    kfree(cliprects);
	return ret;
}
 
#if 0
/*
 * Legacy execbuffer just creates an exec2 list from the original exec object
 * list array and passes it to the real function.
 */
int
i915_gem_execbuffer(struct drm_device *dev, void *data,
		    struct drm_file *file)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_execbuffer *args = data;
	struct drm_i915_gem_execbuffer2 exec2;
	struct drm_i915_gem_exec_object *exec_list = NULL;
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
	int ret, i;
 
	if (args->buffer_count < 1) {
		DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
		return -EINVAL;
	}
 
	/* Copy in the exec list from userland */
	exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
	if (exec_list == NULL || exec2_list == NULL) {
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
			  args->buffer_count);
		drm_free_large(exec_list);
		drm_free_large(exec2_list);
		return -ENOMEM;
	}
	ret = copy_from_user(exec_list,
			     to_user_ptr(args->buffers_ptr),
			     sizeof(*exec_list) * args->buffer_count);
	if (ret != 0) {
		DRM_DEBUG("copy %d exec entries failed %d\n",
			  args->buffer_count, ret);
		drm_free_large(exec_list);
		drm_free_large(exec2_list);
		return -EFAULT;
	}
 
	for (i = 0; i < args->buffer_count; i++) {
		exec2_list[i].handle = exec_list[i].handle;
		exec2_list[i].relocation_count = exec_list[i].relocation_count;
		exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
		exec2_list[i].alignment = exec_list[i].alignment;
		exec2_list[i].offset = exec_list[i].offset;
		if (INTEL_INFO(dev)->gen < 4)
			exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
		else
			exec2_list[i].flags = 0;
	}
 
	exec2.buffers_ptr = args->buffers_ptr;
	exec2.buffer_count = args->buffer_count;
	exec2.batch_start_offset = args->batch_start_offset;
	exec2.batch_len = args->batch_len;
	exec2.DR1 = args->DR1;
	exec2.DR4 = args->DR4;
	exec2.num_cliprects = args->num_cliprects;
	exec2.cliprects_ptr = args->cliprects_ptr;
	exec2.flags = I915_EXEC_RENDER;
	i915_execbuffer2_set_context_id(exec2, 0);
 
	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
				     &dev_priv->gtt.base);
	if (!ret) {
		/* Copy the new buffer offsets back to the user's exec list. */
		for (i = 0; i < args->buffer_count; i++)
			exec_list[i].offset = exec2_list[i].offset;
		/* ... and back out to userspace */
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
				   exec_list,
				   sizeof(*exec_list) * args->buffer_count);
		if (ret) {
			ret = -EFAULT;
			DRM_DEBUG("failed to copy %d exec entries "
				  "back to user (%d)\n",
				  args->buffer_count, ret);
		}
	}
 
	drm_free_large(exec_list);
	drm_free_large(exec2_list);
	return ret;
}
#endif
 
int
i915_gem_execbuffer2(struct drm_device *dev, void *data,
		     struct drm_file *file)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_execbuffer2 *args = data;
	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
	int ret;
 
	if (args->buffer_count < 1 ||
	    args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
		DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
		return -EINVAL;
	}
 
	exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
			     GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
	if (exec2_list == NULL) {
		DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
			  args->buffer_count);
		return -ENOMEM;
	}
	ret = copy_from_user(exec2_list,
 
			     to_user_ptr(args->buffers_ptr),
			     sizeof(*exec2_list) * args->buffer_count);
	if (ret != 0) {
		DRM_DEBUG("copy %d exec entries failed %d\n",
			  args->buffer_count, ret);
        kfree(exec2_list);
        FAIL();
		return -EFAULT;
	}
 
	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
				     &dev_priv->gtt.base);
	if (!ret) {
		/* Copy the new buffer offsets back to the user's exec list. */
		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
				   exec2_list,
				   sizeof(*exec2_list) * args->buffer_count);
		if (ret) {
			ret = -EFAULT;
			DRM_DEBUG("failed to copy %d exec entries "
				  "back to user (%d)\n",
				  args->buffer_count, ret);
		}
	}
 
    kfree(exec2_list);
	return ret;
}
 
static>
 
static>
#define>
#define>

Rev 4392	Rev 4539
1	/*	1	/*
2	* Copyright © 2008,2010 Intel Corporation	2	* Copyright © 2008,2010 Intel Corporation
3	*	3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a	4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),	5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation	6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the	8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:	9	* Software is furnished to do so, subject to the following conditions:
10	*	10	*
11	* The above copyright notice and this permission notice (including the next	11	* The above copyright notice and this permission notice (including the next
12	* paragraph) shall be included in all copies or substantial portions of the	12	* paragraph) shall be included in all copies or substantial portions of the
13	* Software.	13	* Software.
14	*	14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21	* IN THE SOFTWARE.	21	* IN THE SOFTWARE.
22	*	22	*
23	* Authors:	23	* Authors:
24	* Eric Anholt	24	* Eric Anholt
25	* Chris Wilson	25	* Chris Wilson
26	*	26	*
27	*/	27	*/
28		28
29	#include	29	#include
30	#include	30	#include
31	#include "i915_drv.h"	31	#include "i915_drv.h"
32	#include "i915_trace.h"	32	#include "i915_trace.h"
33	#include "intel_drv.h"	33	#include "intel_drv.h"
34	//#include	34	//#include
35		35
36		36
37	static unsigned long	37	static unsigned long
38	copy_to_user(void __user to, const void from, unsigned long n)	38	copy_to_user(void __user to, const void from, unsigned long n)
39	{	39	{
40	memcpy(to, from, n);	40	memcpy(to, from, n);
41	return 0;	41	return 0;
42	}	42	}
43		43
44	static unsigned long	44	static unsigned long
45	copy_from_user(void to, const void __user from, unsigned long n)	45	copy_from_user(void to, const void __user from, unsigned long n)
46	{	46	{
47	memcpy(to, from, n);	47	memcpy(to, from, n);
48	return 0;	48	return 0;
49	}	49	}
50		50
51	struct eb_objects {	51	struct eb_objects {
52	struct list_head objects;	52	struct list_head objects;
53	int and;	53	int and;
54	union {	54	union {
55	struct drm_i915_gem_object *lut[0];	55	struct drm_i915_gem_object *lut[0];
56	struct hlist_head buckets[0];	56	struct hlist_head buckets[0];
57	};	57	};
58	};	58	};
59		59
60	static struct eb_objects *	60	static struct eb_objects *
61	eb_create(struct drm_i915_gem_execbuffer2 *args)	61	eb_create(struct drm_i915_gem_execbuffer2 *args)
62	{	62	{
63	struct eb_objects *eb = NULL;	63	struct eb_objects *eb = NULL;
64		64
65	if (args->flags & I915_EXEC_HANDLE_LUT) {	65	if (args->flags & I915_EXEC_HANDLE_LUT) {
66	int size = args->buffer_count;	66	int size = args->buffer_count;
67	size = sizeof(struct drm_i915_gem_object );	67	size = sizeof(struct drm_i915_gem_object );
68	size += sizeof(struct eb_objects);	68	size += sizeof(struct eb_objects);
69	eb = kmalloc(size, GFP_TEMPORARY \| __GFP_NOWARN \| __GFP_NORETRY);	69	eb = kmalloc(size, GFP_TEMPORARY \| __GFP_NOWARN \| __GFP_NORETRY);
70	}	70	}
71		71
72	if (eb == NULL) {	72	if (eb == NULL) {
73	int size = args->buffer_count;	73	int size = args->buffer_count;
74	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;	74	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
75	BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));	75	BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
76	while (count > 2*size)	76	while (count > 2*size)
77	count >>= 1;	77	count >>= 1;
78	eb = kzalloc(count*sizeof(struct hlist_head) +	78	eb = kzalloc(count*sizeof(struct hlist_head) +
79	sizeof(struct eb_objects),	79	sizeof(struct eb_objects),
80	GFP_TEMPORARY);	80	GFP_TEMPORARY);
81	if (eb == NULL)	81	if (eb == NULL)
82	return eb;	82	return eb;
83		83
84	eb->and = count - 1;	84	eb->and = count - 1;
85	} else	85	} else
86	eb->and = -args->buffer_count;	86	eb->and = -args->buffer_count;
87		87
88	INIT_LIST_HEAD(&eb->objects);	88	INIT_LIST_HEAD(&eb->objects);
89	return eb;	89	return eb;
90	}	90	}
91		91
92	static void	92	static void
93	eb_reset(struct eb_objects *eb)	93	eb_reset(struct eb_objects *eb)
94	{	94	{
95	if (eb->and >= 0)	95	if (eb->and >= 0)
96	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));	96	memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
97	}	97	}
98		98
99	static int	99	static int
100	eb_lookup_objects(struct eb_objects *eb,	100	eb_lookup_objects(struct eb_objects *eb,
101	struct drm_i915_gem_exec_object2 *exec,	101	struct drm_i915_gem_exec_object2 *exec,
102	const struct drm_i915_gem_execbuffer2 *args,	102	const struct drm_i915_gem_execbuffer2 *args,
103	struct drm_file *file)	103	struct drm_file *file)
104	{	104	{
105	int i;	105	int i;
106		106
107	spin_lock(&file->table_lock);	107	spin_lock(&file->table_lock);
108	for (i = 0; i < args->buffer_count; i++) {	108	for (i = 0; i < args->buffer_count; i++) {
109	struct drm_i915_gem_object *obj;	109	struct drm_i915_gem_object *obj;
110		110
111	obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));	111	obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
112	if (obj == NULL) {	112	if (obj == NULL) {
113	spin_unlock(&file->table_lock);	113	spin_unlock(&file->table_lock);
114	DRM_DEBUG("Invalid object handle %d at index %d\n",	114	DRM_DEBUG("Invalid object handle %d at index %d\n",
115	exec[i].handle, i);	115	exec[i].handle, i);
116	return -ENOENT;	116	return -ENOENT;
117	}	117	}
118		118
119	if (!list_empty(&obj->exec_list)) {	119	if (!list_empty(&obj->exec_list)) {
120	spin_unlock(&file->table_lock);	120	spin_unlock(&file->table_lock);
121	DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",	121	DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
122	obj, exec[i].handle, i);	122	obj, exec[i].handle, i);
123	return -EINVAL;	123	return -EINVAL;
124	}	124	}
125		125
126	drm_gem_object_reference(&obj->base);	126	drm_gem_object_reference(&obj->base);
127	list_add_tail(&obj->exec_list, &eb->objects);	127	list_add_tail(&obj->exec_list, &eb->objects);
128		128
129	obj->exec_entry = &exec[i];	129	obj->exec_entry = &exec[i];
130	if (eb->and < 0) {	130	if (eb->and < 0) {
131	eb->lut[i] = obj;	131	eb->lut[i] = obj;
132	} else {	132	} else {
133	uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;	133	uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
134	obj->exec_handle = handle;	134	obj->exec_handle = handle;
135	hlist_add_head(&obj->exec_node,	135	hlist_add_head(&obj->exec_node,
136	&eb->buckets[handle & eb->and]);	136	&eb->buckets[handle & eb->and]);
137	}	137	}
138	}	138	}
139	spin_unlock(&file->table_lock);	139	spin_unlock(&file->table_lock);
140		140
141	return 0;	141	return 0;
142	}	142	}
143		143
144	static struct drm_i915_gem_object *	144	static struct drm_i915_gem_object *
145	eb_get_object(struct eb_objects *eb, unsigned long handle)	145	eb_get_object(struct eb_objects *eb, unsigned long handle)
146	{	146	{
147	if (eb->and < 0) {	147	if (eb->and < 0) {
148	if (handle >= -eb->and)	148	if (handle >= -eb->and)
149	return NULL;	149	return NULL;
150	return eb->lut[handle];	150	return eb->lut[handle];
151	} else {	151	} else {
152	struct hlist_head *head;	152	struct hlist_head *head;
153	struct hlist_node *node;	153	struct hlist_node *node;
154		154
155	head = &eb->buckets[handle & eb->and];	155	head = &eb->buckets[handle & eb->and];
156	hlist_for_each(node, head) {	156	hlist_for_each(node, head) {
157	struct drm_i915_gem_object *obj;	157	struct drm_i915_gem_object *obj;
158		158
159	obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);	159	obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
160	if (obj->exec_handle == handle)	160	if (obj->exec_handle == handle)
161	return obj;	161	return obj;
162	}	162	}
163	return NULL;	163	return NULL;
164	}	164	}
165	}	165	}
166		166
167	static void	167	static void
168	eb_destroy(struct eb_objects *eb)	168	eb_destroy(struct eb_objects *eb)
169	{	169	{
170	while (!list_empty(&eb->objects)) {	170	while (!list_empty(&eb->objects)) {
171	struct drm_i915_gem_object *obj;	171	struct drm_i915_gem_object *obj;
172		172
173	obj = list_first_entry(&eb->objects,	173	obj = list_first_entry(&eb->objects,
174	struct drm_i915_gem_object,	174	struct drm_i915_gem_object,
175	exec_list);	175	exec_list);
176	list_del_init(&obj->exec_list);	176	list_del_init(&obj->exec_list);
177	drm_gem_object_unreference(&obj->base);	177	drm_gem_object_unreference(&obj->base);
178	}	178	}
179	kfree(eb);	179	kfree(eb);
180	}	180	}
181		181
182	static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)	182	static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
183	{	183	{
184	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU \|\|	184	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU \|\|
185	!obj->map_and_fenceable \|\|	185	!obj->map_and_fenceable \|\|
186	obj->cache_level != I915_CACHE_NONE);	186	obj->cache_level != I915_CACHE_NONE);
187	}	187	}
188		188
189	static int	189	static int
190	relocate_entry_cpu(struct drm_i915_gem_object *obj,	190	relocate_entry_cpu(struct drm_i915_gem_object *obj,
191	struct drm_i915_gem_relocation_entry *reloc)	191	struct drm_i915_gem_relocation_entry *reloc)
192	{	192	{
-		193	struct drm_device *dev = obj->base.dev;
-		194	struct drm_i915_private *dev_priv = dev->dev_private;
193	uint32_t page_offset = offset_in_page(reloc->offset);	195	uint32_t page_offset = offset_in_page(reloc->offset);
194	char *vaddr;	196	char *vaddr;
195	int ret = -EINVAL;	197	int ret = -EINVAL;
196		198
197	ret = i915_gem_object_set_to_cpu_domain(obj, 1);	199	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
198	if (ret)	200	if (ret)
199	return ret;	201	return ret;
200		202
201	vaddr = (char *)MapIoMem((addr_t)i915_gem_object_get_page(obj,	203	vaddr = dev_priv->gtt.mappable+4096;
202	reloc->offset >> PAGE_SHIFT), 4096, 3);	204	MapPage(vaddr,(addr_t)i915_gem_object_get_page(obj,reloc->offset >> PAGE_SHIFT), PG_SW);
203	(uint32_t )(vaddr + page_offset) = reloc->delta;	-
204	FreeKernelSpace(vaddr);	205	(uint32_t )(vaddr + page_offset) = reloc->delta;
205		206
206	return 0;	207	return 0;
207	}	208	}
208		209
209	static int	210	static int
210	relocate_entry_gtt(struct drm_i915_gem_object *obj,	211	relocate_entry_gtt(struct drm_i915_gem_object *obj,
211	struct drm_i915_gem_relocation_entry *reloc)	212	struct drm_i915_gem_relocation_entry *reloc)
212	{	213	{
213	struct drm_device *dev = obj->base.dev;	214	struct drm_device *dev = obj->base.dev;
214	struct drm_i915_private *dev_priv = dev->dev_private;	215	struct drm_i915_private *dev_priv = dev->dev_private;
215	uint32_t __iomem *reloc_entry;	216	uint32_t __iomem *reloc_entry;
216	void __iomem *reloc_page;	217	void __iomem *reloc_page;
217	int ret = -EINVAL;	218	int ret = -EINVAL;
218		219
219	ret = i915_gem_object_set_to_gtt_domain(obj, true);	220	ret = i915_gem_object_set_to_gtt_domain(obj, true);
220	if (ret)	221	if (ret)
221	return ret;	222	return ret;
222		223
223	ret = i915_gem_object_put_fence(obj);	224	ret = i915_gem_object_put_fence(obj);
224	if (ret)	225	if (ret)
225	return ret;	226	return ret;
226		227
227	/* Map the page containing the relocation we're going to perform. */	228	/* Map the page containing the relocation we're going to perform. */
228	reloc->offset += i915_gem_obj_ggtt_offset(obj);	229	reloc->offset += i915_gem_obj_ggtt_offset(obj);
229	reloc_page = (void*)MapIoMem(dev_priv->gtt.mappable_base +	230	MapPage(dev_priv->gtt.mappable,dev_priv->gtt.mappable_base +
230	(reloc->offset & PAGE_MASK), 4096, 0x18\|3);	231	(reloc->offset & PAGE_MASK), PG_SW);
-		232	reloc_page = dev_priv->gtt.mappable;
231	reloc_entry = (uint32_t __iomem *)	233	reloc_entry = (uint32_t __iomem *)
232	(reloc_page + offset_in_page(reloc->offset));	234	(reloc_page + offset_in_page(reloc->offset));
233	iowrite32(reloc->delta, reloc_entry);	235	iowrite32(reloc->delta, reloc_entry);
234	FreeKernelSpace(reloc_page);	-
235		236
236	return 0;	237	return 0;
237	}	238	}
238		239
239	static int	240	static int
240	i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,	241	i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
241	struct eb_objects *eb,	242	struct eb_objects *eb,
242	struct drm_i915_gem_relocation_entry *reloc,	243	struct drm_i915_gem_relocation_entry *reloc,
243	struct i915_address_space *vm)	244	struct i915_address_space *vm)
244	{	245	{
245	struct drm_device *dev = obj->base.dev;	246	struct drm_device *dev = obj->base.dev;
246	struct drm_gem_object *target_obj;	247	struct drm_gem_object *target_obj;
247	struct drm_i915_gem_object *target_i915_obj;	248	struct drm_i915_gem_object *target_i915_obj;
248	uint32_t target_offset;	249	uint32_t target_offset;
249	int ret = -EINVAL;	250	int ret = -EINVAL;
250		251
251	/* we've already hold a reference to all valid objects */	252	/* we've already hold a reference to all valid objects */
252	target_obj = &eb_get_object(eb, reloc->target_handle)->base;	253	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
253	if (unlikely(target_obj == NULL))	254	if (unlikely(target_obj == NULL))
254	return -ENOENT;	255	return -ENOENT;
255		256
256	target_i915_obj = to_intel_bo(target_obj);	257	target_i915_obj = to_intel_bo(target_obj);
257	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);	258	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
258		259
259	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and	260	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
260	* pipe_control writes because the gpu doesn't properly redirect them	261	* pipe_control writes because the gpu doesn't properly redirect them
261	* through the ppgtt for non_secure batchbuffers. */	262	* through the ppgtt for non_secure batchbuffers. */
262	if (unlikely(IS_GEN6(dev) &&	263	if (unlikely(IS_GEN6(dev) &&
263	reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&	264	reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
264	!target_i915_obj->has_global_gtt_mapping)) {	265	!target_i915_obj->has_global_gtt_mapping)) {
265	i915_gem_gtt_bind_object(target_i915_obj,	266	i915_gem_gtt_bind_object(target_i915_obj,
266	target_i915_obj->cache_level);	267	target_i915_obj->cache_level);
267	}	268	}
268		269
269	/* Validate that the target is in a valid r/w GPU domain */	270	/* Validate that the target is in a valid r/w GPU domain */
270	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {	271	if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
271	DRM_DEBUG("reloc with multiple write domains: "	272	DRM_DEBUG("reloc with multiple write domains: "
272	"obj %p target %d offset %d "	273	"obj %p target %d offset %d "
273	"read %08x write %08x",	274	"read %08x write %08x",
274	obj, reloc->target_handle,	275	obj, reloc->target_handle,
275	(int) reloc->offset,	276	(int) reloc->offset,
276	reloc->read_domains,	277	reloc->read_domains,
277	reloc->write_domain);	278	reloc->write_domain);
278	return ret;	279	return ret;
279	}	280	}
280	if (unlikely((reloc->write_domain \| reloc->read_domains)	281	if (unlikely((reloc->write_domain \| reloc->read_domains)
281	& ~I915_GEM_GPU_DOMAINS)) {	282	& ~I915_GEM_GPU_DOMAINS)) {
282	DRM_DEBUG("reloc with read/write non-GPU domains: "	283	DRM_DEBUG("reloc with read/write non-GPU domains: "
283	"obj %p target %d offset %d "	284	"obj %p target %d offset %d "
284	"read %08x write %08x",	285	"read %08x write %08x",
285	obj, reloc->target_handle,	286	obj, reloc->target_handle,
286	(int) reloc->offset,	287	(int) reloc->offset,
287	reloc->read_domains,	288	reloc->read_domains,
288	reloc->write_domain);	289	reloc->write_domain);
289	return ret;	290	return ret;
290	}	291	}
291		292
292	target_obj->pending_read_domains \|= reloc->read_domains;	293	target_obj->pending_read_domains \|= reloc->read_domains;
293	target_obj->pending_write_domain \|= reloc->write_domain;	294	target_obj->pending_write_domain \|= reloc->write_domain;
294		295
295	/* If the relocation already has the right value in it, no	296	/* If the relocation already has the right value in it, no
296	* more work needs to be done.	297	* more work needs to be done.
297	*/	298	*/
298	if (target_offset == reloc->presumed_offset)	299	if (target_offset == reloc->presumed_offset)
299	return 0;	300	return 0;
300		301
301	/* Check that the relocation address is valid... */	302	/* Check that the relocation address is valid... */
302	if (unlikely(reloc->offset > obj->base.size - 4)) {	303	if (unlikely(reloc->offset > obj->base.size - 4)) {
303	DRM_DEBUG("Relocation beyond object bounds: "	304	DRM_DEBUG("Relocation beyond object bounds: "
304	"obj %p target %d offset %d size %d.\n",	305	"obj %p target %d offset %d size %d.\n",
305	obj, reloc->target_handle,	306	obj, reloc->target_handle,
306	(int) reloc->offset,	307	(int) reloc->offset,
307	(int) obj->base.size);	308	(int) obj->base.size);
308	return ret;	309	return ret;
309	}	310	}
310	if (unlikely(reloc->offset & 3)) {	311	if (unlikely(reloc->offset & 3)) {
311	DRM_DEBUG("Relocation not 4-byte aligned: "	312	DRM_DEBUG("Relocation not 4-byte aligned: "
312	"obj %p target %d offset %d.\n",	313	"obj %p target %d offset %d.\n",
313	obj, reloc->target_handle,	314	obj, reloc->target_handle,
314	(int) reloc->offset);	315	(int) reloc->offset);
315	return ret;	316	return ret;
316	}	317	}
317		318
318	/* We can't wait for rendering with pagefaults disabled */	319	/* We can't wait for rendering with pagefaults disabled */
319		320
320	reloc->delta += target_offset;	321	reloc->delta += target_offset;
321	if (use_cpu_reloc(obj))	322	if (use_cpu_reloc(obj))
322	ret = relocate_entry_cpu(obj, reloc);	323	ret = relocate_entry_cpu(obj, reloc);
323	else	324	else
324	ret = relocate_entry_gtt(obj, reloc);	325	ret = relocate_entry_gtt(obj, reloc);
325		326
326	if (ret)	327	if (ret)
327	return ret;	328	return ret;
328		329
329	/* and update the user's relocation entry */	330	/* and update the user's relocation entry */
330	reloc->presumed_offset = target_offset;	331	reloc->presumed_offset = target_offset;
331		332
332	return 0;	333	return 0;
333	}	334	}
334		335
335	static int	336	static int
336	i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,	337	i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
337	struct eb_objects *eb,	338	struct eb_objects *eb,
338	struct i915_address_space *vm)	339	struct i915_address_space *vm)
339	{	340	{
340	#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))	341	#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
341	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];	342	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)];
342	struct drm_i915_gem_relocation_entry __user *user_relocs;	343	struct drm_i915_gem_relocation_entry __user *user_relocs;
343	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	344	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
344	int remain, ret;	345	int remain, ret;
345		346
346	user_relocs = (void __user *)(uintptr_t)entry->relocs_ptr;	347	user_relocs = to_user_ptr(entry->relocs_ptr);
347		348
348	remain = entry->relocation_count;	349	remain = entry->relocation_count;
349	while (remain) {	350	while (remain) {
350	struct drm_i915_gem_relocation_entry *r = stack_reloc;	351	struct drm_i915_gem_relocation_entry *r = stack_reloc;
351	int count = remain;	352	int count = remain;
352	if (count > ARRAY_SIZE(stack_reloc))	353	if (count > ARRAY_SIZE(stack_reloc))
353	count = ARRAY_SIZE(stack_reloc);	354	count = ARRAY_SIZE(stack_reloc);
354	remain -= count;	355	remain -= count;
355		356
356	memcpy(r, user_relocs, count*sizeof(r[0]));	357	memcpy(r, user_relocs, count*sizeof(r[0]));
357		358
358	do {	359	do {
359	u64 offset = r->presumed_offset;	360	u64 offset = r->presumed_offset;
360		361
361	ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,	362	ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
362	vm);	363	vm);
363	if (ret)	364	if (ret)
364	return ret;	365	return ret;
365		366
366	if (r->presumed_offset != offset)	367	if (r->presumed_offset != offset)
367	{	368	{
368	memcpy(&user_relocs->presumed_offset,	369	memcpy(&user_relocs->presumed_offset,
369	&r->presumed_offset,	370	&r->presumed_offset,
370	sizeof(r->presumed_offset));	371	sizeof(r->presumed_offset));
371	}	372	}
372		373
373	user_relocs++;	374	user_relocs++;
374	r++;	375	r++;
375	} while (--count);	376	} while (--count);
376	}	377	}
377		378
378	return 0;	379	return 0;
379	#undef N_RELOC	380	#undef N_RELOC
380	}	381	}
381		382
382	static int	383	static int
383	i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,	384	i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
384	struct eb_objects *eb,	385	struct eb_objects *eb,
385	struct drm_i915_gem_relocation_entry *relocs,	386	struct drm_i915_gem_relocation_entry *relocs,
386	struct i915_address_space *vm)	387	struct i915_address_space *vm)
387	{	388	{
388	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	389	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
389	int i, ret;	390	int i, ret;
390		391
391	for (i = 0; i < entry->relocation_count; i++) {	392	for (i = 0; i < entry->relocation_count; i++) {
392	ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],	393	ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
393	vm);	394	vm);
394	if (ret)	395	if (ret)
395	return ret;	396	return ret;
396	}	397	}
397		398
398	return 0;	399	return 0;
399	}	400	}
400		401
401	static int	402	static int
402	i915_gem_execbuffer_relocate(struct eb_objects *eb,	403	i915_gem_execbuffer_relocate(struct eb_objects *eb,
403	struct i915_address_space *vm)	404	struct i915_address_space *vm)
404	{	405	{
405	struct drm_i915_gem_object *obj;	406	struct drm_i915_gem_object *obj;
406	int ret = 0;	407	int ret = 0;
407		408
408	/* This is the fast path and we cannot handle a pagefault whilst	409	/* This is the fast path and we cannot handle a pagefault whilst
409	* holding the struct mutex lest the user pass in the relocations	410	* holding the struct mutex lest the user pass in the relocations
410	* contained within a mmaped bo. For in such a case we, the page	411	* contained within a mmaped bo. For in such a case we, the page
411	* fault handler would call i915_gem_fault() and we would try to	412	* fault handler would call i915_gem_fault() and we would try to
412	* acquire the struct mutex again. Obviously this is bad and so	413	* acquire the struct mutex again. Obviously this is bad and so
413	* lockdep complains vehemently.	414	* lockdep complains vehemently.
414	*/	415	*/
415	// pagefault_disable();	416	// pagefault_disable();
416	list_for_each_entry(obj, &eb->objects, exec_list) {	417	list_for_each_entry(obj, &eb->objects, exec_list) {
417	ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);	418	ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
418	if (ret)	419	if (ret)
419	break;	420	break;
420	}	421	}
421	// pagefault_enable();	422	// pagefault_enable();
422		423
423	return ret;	424	return ret;
424	}	425	}
425		426
426	#define __EXEC_OBJECT_HAS_PIN (1<<31)	427	#define __EXEC_OBJECT_HAS_PIN (1<<31)
427	#define __EXEC_OBJECT_HAS_FENCE (1<<30)	428	#define __EXEC_OBJECT_HAS_FENCE (1<<30)
428		429
429	static int	430	static int
430	need_reloc_mappable(struct drm_i915_gem_object *obj)	431	need_reloc_mappable(struct drm_i915_gem_object *obj)
431	{	432	{
432	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	433	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
433	return entry->relocation_count && !use_cpu_reloc(obj);	434	return entry->relocation_count && !use_cpu_reloc(obj);
434	}	435	}
435		436
436	static int	437	static int
437	i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,	438	i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
438	struct intel_ring_buffer *ring,	439	struct intel_ring_buffer *ring,
439	struct i915_address_space *vm,	440	struct i915_address_space *vm,
440	bool *need_reloc)	441	bool *need_reloc)
441	{	442	{
442	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;	443	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
443	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;	444	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
444	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;	445	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
445	bool need_fence, need_mappable;	446	bool need_fence, need_mappable;
446	int ret;	447	int ret;
447		448
448	need_fence =	449	need_fence =
449	has_fenced_gpu_access &&	450	has_fenced_gpu_access &&
450	entry->flags & EXEC_OBJECT_NEEDS_FENCE &&	451	entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
451	obj->tiling_mode != I915_TILING_NONE;	452	obj->tiling_mode != I915_TILING_NONE;
452	need_mappable = need_fence \|\| need_reloc_mappable(obj);	453	need_mappable = need_fence \|\| need_reloc_mappable(obj);
453		454
454	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,	455	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
455	false);	456	false);
456	if (ret)	457	if (ret)
457	return ret;	458	return ret;
458		459
459	entry->flags \|= __EXEC_OBJECT_HAS_PIN;	460	entry->flags \|= __EXEC_OBJECT_HAS_PIN;
460		461
461	if (has_fenced_gpu_access) {	462	if (has_fenced_gpu_access) {
462	if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {	463	if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
463	ret = i915_gem_object_get_fence(obj);	464	ret = i915_gem_object_get_fence(obj);
464	if (ret)	465	if (ret)
465	return ret;	466	return ret;
466		467
467	if (i915_gem_object_pin_fence(obj))	468	if (i915_gem_object_pin_fence(obj))
468	entry->flags \|= __EXEC_OBJECT_HAS_FENCE;	469	entry->flags \|= __EXEC_OBJECT_HAS_FENCE;
469		470
470	obj->pending_fenced_gpu_access = true;	471	obj->pending_fenced_gpu_access = true;
471	}	472	}
472	}	473	}
473		474
474	/* Ensure ppgtt mapping exists if needed */	475	/* Ensure ppgtt mapping exists if needed */
475	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {	476	if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
476	i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,	477	i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
477	obj, obj->cache_level);	478	obj, obj->cache_level);
478		479
479	obj->has_aliasing_ppgtt_mapping = 1;	480	obj->has_aliasing_ppgtt_mapping = 1;
480	}	481	}
481		482
482	if (entry->offset != i915_gem_obj_offset(obj, vm)) {	483	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
483	entry->offset = i915_gem_obj_offset(obj, vm);	484	entry->offset = i915_gem_obj_offset(obj, vm);
484	*need_reloc = true;	485	*need_reloc = true;
485	}	486	}
486		487
487	if (entry->flags & EXEC_OBJECT_WRITE) {	488	if (entry->flags & EXEC_OBJECT_WRITE) {
488	obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;	489	obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
489	obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;	490	obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
490	}	491	}
491		492
492	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&	493	if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
493	!obj->has_global_gtt_mapping)	494	!obj->has_global_gtt_mapping)
494	i915_gem_gtt_bind_object(obj, obj->cache_level);	495	i915_gem_gtt_bind_object(obj, obj->cache_level);
495		496
496	return 0;	497	return 0;
497	}	498	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/i915/i915_gem_execbuffer.c – Rev 4392 → 4539